From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by sourceware.org (Postfix) with ESMTPS id 89C903858D37 for ; Tue, 27 Dec 2022 19:45:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 89C903858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-ed1-x533.google.com with SMTP id d14so20244260edj.11 for ; Tue, 27 Dec 2022 11:45:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=wG6KoM36ValbILq+TXVcXOUNwBcghGSpkKzBsZs7Jpk=; b=h++GsFvc+afOVFl+tDpyxaCNSxG3cZo02VdKrK3e1m5Z5U5HrElxeY5ldtnsKs51c+ KVLuPkc/xVpn3u8dr9bu+u/dVnwpfuFeE31LbAo0R/ZwDF1vNlHMWlwLNrIflsAiPdJe T53s/fUXU4AKRIkE7l89SNl97bz+0lKwENaYM4YF8D/1Zj21yHcpYMzDS9DsvF8xjFzF jk6/iHrv0p6jAt4sRNdkZmYn2CgyRzGaMBGbJhMGBjIpPU5USWHAAi+DWn2OHPHjDnbQ LkqLShjlJu8TlZF/zJfcO3TmDfc39WUa3XeLcaKIeq+dJjegPvuNJxpy4CTiwmTpL0VB 9jdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=wG6KoM36ValbILq+TXVcXOUNwBcghGSpkKzBsZs7Jpk=; b=7ZBxv6sZDhkyyrkb+N4FpRaIu/gOT4d3NGeCYRGNmERi2KXTnp6u3MId8Rwv6pb2xN MEsPsekPF6Vc02ULJ6BWdEGYn219kbp1zSkM3bd7KyHKYi+lrW9sd513KkrYj0J+Knfu 4izBhknFsnSMuzD9lc8q4J34rPwp+JSU5UbuECawJQ3FYTOS2gVEEipF1nEwlFB5ADmV qwrJ5zDbgcAXQVjvosQ5LA3fqjFr0JW+9tHLwIoz+lSA8JiLjQ9fXX+WVN4dbDoL8Srw bY+ECm9uByCpnHcbZHIwDFo7e91/RRz03JIN66tMj33kbxPZEtFdnUIHqtQyut51KSei zKdA== X-Gm-Message-State: AFqh2krl/DlTOXBcnAw+dorIIdoZWuD+03c86r0ItUfm0oZWsT+/S9QZ /2MvRwcJoDo54El7aRUvZiQIXGInUPEmmYEadDIODovijWwPWg== X-Google-Smtp-Source: AMrXdXvuKBDURKX6a5+y8bVOMndAwhxFfYsSGyqB/lydVvqucPELkah9SjA3u6A076a/StYGBu2gfYWL9oLwYsYgnAU= X-Received: by 2002:aa7:dd17:0:b0:487:fdb6:11f2 with SMTP id i23-20020aa7dd17000000b00487fdb611f2mr136497edv.213.1672170321092; Tue, 27 Dec 2022 11:45:21 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Philipp Tomsich Date: Tue, 27 Dec 2022 20:45:10 +0100 Message-ID: Subject: Re: [Offline] Re: [PATCH] RISC-V: Fix T-Head Fmv vendor extension encoding To: Nelson Chu Cc: Palmer Dabbelt , =?UTF-8?Q?Christoph_M=C3=BCllner?= , Binutils , Andrew Waterman , Lifang Xia Content-Type: multipart/alternative; boundary="000000000000fe2ff905f0d47dbf" X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,HTML_MESSAGE,JMQ_SPF_NEUTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --000000000000fe2ff905f0d47dbf Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Nelson, I had missed the OK on this one as I had been traveling for RISC-V Summit and now took care of it. Applied to master, thanks! Philipp. On Thu, 22 Dec 2022 at 02:51, Nelson Chu wrote: > Do we expect this in the 2.40 release? I haven't seen this in master for > now. > > Thanks > Nelson > > On Sat, Dec 17, 2022 at 3:00 AM Palmer Dabbelt wrote: > > > > On Fri, 16 Dec 2022 10:59:53 PST (-0800), christoph.muellner@vrull.eu > wrote: > > > On Fri, Dec 16, 2022 at 7:56 PM Palmer Dabbelt > wrote: > > > > > >> On Fri, 16 Dec 2022 10:51:33 PST (-0800), christoph.muellner@vrull.eu > > >> wrote: > > >> > From: Christoph M=C3=BCllner > > >> > > > >> > A recent change in the XTheadFmv spec fixed an encoding bug in the > > >> > document. This patch changes the code to follow this bugfix. > > >> > > > >> > Spec patch can be found here: > > >> > https://github.com/T-head-Semi/thead-extension-spec/pull/11 > > >> > > >> There's not much info in there. Was this just a bug in the ISA > manual? > > >> In other words, does the existing hardware (I know of at least C906s > and > > >> C910s in the wild) behave the new way already? In that case > > >> > > > > > > Yes, this was just a bug in the ISA manual, which slipped through the > > > review. > > > The manual now matches the implementation. > > > > OK, thanks! > > > > > > > > > > > > > >> > > >> Reviewed-by: Palmer Dabbelt > > >> > > >> but if the hardware has the old behavior then we'll need to do > something > > >> more complicated to avoid breaking compatibility. > > >> > > >> > > > >> > Signed-off-by: Christoph M=C3=BCllner > > >> > --- > > >> > gas/testsuite/gas/riscv/x-thead-fmv.d | 4 ++-- > > >> > include/opcode/riscv-opc.h | 4 ++-- > > >> > 2 files changed, 4 insertions(+), 4 deletions(-) > > >> > > > >> > diff --git a/gas/testsuite/gas/riscv/x-thead-fmv.d > > >> b/gas/testsuite/gas/riscv/x-thead-fmv.d > > >> > index f2bbe010beb..af8ce0c8ee0 100644 > > >> > --- a/gas/testsuite/gas/riscv/x-thead-fmv.d > > >> > +++ b/gas/testsuite/gas/riscv/x-thead-fmv.d > > >> > @@ -7,5 +7,5 @@ > > >> > Disassembly of section .text: > > >> > > > >> > 0+000 : > > >> > -[ ]+[0-9a-f]+:[ ]+6005950b[ ]+th.fmv.hw.x[ ]+a0,fa1 > > >> > -[ ]+[0-9a-f]+:[ ]+5005158b[ ]+th.fmv.x.hw[ ]+a1,fa0 > > >> > +[ ]+[0-9a-f]+:[ ]+5005950b[ ]+th.fmv.hw.x[ ]+a0,fa1 > > >> > +[ ]+[0-9a-f]+:[ ]+6005158b[ ]+th.fmv.x.hw[ ]+a1,fa0 > > >> > diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc= .h > > >> > index 06e3df0f5a6..5420bfac91b 100644 > > >> > --- a/include/opcode/riscv-opc.h > > >> > +++ b/include/opcode/riscv-opc.h > > >> > @@ -2209,9 +2209,9 @@ > > >> > #define MATCH_TH_FSURW 0x5000700b > > >> > #define MASK_TH_FSURW 0xf800707f > > >> > /* Vendor-specific (T-Head) XTheadFmv instructions. */ > > >> > -#define MATCH_TH_FMV_HW_X 0x6000100b > > >> > +#define MATCH_TH_FMV_HW_X 0x5000100b > > >> > #define MASK_TH_FMV_HW_X 0xfff0707f > > >> > -#define MATCH_TH_FMV_X_HW 0x5000100b > > >> > +#define MATCH_TH_FMV_X_HW 0x6000100b > > >> > #define MASK_TH_FMV_X_HW 0xfff0707f > > >> > /* Vendor-specific (T-Head) XTheadInt instructions. */ > > >> > #define MATCH_TH_IPOP 0x0050000b > > >> > --000000000000fe2ff905f0d47dbf--