* [patch,avr] device specific instruction support for avr devices
@ 2014-03-03 5:50 S, Pitchumani
2014-03-24 8:23 ` S, Pitchumani
0 siblings, 1 reply; 5+ messages in thread
From: S, Pitchumani @ 2014-03-03 5:50 UTC (permalink / raw)
To: binutils; +Cc: chertykov
[-- Attachment #1: Type: text/plain, Size: 1567 bytes --]
Hi,
Few AVR Xmega devices have specific instruction support than the architecture
it belongs to. For example atxmega128b1 device has RMW instructions (XCH,LAC,
LAS and LAT) support, but not all avrxmega6 devices have.
Now, avr-gcc passes architecture name to assembler instead of device name. So,
RMW instructions are not recognized (illegal opcode error) by assembler.
I have attached a patch to address this issue in assembler.
- It adds a option '-mrmw' to assembler.
- Based on -mrmw option device specific instructions are added to current
instruction set (mcu_types[i].isa | AVR_ISA_RMW)
Now assembler can recognize rmw instructions for respective devices.
It is necessary to update gcc to pass -mrmw option to assembler if the
selected device has rmw instructions. I'll send a patch for gcc as well.
Please review the attached patch and give your suggestions.
Thanks,
Pitchumani
gas/ChangeLog
2014-02-25 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_RMW_ISA for -mrmw option.
(struct option md_longopts): Add mrmw option.
(md_show_usage): add -mrmw option description.
(md_parse_option): Update isa details if -mrmw option specified.
* doc/c-avr.texi: Add doc for new option -mrmw.
gas/testsuite/ChangeLog
2014-02-25 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/avr.exp: Run new tests.
* gas/avr/rmw.d: Add test for additional ISA support.
* gas/avr/rmw.s: Ditto.
[-- Attachment #2: device-specific-isa-avr-as.patch --]
[-- Type: application/octet-stream, Size: 5248 bytes --]
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index 332aa2d..bc57a31 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -283,8 +283,10 @@ static struct mcu_type_s mcu_types[] =
{NULL, 0, 0}
};
+
/* Current MCU type. */
static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
+static struct mcu_type_s specified_mcu;
static struct mcu_type_s * avr_mcu = & default_mcu;
/* AVR target-specific switches. */
@@ -355,7 +357,8 @@ enum options
{
OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
OPTION_NO_SKIP_BUG,
- OPTION_NO_WRAP
+ OPTION_NO_WRAP,
+ OPTION_RMW_ISA
};
struct option md_longopts[] =
@@ -364,6 +367,7 @@ struct option md_longopts[] =
{ "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
{ "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
{ "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
+ { "mrmw", no_argument, NULL, OPTION_RMW_ISA },
{ NULL, no_argument, NULL, 0 }
};
@@ -468,7 +472,9 @@ md_show_usage (FILE *stream)
" -mno-skip-bug disable warnings for skipping two-word instructions\n"
" (default for avr4, avr5)\n"
" -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
- " (default for avr3, avr5)\n"));
+ " (default for avr3, avr5)\n"
+ " -mrmw accept RMW instructions\n"
+ ));
show_mcu_list (stream);
}
@@ -515,7 +521,12 @@ md_parse_option (int c, char *arg)
type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
as .arch ... in the asm output at the same time. */
if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
- avr_mcu = &mcu_types[i];
+ {
+ specified_mcu.name = mcu_types[i].name;
+ specified_mcu.isa |= mcu_types[i].isa;
+ specified_mcu.mach = mcu_types[i].mach;
+ avr_mcu = &specified_mcu;
+ }
else
as_fatal (_("redefinition of mcu type `%s' to `%s'"),
avr_mcu->name, mcu_types[i].name);
@@ -530,6 +541,9 @@ md_parse_option (int c, char *arg)
case OPTION_NO_WRAP:
avr_opt.no_wrap = 1;
return 1;
+ case OPTION_RMW_ISA:
+ specified_mcu.isa |= AVR_ISA_RMW;
+ return 1;
}
return 0;
diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi
index 213e82c..603d755 100644
--- a/gas/doc/c-avr.texi
+++ b/gas/doc/c-avr.texi
@@ -125,6 +125,10 @@ This option disable warnings for skipping two-word instructions.
@item -mno-wrap
This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
+@cindex @code{-mrmw} command line option, AVR
+@item -mrmw
+Accept RMW (@code{XCH,LAC,LAS,LAT}) instructions.
+
@end table
diff --git a/gas/testsuite/gas/avr/avr.exp b/gas/testsuite/gas/avr/avr.exp
new file mode 100644
index 0000000..fc90f9f
--- /dev/null
+++ b/gas/testsuite/gas/avr/avr.exp
@@ -0,0 +1,24 @@
+# Copyright 2014
+# Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+#
+# Some AVR tests
+#
+
+if {[istarget avr-*-*]} {
+ run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+}
diff --git a/gas/testsuite/gas/avr/rmw.d b/gas/testsuite/gas/avr/rmw.d
new file mode 100644
index 0000000..48554e1
--- /dev/null
+++ b/gas/testsuite/gas/avr/rmw.d
@@ -0,0 +1,23 @@
+#name: AVR RMW instructions
+#as: -mmcu=avrxmega2 -mrmw
+#objdump: -dr --show-raw-insn
+#target: avr-*-*
+
+.*: +file format elf32-avr
+
+Disassembly of section .text:
+
+00000000 <main>:
+ 0: cf 93 push r28
+ 2: df 93 push r29
+ 4: cd b7 in r28, 0x3d ; 61
+ 6: de b7 in r29, 0x3e ; 62
+ 8: c4 92 xch Z, r12
+ a: c5 92 las Z, r12
+ c: c6 92 lac Z, r12
+ e: c7 92 lat Z, r12
+ 10: 80 e0 ldi r24, 0x00 ; 0
+ 12: 90 e0 ldi r25, 0x00 ; 0
+ 14: df 91 pop r29
+ 16: cf 91 pop r28
+ 18: 08 95 ret
diff --git a/gas/testsuite/gas/avr/rmw.s b/gas/testsuite/gas/avr/rmw.s
new file mode 100644
index 0000000..fca39c9
--- /dev/null
+++ b/gas/testsuite/gas/avr/rmw.s
@@ -0,0 +1,32 @@
+ .file "rmw.s"
+__SP_H__ = 0x3e
+__SP_L__ = 0x3d
+__SREG__ = 0x3f
+__CCP__ = 0x34
+__tmp_reg__ = 0
+__zero_reg__ = 1
+ .text
+.global main
+ .type main, @function
+main:
+ push r28
+ push r29
+ in r28,__SP_L__
+ in r29,__SP_H__
+/* prologue: function */
+/* frame size = 0 */
+/* stack size = 2 */
+.L__stack_usage = 2
+/* #APP */
+ xch Z, r12
+ las Z, r12
+ lac Z, r12
+ lat Z, r12
+/* #NOAPP */
+ ldi r24,0
+ ldi r25,0
+/* epilogue start */
+ pop r29
+ pop r28
+ ret
+ .size main, .-main
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [patch,avr] device specific instruction support for avr devices
2014-03-03 5:50 [patch,avr] device specific instruction support for avr devices S, Pitchumani
@ 2014-03-24 8:23 ` S, Pitchumani
2014-03-25 17:07 ` Denis Chertykov
0 siblings, 1 reply; 5+ messages in thread
From: S, Pitchumani @ 2014-03-24 8:23 UTC (permalink / raw)
To: binutils; +Cc: chertykov
> -----Original Message-----
> From: binutils-owner@sourceware.org [mailto:binutils-owner@sourceware.org]
> On Behalf Of S, Pitchumani
> Sent: Monday, March 03, 2014 11:21 AM
> To: binutils@sourceware.org
> Cc: chertykov@gmail.com
> Subject: [patch,avr] device specific instruction support for avr devices
>
> Hi,
>
> Few AVR Xmega devices have specific instruction support than the
> architecture
> it belongs to. For example atxmega128b1 device has RMW instructions
> (XCH,LAC,
> LAS and LAT) support, but not all avrxmega6 devices have.
>
> Now, avr-gcc passes architecture name to assembler instead of device name.
> So,
> RMW instructions are not recognized (illegal opcode error) by assembler.
>
> I have attached a patch to address this issue in assembler.
> - It adds a option '-mrmw' to assembler.
> - Based on -mrmw option device specific instructions are added to current
> instruction set (mcu_types[i].isa | AVR_ISA_RMW)
> Now assembler can recognize rmw instructions for respective devices.
>
> It is necessary to update gcc to pass -mrmw option to assembler if the
> selected device has rmw instructions. I'll send a patch for gcc as well.
>
> Please review the attached patch and give your suggestions.
Hi,
I have updated the patch to include -mrmw option to binutils.
Patch for gcc update submitted in avr-gcc list.
http://lists.nongnu.org/archive/html/avr-gcc-list/2014-03/msg00004.html
Regards,
Pitchumani
gas/ChangeLog
2014-03-24 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_ISA_RMW for -mrmw option.
(struct option md_longopts): Add mrmw option.
(md_show_usage): add -mrmw option description.
(md_parse_option): Update isa details if -mrmw option specified.
* doc/c-avr.texi: Add doc for new option -mrmw.
gas/testsuite/ChangeLog
2014-02-25 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/avr.exp: Run new tests.
* gas/avr/rmw.d: Add test for additional ISA support.
* gas/avr/rmw.s: Ditto.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [patch,avr] device specific instruction support for avr devices
2014-03-24 8:23 ` S, Pitchumani
@ 2014-03-25 17:07 ` Denis Chertykov
2014-03-27 5:07 ` S, Pitchumani
0 siblings, 1 reply; 5+ messages in thread
From: Denis Chertykov @ 2014-03-25 17:07 UTC (permalink / raw)
To: S, Pitchumani; +Cc: binutils
2014-03-24 12:23 GMT+04:00 S, Pitchumani <Pitchumani.S@atmel.com>:
>> -----Original Message-----
>> From: binutils-owner@sourceware.org [mailto:binutils-owner@sourceware.org]
>> On Behalf Of S, Pitchumani
>> Sent: Monday, March 03, 2014 11:21 AM
>> To: binutils@sourceware.org
>> Cc: chertykov@gmail.com
>> Subject: [patch,avr] device specific instruction support for avr devices
>>
>> Hi,
>>
>> Few AVR Xmega devices have specific instruction support than the
>> architecture
>> it belongs to. For example atxmega128b1 device has RMW instructions
>> (XCH,LAC,
>> LAS and LAT) support, but not all avrxmega6 devices have.
>>
>> Now, avr-gcc passes architecture name to assembler instead of device name.
>> So,
>> RMW instructions are not recognized (illegal opcode error) by assembler.
>>
>> I have attached a patch to address this issue in assembler.
>> - It adds a option '-mrmw' to assembler.
>> - Based on -mrmw option device specific instructions are added to current
>> instruction set (mcu_types[i].isa | AVR_ISA_RMW)
>> Now assembler can recognize rmw instructions for respective devices.
>>
>> It is necessary to update gcc to pass -mrmw option to assembler if the
>> selected device has rmw instructions. I'll send a patch for gcc as well.
>>
>> Please review the attached patch and give your suggestions.
>
> Hi,
>
> I have updated the patch to include -mrmw option to binutils.
Where is the patch ?
Denis.
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [patch,avr] device specific instruction support for avr devices
2014-03-25 17:07 ` Denis Chertykov
@ 2014-03-27 5:07 ` S, Pitchumani
2014-03-29 5:55 ` Denis Chertykov
0 siblings, 1 reply; 5+ messages in thread
From: S, Pitchumani @ 2014-03-27 5:07 UTC (permalink / raw)
To: Denis Chertykov; +Cc: binutils
[-- Attachment #1: Type: text/plain, Size: 2556 bytes --]
> -----Original Message-----
> From: Denis Chertykov [mailto:chertykov@gmail.com]
> Sent: Tuesday, March 25, 2014 10:37 PM
> To: S, Pitchumani
> Cc: binutils@sourceware.org
> Subject: Re: [patch,avr] device specific instruction support for avr
> devices
>
> 2014-03-24 12:23 GMT+04:00 S, Pitchumani <Pitchumani.S@atmel.com>:
> >> -----Original Message-----
> >> From: binutils-owner@sourceware.org [mailto:binutils-
> owner@sourceware.org]
> >> On Behalf Of S, Pitchumani
> >> Sent: Monday, March 03, 2014 11:21 AM
> >> To: binutils@sourceware.org
> >> Cc: chertykov@gmail.com
> >> Subject: [patch,avr] device specific instruction support for avr
> devices
> >>
> >> Hi,
> >>
> >> Few AVR Xmega devices have specific instruction support than the
> >> architecture
> >> it belongs to. For example atxmega128b1 device has RMW instructions
> >> (XCH,LAC,
> >> LAS and LAT) support, but not all avrxmega6 devices have.
> >>
> >> Now, avr-gcc passes architecture name to assembler instead of device
> name.
> >> So,
> >> RMW instructions are not recognized (illegal opcode error) by
> assembler.
> >>
> >> I have attached a patch to address this issue in assembler.
> >> - It adds a option '-mrmw' to assembler.
> >> - Based on -mrmw option device specific instructions are added to
> current
> >> instruction set (mcu_types[i].isa | AVR_ISA_RMW)
> >> Now assembler can recognize rmw instructions for respective devices.
> >>
> >> It is necessary to update gcc to pass -mrmw option to assembler if the
> >> selected device has rmw instructions. I'll send a patch for gcc as
> well.
> >>
> >> Please review the attached patch and give your suggestions.
> >
> > Hi,
> >
> > I have updated the patch to include -mrmw option to binutils.
>
> Where is the patch ?
>
> Denis.
Sorry, now I have attached the patch.
Regards,
Pitchumani
gas/ChangeLog
2014-03-27 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_ISA_RMW for -mrmw option.
(struct option md_longopts): Add mrmw option.
(md_show_usage): add -mrmw option description.
(md_parse_option): Update isa details if -mrmw option specified.
* doc/c-avr.texi: Add doc for new option -mrmw.
gas/testsuite/ChangeLog
2014-02-27 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/avr.exp: Run new tests for avr target.
* gas/avr/rmw.d: Add test for additional ISA support.
* gas/avr/rmw.s: Ditto.
[-- Attachment #2: dev-specific-feature-avr-as.patch --]
[-- Type: application/octet-stream, Size: 5273 bytes --]
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index d382fd9..eb96c9b 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -326,8 +326,10 @@ static struct mcu_type_s mcu_types[] =
{NULL, 0, 0}
};
+
/* Current MCU type. */
static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
+static struct mcu_type_s specified_mcu;
static struct mcu_type_s * avr_mcu = & default_mcu;
/* AVR target-specific switches. */
@@ -398,7 +400,8 @@ enum options
{
OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
OPTION_NO_SKIP_BUG,
- OPTION_NO_WRAP
+ OPTION_NO_WRAP,
+ OPTION_ISA_RMW
};
struct option md_longopts[] =
@@ -407,6 +410,7 @@ struct option md_longopts[] =
{ "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
{ "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
{ "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
+ { "mrmw", no_argument, NULL, OPTION_ISA_RMW },
{ NULL, no_argument, NULL, 0 }
};
@@ -511,7 +515,9 @@ md_show_usage (FILE *stream)
" -mno-skip-bug disable warnings for skipping two-word instructions\n"
" (default for avr4, avr5)\n"
" -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
- " (default for avr3, avr5)\n"));
+ " (default for avr3, avr5)\n"
+ " -mrmw accept Read-Modify-Write instructions\n"
+ ));
show_mcu_list (stream);
}
@@ -558,7 +564,12 @@ md_parse_option (int c, char *arg)
type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
as .arch ... in the asm output at the same time. */
if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
- avr_mcu = &mcu_types[i];
+ {
+ specified_mcu.name = mcu_types[i].name;
+ specified_mcu.isa |= mcu_types[i].isa;
+ specified_mcu.mach = mcu_types[i].mach;
+ avr_mcu = &specified_mcu;
+ }
else
as_fatal (_("redefinition of mcu type `%s' to `%s'"),
avr_mcu->name, mcu_types[i].name);
@@ -573,6 +584,9 @@ md_parse_option (int c, char *arg)
case OPTION_NO_WRAP:
avr_opt.no_wrap = 1;
return 1;
+ case OPTION_ISA_RMW:
+ specified_mcu.isa |= AVR_ISA_RMW;
+ return 1;
}
return 0;
diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi
index e9cc274..305e64c 100644
--- a/gas/doc/c-avr.texi
+++ b/gas/doc/c-avr.texi
@@ -129,6 +129,10 @@ This option disable warnings for skipping two-word instructions.
@item -mno-wrap
This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
+@cindex @code{-mrmw} command line option, AVR
+@item -mrmw
+Accept Read-Modify-Write (@code{XCH,LAC,LAS,LAT}) instructions.
+
@end table
diff --git a/gas/testsuite/gas/avr/avr.exp b/gas/testsuite/gas/avr/avr.exp
new file mode 100644
index 0000000..fc90f9f
--- /dev/null
+++ b/gas/testsuite/gas/avr/avr.exp
@@ -0,0 +1,24 @@
+# Copyright 2014
+# Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+#
+# Some AVR tests
+#
+
+if {[istarget avr-*-*]} {
+ run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+}
diff --git a/gas/testsuite/gas/avr/rmw.d b/gas/testsuite/gas/avr/rmw.d
new file mode 100644
index 0000000..48554e1
--- /dev/null
+++ b/gas/testsuite/gas/avr/rmw.d
@@ -0,0 +1,23 @@
+#name: AVR RMW instructions
+#as: -mmcu=avrxmega2 -mrmw
+#objdump: -dr --show-raw-insn
+#target: avr-*-*
+
+.*: +file format elf32-avr
+
+Disassembly of section .text:
+
+00000000 <main>:
+ 0: cf 93 push r28
+ 2: df 93 push r29
+ 4: cd b7 in r28, 0x3d ; 61
+ 6: de b7 in r29, 0x3e ; 62
+ 8: c4 92 xch Z, r12
+ a: c5 92 las Z, r12
+ c: c6 92 lac Z, r12
+ e: c7 92 lat Z, r12
+ 10: 80 e0 ldi r24, 0x00 ; 0
+ 12: 90 e0 ldi r25, 0x00 ; 0
+ 14: df 91 pop r29
+ 16: cf 91 pop r28
+ 18: 08 95 ret
diff --git a/gas/testsuite/gas/avr/rmw.s b/gas/testsuite/gas/avr/rmw.s
new file mode 100644
index 0000000..fca39c9
--- /dev/null
+++ b/gas/testsuite/gas/avr/rmw.s
@@ -0,0 +1,32 @@
+ .file "rmw.s"
+__SP_H__ = 0x3e
+__SP_L__ = 0x3d
+__SREG__ = 0x3f
+__CCP__ = 0x34
+__tmp_reg__ = 0
+__zero_reg__ = 1
+ .text
+.global main
+ .type main, @function
+main:
+ push r28
+ push r29
+ in r28,__SP_L__
+ in r29,__SP_H__
+/* prologue: function */
+/* frame size = 0 */
+/* stack size = 2 */
+.L__stack_usage = 2
+/* #APP */
+ xch Z, r12
+ las Z, r12
+ lac Z, r12
+ lat Z, r12
+/* #NOAPP */
+ ldi r24,0
+ ldi r25,0
+/* epilogue start */
+ pop r29
+ pop r28
+ ret
+ .size main, .-main
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [patch,avr] device specific instruction support for avr devices
2014-03-27 5:07 ` S, Pitchumani
@ 2014-03-29 5:55 ` Denis Chertykov
0 siblings, 0 replies; 5+ messages in thread
From: Denis Chertykov @ 2014-03-29 5:55 UTC (permalink / raw)
To: S, Pitchumani; +Cc: binutils
2014-03-27 9:07 GMT+04:00 S, Pitchumani <Pitchumani.S@atmel.com>:
>> -----Original Message-----
>> From: Denis Chertykov [mailto:chertykov@gmail.com]
>> Sent: Tuesday, March 25, 2014 10:37 PM
>> To: S, Pitchumani
>> Cc: binutils@sourceware.org
>> Subject: Re: [patch,avr] device specific instruction support for avr
>> devices
>>
>> 2014-03-24 12:23 GMT+04:00 S, Pitchumani <Pitchumani.S@atmel.com>:
>> >> -----Original Message-----
>> >> From: binutils-owner@sourceware.org [mailto:binutils-
>> owner@sourceware.org]
>> >> On Behalf Of S, Pitchumani
>> >> Sent: Monday, March 03, 2014 11:21 AM
>> >> To: binutils@sourceware.org
>> >> Cc: chertykov@gmail.com
>> >> Subject: [patch,avr] device specific instruction support for avr
>> devices
>> >>
>> >> Hi,
>> >>
>> >> Few AVR Xmega devices have specific instruction support than the
>> >> architecture
>> >> it belongs to. For example atxmega128b1 device has RMW instructions
>> >> (XCH,LAC,
>> >> LAS and LAT) support, but not all avrxmega6 devices have.
>> >>
>> >> Now, avr-gcc passes architecture name to assembler instead of device
>> name.
>> >> So,
>> >> RMW instructions are not recognized (illegal opcode error) by
>> assembler.
>> >>
>> >> I have attached a patch to address this issue in assembler.
>> >> - It adds a option '-mrmw' to assembler.
>> >> - Based on -mrmw option device specific instructions are added to
>> current
>> >> instruction set (mcu_types[i].isa | AVR_ISA_RMW)
>> >> Now assembler can recognize rmw instructions for respective devices.
>> >>
>> >> It is necessary to update gcc to pass -mrmw option to assembler if the
>> >> selected device has rmw instructions. I'll send a patch for gcc as
>> well.
>> >>
>> >> Please review the attached patch and give your suggestions.
>> >
>> > Hi,
>> >
>> > I have updated the patch to include -mrmw option to binutils.
>>
>> Where is the patch ?
>>
>> Denis.
>
>
> Sorry, now I have attached the patch.
>
> Regards,
> Pitchumani
>
> gas/ChangeLog
> 2014-03-27 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
>
> * config/tc-avr.c: Add specified_mcu variable for selected mcu.
> (enum options): add OPTION_ISA_RMW for -mrmw option.
> (struct option md_longopts): Add mrmw option.
> (md_show_usage): add -mrmw option description.
> (md_parse_option): Update isa details if -mrmw option specified.
> * doc/c-avr.texi: Add doc for new option -mrmw.
>
> gas/testsuite/ChangeLog
> 2014-02-27 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
>
> * gas/avr/avr.exp: Run new tests for avr target.
> * gas/avr/rmw.d: Add test for additional ISA support.
> * gas/avr/rmw.s: Ditto.
Committed.
Denis.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-03-29 5:55 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-03-03 5:50 [patch,avr] device specific instruction support for avr devices S, Pitchumani
2014-03-24 8:23 ` S, Pitchumani
2014-03-25 17:07 ` Denis Chertykov
2014-03-27 5:07 ` S, Pitchumani
2014-03-29 5:55 ` Denis Chertykov
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