* [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
@ 2016-06-24 16:57 Igor Kudrin
2016-06-28 22:17 ` Cary Coutant
0 siblings, 1 reply; 10+ messages in thread
From: Igor Kudrin @ 2016-06-24 16:57 UTC (permalink / raw)
To: binutils; +Cc: "Cary Coutant"
[-- Attachment #1: Type: text/plain, Size: 998 bytes --]
Hi,
This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
relocations for AArch64 target.
Best regards,
Igor Kudrin
---
gold/ChangeLog
* aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
(rvalue_bit_select): Use Rvalue_bit_select_impl.
* aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
* aarch64.cc (Target_aarch64::Scan::local): Add cases for new
MOVW_UABS_* and MOVW_SABS_* relocations.
(Target_aarch64::Scan::global): Likewise.
(Target_aarch64::Relocate::relocate): Add cases and handlings
for new MOVW_UABS_* and MOVW_SABS_* relocations.
* testsuite/Makefile.am (aarch64_relocs): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_globals.s: New test source file.
* testsuite/aarch64_relocs.s: New test source file.
* testsuite/aarch64_relocs.sh: New test script.
[-- Attachment #2: gold-aarch64-movw-abs-relocs.patch.txt --]
[-- Type: text/plain, Size: 23809 bytes --]
diff --git a/gold/aarch64-reloc-property.cc b/gold/aarch64-reloc-property.cc
index bf521d7..971419d 100644
--- a/gold/aarch64-reloc-property.cc
+++ b/gold/aarch64-reloc-property.cc
@@ -59,17 +59,50 @@ template<>
bool
rvalue_checkup<0, 0>(int64_t) { return true; }
+namespace
+{
+
template<int L, int U>
-uint64_t
-rvalue_bit_select(uint64_t x)
+class Rvalue_bit_select_impl
{
- if (U == 63) return x >> L;
- return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
-}
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
+ }
+};
+
+template<int L>
+class Rvalue_bit_select_impl<L, 63>
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return x >> L;
+ }
+};
template<>
+class Rvalue_bit_select_impl<0, 0>
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return x;
+ }
+};
+
+} // End anonymous namespace.
+
+template<int L, int U>
uint64_t
-rvalue_bit_select<0, 0>(uint64_t x) { return x; }
+rvalue_bit_select(uint64_t x)
+{
+ return Rvalue_bit_select_impl<L, U>::calc(x);
+}
AArch64_reloc_property::AArch64_reloc_property(
unsigned int code,
diff --git a/gold/aarch64-reloc.def b/gold/aarch64-reloc.def
index f33929b..1c482b1 100644
--- a/gold/aarch64-reloc.def
+++ b/gold/aarch64-reloc.def
@@ -40,6 +40,20 @@ ARD(PREL32 , STATIC , DATA , Y, -1, 31,32
ARD(PREL16 , STATIC , DATA , Y, -1, 15,16 , 0,0 , Symbol::RELATIVE_REF , DATA )
// Above is from Table 4-6, Data relocations, 257-262.
+ARD(MOVW_UABS_G0 , STATIC , AARCH64 , Y, 0, 0,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G0_NC , STATIC , AARCH64 , Y, 0, 0,0 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G1 , STATIC , AARCH64 , Y, 0, 0,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G1_NC , STATIC , AARCH64 , Y, 0, 0,0 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G2 , STATIC , AARCH64 , Y, 0, 0,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G2_NC , STATIC , AARCH64 , Y, 0, 0,0 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G3 , STATIC , AARCH64 , Y, 0, 0,0 , 48,63 , Symbol::ABSOLUTE_REF , MOVW )
+// Above is from Table 4-7, Group relocations to create a 16-, 32-, 48-, or 64-bit unsigned data value or address inline.
+
+ARD(MOVW_SABS_G0 , STATIC , AARCH64 , Y, 0, 16,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_SABS_G1 , STATIC , AARCH64 , Y, 0, 32,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_SABS_G2 , STATIC , AARCH64 , Y, 0, 48,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
+// Above is from Table 4-8, Group relocations to create a 16, 32, 48, or 64 bit signed data or offset value inline.
+
ARD(LD_PREL_LO19 , STATIC , AARCH64 , Y, -1, 20,20 , 2,20 , Symbol::RELATIVE_REF , LDST )
ARD(ADR_PREL_LO21 , STATIC , AARCH64 , Y, -1, 20,20 , 0,20 , Symbol::RELATIVE_REF , ADR )
ARD(ADR_PREL_PG_HI21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::RELATIVE_REF , ADRP )
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 75e4177..58a063c 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -6023,6 +6023,23 @@ Target_aarch64<size, big_endian>::Scan::local(
}
break;
+ case elfcpp::R_AARCH64_MOVW_UABS_G0: // 263
+ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: // 264
+ case elfcpp::R_AARCH64_MOVW_UABS_G1: // 265
+ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: // 266
+ case elfcpp::R_AARCH64_MOVW_UABS_G2: // 267
+ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: // 268
+ case elfcpp::R_AARCH64_MOVW_UABS_G3: // 269
+ case elfcpp::R_AARCH64_MOVW_SABS_G0: // 270
+ case elfcpp::R_AARCH64_MOVW_SABS_G1: // 271
+ case elfcpp::R_AARCH64_MOVW_SABS_G2: // 272
+ if (parameters->options().output_is_position_independent())
+ {
+ gold_error(_("%s: unsupported reloc %u in pos independent link."),
+ object->name().c_str(), r_type);
+ }
+ break;
+
case elfcpp::R_AARCH64_LD_PREL_LO19: // 273
case elfcpp::R_AARCH64_ADR_PREL_LO21: // 274
case elfcpp::R_AARCH64_ADR_PREL_PG_HI21: // 275
@@ -6299,6 +6316,23 @@ Target_aarch64<size, big_endian>::Scan::global(
}
break;
+ case elfcpp::R_AARCH64_MOVW_UABS_G0: // 263
+ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: // 264
+ case elfcpp::R_AARCH64_MOVW_UABS_G1: // 265
+ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: // 266
+ case elfcpp::R_AARCH64_MOVW_UABS_G2: // 267
+ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: // 268
+ case elfcpp::R_AARCH64_MOVW_UABS_G3: // 269
+ case elfcpp::R_AARCH64_MOVW_SABS_G0: // 270
+ case elfcpp::R_AARCH64_MOVW_SABS_G1: // 271
+ case elfcpp::R_AARCH64_MOVW_SABS_G2: // 272
+ if (parameters->options().output_is_position_independent())
+ {
+ gold_error(_("%s: unsupported reloc %u in pos independent link."),
+ object->name().c_str(), r_type);
+ }
+ break;
+
case elfcpp::R_AARCH64_LD_PREL_LO19: // 273
case elfcpp::R_AARCH64_ADR_PREL_LO21: // 274
case elfcpp::R_AARCH64_ADR_PREL_PG_HI21: // 275
@@ -6981,6 +7015,23 @@ Target_aarch64<size, big_endian>::Relocate::relocate(
view, object, psymval, addend, address, reloc_property);
break;
+ case elfcpp::R_AARCH64_MOVW_UABS_G0:
+ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC:
+ case elfcpp::R_AARCH64_MOVW_UABS_G1:
+ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC:
+ case elfcpp::R_AARCH64_MOVW_UABS_G2:
+ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC:
+ case elfcpp::R_AARCH64_MOVW_UABS_G3:
+ reloc_status = Reloc::template rela_general<64>(
+ view, object, psymval, addend, reloc_property);
+ break;
+ case elfcpp::R_AARCH64_MOVW_SABS_G0:
+ case elfcpp::R_AARCH64_MOVW_SABS_G1:
+ case elfcpp::R_AARCH64_MOVW_SABS_G2:
+ reloc_status = Reloc::movnz(view, psymval->value(object, addend),
+ reloc_property);
+ break;
+
case elfcpp::R_AARCH64_LD_PREL_LO19:
reloc_status = Reloc::template pcrela_general<32>(
view, object, psymval, addend, address, reloc_property);
diff --git a/gold/testsuite/Makefile.am b/gold/testsuite/Makefile.am
index 01cae9f..8a72f76 100644
--- a/gold/testsuite/Makefile.am
+++ b/gold/testsuite/Makefile.am
@@ -3472,6 +3472,23 @@ MOSTLYCLEANFILES += arm_farcall_thumb_arm arm_farcall_thumb_arm_5t
endif DEFAULT_TARGET_ARM
+if DEFAULT_TARGET_AARCH64
+
+check_SCRIPTS += aarch64_relocs.sh
+check_DATA += aarch64_relocs.stdout
+aarch64_globals.o: aarch64_globals.s
+ $(TEST_AS) -o $@ $<
+aarch64_relocs.o: aarch64_relocs.s
+ $(TEST_AS) -o $@ $<
+aarch64_relocs: aarch64_relocs.o aarch64_globals.o ../ld-new
+ ../ld-new -o $@ aarch64_relocs.o aarch64_globals.o -e0 --emit-relocs
+aarch64_relocs.stdout: aarch64_relocs
+ $(TEST_OBJDUMP) -dr $< > $@
+
+MOSTLYCLEANFILES += aarch64_relocs
+
+endif DEFAULT_TARGET_AARCH64
+
if DEFAULT_TARGET_S390
check_SCRIPTS += split_s390.sh
diff --git a/gold/testsuite/Makefile.in b/gold/testsuite/Makefile.in
index 3771f79..da73903 100644
--- a/gold/testsuite/Makefile.in
+++ b/gold/testsuite/Makefile.in
@@ -882,8 +882,11 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_6m \
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm \
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm_5t
-@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_89 = split_s390.sh
-@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_90 = split_s390_z1.stdout split_s390_z2.stdout split_s390_z3.stdout \
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_89 = aarch64_relocs.sh
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_90 = aarch64_relocs.stdout
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_91 = aarch64_relocs
+@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_92 = split_s390.sh
+@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_93 = split_s390_z1.stdout split_s390_z2.stdout split_s390_z3.stdout \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_z4.stdout split_s390_n1.stdout split_s390_n2.stdout \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_a1.stdout split_s390_a2.stdout split_s390_z1_ns.stdout \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_z2_ns.stdout split_s390_z3_ns.stdout split_s390_z4_ns.stdout \
@@ -895,7 +898,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390x_z4_ns.stdout split_s390x_n1_ns.stdout \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390x_n2_ns.stdout split_s390x_r.stdout
-@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_91 = split_s390_z1 split_s390_z2 split_s390_z3 \
+@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_94 = split_s390_z1 split_s390_z2 split_s390_z3 \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_z4 split_s390_n1 split_s390_n2 split_s390_a1 \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_a2 split_s390_z1_ns split_s390_z2_ns split_s390_z3_ns \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_z4_ns split_s390_n1_ns split_s390_n2_ns split_s390_r \
@@ -904,10 +907,10 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390x_z1_ns split_s390x_z2_ns split_s390x_z3_ns \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390x_z4_ns split_s390x_n1_ns split_s390x_n2_ns split_s390x_r
-@DEFAULT_TARGET_X86_64_TRUE@am__append_92 = *.dwo *.dwp
-@DEFAULT_TARGET_X86_64_TRUE@am__append_93 = dwp_test_1.sh \
+@DEFAULT_TARGET_X86_64_TRUE@am__append_95 = *.dwo *.dwp
+@DEFAULT_TARGET_X86_64_TRUE@am__append_96 = dwp_test_1.sh \
@DEFAULT_TARGET_X86_64_TRUE@ dwp_test_2.sh
-@DEFAULT_TARGET_X86_64_TRUE@am__append_94 = dwp_test_1.stdout \
+@DEFAULT_TARGET_X86_64_TRUE@am__append_97 = dwp_test_1.stdout \
@DEFAULT_TARGET_X86_64_TRUE@ dwp_test_2.stdout
subdir = testsuite
DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/Makefile.am
@@ -2616,7 +2619,7 @@ MOSTLYCLEANFILES = *.so *.syms *.stdout $(am__append_4) \
$(am__append_68) $(am__append_71) $(am__append_73) \
$(am__append_76) $(am__append_79) $(am__append_82) \
$(am__append_85) $(am__append_88) $(am__append_91) \
- $(am__append_92)
+ $(am__append_94) $(am__append_95)
# We will add to these later, for each individual test. Note
# that we add each test under check_SCRIPTS or check_PROGRAMS;
@@ -2626,13 +2629,15 @@ check_SCRIPTS = $(am__append_2) $(am__append_21) $(am__append_27) \
$(am__append_43) $(am__append_47) $(am__append_50) \
$(am__append_66) $(am__append_69) $(am__append_74) \
$(am__append_77) $(am__append_80) $(am__append_83) \
- $(am__append_86) $(am__append_89) $(am__append_93)
+ $(am__append_86) $(am__append_89) $(am__append_92) \
+ $(am__append_96)
check_DATA = $(am__append_3) $(am__append_22) $(am__append_28) \
$(am__append_31) $(am__append_37) $(am__append_40) \
$(am__append_44) $(am__append_48) $(am__append_51) \
$(am__append_67) $(am__append_70) $(am__append_75) \
$(am__append_78) $(am__append_81) $(am__append_84) \
- $(am__append_87) $(am__append_90) $(am__append_94)
+ $(am__append_87) $(am__append_90) $(am__append_93) \
+ $(am__append_97)
BUILT_SOURCES = $(am__append_34)
TESTS = $(check_SCRIPTS) $(check_PROGRAMS)
@@ -4697,6 +4702,8 @@ arm_farcall_thumb_thumb.sh.log: arm_farcall_thumb_thumb.sh
@p='arm_farcall_thumb_thumb.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
arm_farcall_thumb_arm.sh.log: arm_farcall_thumb_arm.sh
@p='arm_farcall_thumb_arm.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
+aarch64_relocs.sh.log: aarch64_relocs.sh
+ @p='aarch64_relocs.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
split_s390.sh.log: split_s390.sh
@p='split_s390.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
dwp_test_1.sh.log: dwp_test_1.sh
@@ -7067,6 +7074,14 @@ uninstall-am:
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@arm_farcall_thumb_arm_5t.o: arm_farcall_thumb_arm.s
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -march=armv5t -o $@ $<
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_globals.o: aarch64_globals.s
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $<
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_relocs.o: aarch64_relocs.s
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $<
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_relocs: aarch64_relocs.o aarch64_globals.o ../ld-new
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -o $@ aarch64_relocs.o aarch64_globals.o -e0 --emit-relocs
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_relocs.stdout: aarch64_relocs
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -dr $< > $@
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@split_s390_1_z1.o: split_s390_1_z1.s
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -m31 -o $@ $<
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@split_s390_1_z2.o: split_s390_1_z2.s
diff --git a/gold/testsuite/aarch64_globals.s b/gold/testsuite/aarch64_globals.s
new file mode 100644
index 0000000..f6a1897
--- /dev/null
+++ b/gold/testsuite/aarch64_globals.s
@@ -0,0 +1,11 @@
+.global abs_0x1234
+abs_0x1234=0x1234
+
+.global abs_0x11000
+abs_0x11000=0x11000
+
+.global abs_0x45000
+abs_0x45000=0x45000
+
+.global abs_0x3600010000
+abs_0x3600010000=0x3600010000
diff --git a/gold/testsuite/aarch64_relocs.s b/gold/testsuite/aarch64_relocs.s
new file mode 100644
index 0000000..0aa3d68
--- /dev/null
+++ b/gold/testsuite/aarch64_relocs.s
@@ -0,0 +1,45 @@
+.text
+
+test_R_AARCH64_MOVW_UABS_G0:
+ movz x4, :abs_g0:abs_0x1234
+ movz x4, :abs_g0:abs_0x1234 + 4
+
+test_R_AARCH64_MOVW_UABS_G0_NC:
+ movz x4, :abs_g0_nc:abs_0x1234
+ movz x4, :abs_g0_nc:abs_0x1234 + 0x45000
+
+test_R_AARCH64_MOVW_UABS_G1:
+ movz x4, :abs_g1:abs_0x1234 - 4
+ movz x4, :abs_g1:abs_0x11000
+ movz x4, :abs_g1:abs_0x45000 + 0x20010
+
+test_R_AARCH64_MOVW_UABS_G1_NC:
+ movz x4, :abs_g1_nc:abs_0x1234 - 4
+ movz x4, :abs_g1_nc:abs_0x11000
+ movz x4, :abs_g1_nc:abs_0x45000 + 0x100020010
+
+test_R_AARCH64_MOVW_UABS_G2:
+ movz x4, :abs_g2:abs_0x45000 + 0x20010
+ movz x4, :abs_g2:abs_0x3600010000 + 0x100020010
+
+test_R_AARCH64_MOVW_UABS_G2_NC:
+ movz x4, :abs_g2_nc:abs_0x45000 + 0x20010
+ movz x4, :abs_g2_nc:abs_0x3600010000 + 0x3000100020010
+
+test_R_AARCH64_MOVW_UABS_G3:
+ movz x4, :abs_g3:abs_0x3600010000 + 0x100020010
+ movz x4, :abs_g3:abs_0x3600010000 + 0x3000100020010
+
+test_R_AARCH64_MOVW_SABS_G0:
+ movz x4, :abs_g0_s:abs_0x1234 + 4
+ movz x4, :abs_g0_s:abs_0x1234 - 0x2345
+
+test_R_AARCH64_MOVW_SABS_G1:
+ movz x4, :abs_g1_s:abs_0x1234 - 0x2345
+ movz x4, :abs_g1_s:abs_0x45000 + 0x20010
+ movz x4, :abs_g1_s:abs_0x45000 - 0x56000
+
+test_R_AARCH64_MOVW_SABS_G2:
+ movz x4, :abs_g2_s:abs_0x45000 + 0x20010
+ movz x4, :abs_g2_s:abs_0x3600010000 + 0x100020010
+ movz x4, :abs_g2_s:abs_0x3600010000 - 0x4400010000
diff --git a/gold/testsuite/aarch64_relocs.sh b/gold/testsuite/aarch64_relocs.sh
new file mode 100755
index 0000000..f23c58f
--- /dev/null
+++ b/gold/testsuite/aarch64_relocs.sh
@@ -0,0 +1,110 @@
+#!/bin/sh
+
+# aarch64_relocs.sh -- test AArch64 relocations.
+
+# Copyright (C) 2016 Free Software Foundation, Inc.
+# Written by Igor Kudrin <ikudrin@accesssoftek.com>
+
+# This file is part of gold.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+check()
+{
+ file=$1
+ lbl=$2
+ line=$3
+ pattern=$4
+
+ found=`grep "<$lbl>:" $file`
+ if test -z "$found"; then
+ echo "Label $lbl not found."
+ exit 1
+ fi
+
+ match_pattern=`grep "<$lbl>:" -A$line $file | tail -n 1 | grep -e "$pattern"`
+ if test -z "$match_pattern"; then
+ echo "Expected pattern did not found in line $line after label $lbl:"
+ echo " $pattern"
+ echo ""
+ echo "Extract:"
+ grep "<$lbl>:" -A$line $file
+ echo ""
+ echo "Actual output below:"
+ cat "$file"
+ exit 1
+ fi
+}
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 1 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 2 "\<R_AARCH64_MOVW_UABS_G0[[:space:]]\+abs_0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1238\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 4 "\<R_AARCH64_MOVW_UABS_G0[[:space:]]\+abs_0x1234+0x4\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 1 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 2 "\<R_AARCH64_MOVW_UABS_G0_NC[[:space:]]\+abs_0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x6234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 4 "\<R_AARCH64_MOVW_UABS_G0_NC[[:space:]]\+abs_0x1234+0x45000\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #16\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 2 "\<R_AARCH64_MOVW_UABS_G1[[:space:]]\+abs_0x1234-0x4\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x10000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 4 "\<R_AARCH64_MOVW_UABS_G1[[:space:]]\+abs_0x11000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x60000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 6 "\<R_AARCH64_MOVW_UABS_G1[[:space:]]\+abs_0x45000+0x20010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #16\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 2 "\<R_AARCH64_MOVW_UABS_G1_NC[[:space:]]\+abs_0x1234-0x4\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x10000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 4 "\<R_AARCH64_MOVW_UABS_G1_NC[[:space:]]\+abs_0x11000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x60000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 6 "\<R_AARCH64_MOVW_UABS_G1_NC[[:space:]]\+abs_0x45000+0x100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #32\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 2 "\<R_AARCH64_MOVW_UABS_G2[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3700000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 4 "\<R_AARCH64_MOVW_UABS_G2[[:space:]]\+abs_0x3600010000+0x100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #32\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 2 "\<R_AARCH64_MOVW_UABS_G2_NC[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3700000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 4 "\<R_AARCH64_MOVW_UABS_G2_NC[[:space:]]\+abs_0x3600010000+0x3000100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #48\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 2 "\<R_AARCH64_MOVW_UABS_G3[[:space:]]\+abs_0x3600010000+0x100020010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3000000000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 4 "\<R_AARCH64_MOVW_UABS_G3[[:space:]]\+abs_0x3600010000+0x3000100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 1 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1238\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 2 "\<R_AARCH64_MOVW_SABS_G0[[:space:]]\+abs_0x1234+0x4\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0xffffffffffffeeef\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 4 "\<R_AARCH64_MOVW_SABS_G0[[:space:]]\+abs_0x1234-0x2345\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 1 "\<movn[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #16\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 2 "\<R_AARCH64_MOVW_SABS_G1[[:space:]]\+abs_0x1234-0x2345\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x60000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 4 "\<R_AARCH64_MOVW_SABS_G1[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0xfffffffffffeffff\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 6 "\<R_AARCH64_MOVW_SABS_G1[[:space:]]\+abs_0x45000-0x56000\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #32\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 2 "\<R_AARCH64_MOVW_SABS_G2[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3700000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 4 "\<R_AARCH64_MOVW_SABS_G2[[:space:]]\+abs_0x3600010000+0x100020010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0xfffffff2ffffffff\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 6 "\<R_AARCH64_MOVW_SABS_G2[[:space:]]\+abs_0x3600010000-0x4400010000\b"
+
+exit 0
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-06-24 16:57 [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations Igor Kudrin
@ 2016-06-28 22:17 ` Cary Coutant
2016-06-28 22:18 ` Cary Coutant
0 siblings, 1 reply; 10+ messages in thread
From: Cary Coutant @ 2016-06-28 22:17 UTC (permalink / raw)
To: Igor Kudrin; +Cc: binutils
> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
> relocations for AArch64 target.
>
> Best regards,
> Igor Kudrin
>
> ---
> gold/ChangeLog
>
> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
> (rvalue_bit_select): Use Rvalue_bit_select_impl.
> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
> MOVW_UABS_* and MOVW_SABS_* relocations.
> (Target_aarch64::Scan::global): Likewise.
> (Target_aarch64::Relocate::relocate): Add cases and handlings
> for new MOVW_UABS_* and MOVW_SABS_* relocations.
> * testsuite/Makefile.am (aarch64_relocs): New test.
> * testsuite/Makefile.in: Regenerate.
> * testsuite/aarch64_globals.s: New test source file.
> * testsuite/aarch64_relocs.s: New test source file.
> * testsuite/aarch64_relocs.sh: New test script.
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
+ }
I know this was the same before your patch, but I'd prefer using
"1ULL" instead of the C-style cast.
Han, can you take a look at this patch?
-cary
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-06-28 22:17 ` Cary Coutant
@ 2016-06-28 22:18 ` Cary Coutant
2016-06-29 2:48 ` Han Shen
0 siblings, 1 reply; 10+ messages in thread
From: Cary Coutant @ 2016-06-28 22:18 UTC (permalink / raw)
To: Igor Kudrin, Han Shen; +Cc: binutils
[+shenhan this time]
On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>> relocations for AArch64 target.
>>
>> Best regards,
>> Igor Kudrin
>>
>> ---
>> gold/ChangeLog
>>
>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>> MOVW_UABS_* and MOVW_SABS_* relocations.
>> (Target_aarch64::Scan::global): Likewise.
>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>> * testsuite/Makefile.am (aarch64_relocs): New test.
>> * testsuite/Makefile.in: Regenerate.
>> * testsuite/aarch64_globals.s: New test source file.
>> * testsuite/aarch64_relocs.s: New test source file.
>> * testsuite/aarch64_relocs.sh: New test script.
>
> + static uint64_t
> + calc(uint64_t x)
> + {
> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
> + }
>
> I know this was the same before your patch, but I'd prefer using
> "1ULL" instead of the C-style cast.
>
> Han, can you take a look at this patch?
>
> -cary
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-06-28 22:18 ` Cary Coutant
@ 2016-06-29 2:48 ` Han Shen
2016-06-30 17:14 ` [PATCH v2][gold] " Igor Kudrin
0 siblings, 1 reply; 10+ messages in thread
From: Han Shen @ 2016-06-29 2:48 UTC (permalink / raw)
To: Cary Coutant; +Cc: Igor Kudrin, binutils
Hi Igor, could you add comments to the specialization that L=U=0 means
no check, otherwise readers might mistake it for selecting LSB. (The
origin code should have added it.)
+class Rvalue_bit_select_impl<0, 0>
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return x;
+ }
+};
Also in the below segment - "rela_general<64>" should be
"rela_general<32>", cause we are patching a 32 bit mov insn.
+ case elfcpp::R_AARCH64_MOVW_UABS_G3:
+ reloc_status = Reloc::template rela_general<64>(
+ view, object, psymval, addend, reloc_property);
+ break;
Thanks,
Han
On Tue, Jun 28, 2016 at 3:18 PM, Cary Coutant <ccoutant@gmail.com> wrote:
> [+shenhan this time]
>
> On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>>> relocations for AArch64 target.
>>>
>>> Best regards,
>>> Igor Kudrin
>>>
>>> ---
>>> gold/ChangeLog
>>>
>>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>>> MOVW_UABS_* and MOVW_SABS_* relocations.
>>> (Target_aarch64::Scan::global): Likewise.
>>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>>> * testsuite/Makefile.am (aarch64_relocs): New test.
>>> * testsuite/Makefile.in: Regenerate.
>>> * testsuite/aarch64_globals.s: New test source file.
>>> * testsuite/aarch64_relocs.s: New test source file.
>>> * testsuite/aarch64_relocs.sh: New test script.
>>
>> + static uint64_t
>> + calc(uint64_t x)
>> + {
>> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
>> + }
>>
>> I know this was the same before your patch, but I'd prefer using
>> "1ULL" instead of the C-style cast.
>>
>> Han, can you take a look at this patch?
>>
>> -cary
--
Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-06-29 2:48 ` Han Shen
@ 2016-06-30 17:14 ` Igor Kudrin
2016-07-06 16:47 ` Han Shen
0 siblings, 1 reply; 10+ messages in thread
From: Igor Kudrin @ 2016-06-30 17:14 UTC (permalink / raw)
To: Han Shen, Cary Coutant; +Cc: binutils
[-- Attachment #1: Type: text/plain, Size: 3794 bytes --]
Hi Cary, Han,
Thank you very much for the review comments!
Here is an updated patch with the following changes:
* Rebased to the top.
* Changed "(uint64_t)1" to "1ULL".
* Added a comment for "Rvalue_bit_select_impl<0, 0>".
* Changed "rela_general<64>" to "rela_general<32>".
Best regards,
Igor Kudrin
---
gold/ChangeLog
* aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
(rvalue_bit_select): Use Rvalue_bit_select_impl.
* aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
* aarch64.cc (Target_aarch64::Scan::local): Add cases for new
MOVW_UABS_* and MOVW_SABS_* relocations.
(Target_aarch64::Scan::global): Likewise.
(Target_aarch64::Relocate::relocate): Add cases and handlings
for new MOVW_UABS_* and MOVW_SABS_* relocations.
* testsuite/Makefile.am (aarch64_relocs): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_globals.s: New test source file.
* testsuite/aarch64_relocs.s: Likewise.
* testsuite/aarch64_relocs.sh: New test script.
________________________________________
From: Han Shen <shenhan@google.com>
Sent: Wednesday, June 29, 2016 8:48 AM
To: Cary Coutant
Cc: Igor Kudrin; binutils@sourceware.org
Subject: Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
Hi Igor, could you add comments to the specialization that L=U=0 means
no check, otherwise readers might mistake it for selecting LSB. (The
origin code should have added it.)
+class Rvalue_bit_select_impl<0, 0>
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return x;
+ }
+};
Also in the below segment - "rela_general<64>" should be
"rela_general<32>", cause we are patching a 32 bit mov insn.
+ case elfcpp::R_AARCH64_MOVW_UABS_G3:
+ reloc_status = Reloc::template rela_general<64>(
+ view, object, psymval, addend, reloc_property);
+ break;
Thanks,
Han
On Tue, Jun 28, 2016 at 3:18 PM, Cary Coutant <ccoutant@gmail.com> wrote:
> [+shenhan this time]
>
> On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>>> relocations for AArch64 target.
>>>
>>> Best regards,
>>> Igor Kudrin
>>>
>>> ---
>>> gold/ChangeLog
>>>
>>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>>> MOVW_UABS_* and MOVW_SABS_* relocations.
>>> (Target_aarch64::Scan::global): Likewise.
>>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>>> * testsuite/Makefile.am (aarch64_relocs): New test.
>>> * testsuite/Makefile.in: Regenerate.
>>> * testsuite/aarch64_globals.s: New test source file.
>>> * testsuite/aarch64_relocs.s: New test source file.
>>> * testsuite/aarch64_relocs.sh: New test script.
>>
>> + static uint64_t
>> + calc(uint64_t x)
>> + {
>> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
>> + }
>>
>> I know this was the same before your patch, but I'd prefer using
>> "1ULL" instead of the C-style cast.
>>
>> Han, can you take a look at this patch?
>>
>> -cary
--
Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
[-- Attachment #2: gold-aarch64-movw-abs-relocs-2.patch.txt --]
[-- Type: text/plain, Size: 20892 bytes --]
diff --git a/gold/aarch64-reloc-property.cc b/gold/aarch64-reloc-property.cc
index bf521d7..d0dee40 100644
--- a/gold/aarch64-reloc-property.cc
+++ b/gold/aarch64-reloc-property.cc
@@ -59,18 +59,52 @@ template<>
bool
rvalue_checkup<0, 0>(int64_t) { return true; }
+namespace
+{
+
+template<int L, int U>
+class Rvalue_bit_select_impl
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return (x & ((1ULL << (U+1)) - 1)) >> L;
+ }
+};
+
+template<int L>
+class Rvalue_bit_select_impl<L, 63>
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return x >> L;
+ }
+};
+
+// By our convention, L=U=0 means that the whole value should be retrieved.
+template<>
+class Rvalue_bit_select_impl<0, 0>
+{
+public:
+ static uint64_t
+ calc(uint64_t x)
+ {
+ return x;
+ }
+};
+
+} // End anonymous namespace.
+
template<int L, int U>
uint64_t
rvalue_bit_select(uint64_t x)
{
- if (U == 63) return x >> L;
- return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
+ return Rvalue_bit_select_impl<L, U>::calc(x);
}
-template<>
-uint64_t
-rvalue_bit_select<0, 0>(uint64_t x) { return x; }
-
AArch64_reloc_property::AArch64_reloc_property(
unsigned int code,
const char* name,
diff --git a/gold/aarch64-reloc.def b/gold/aarch64-reloc.def
index 763d372..6d2981d 100644
--- a/gold/aarch64-reloc.def
+++ b/gold/aarch64-reloc.def
@@ -43,6 +43,20 @@ ARD(PREL32 , STATIC , DATA , Y, -1, 31,32
ARD(PREL16 , STATIC , DATA , Y, -1, 15,16 , 0,0 , Symbol::RELATIVE_REF , DATA )
// Above is from Table 4-6, Data relocations, 257-262.
+ARD(MOVW_UABS_G0 , STATIC , AARCH64 , Y, 0, 0,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G0_NC , STATIC , AARCH64 , Y, 0, 0,0 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G1 , STATIC , AARCH64 , Y, 0, 0,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G1_NC , STATIC , AARCH64 , Y, 0, 0,0 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G2 , STATIC , AARCH64 , Y, 0, 0,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G2_NC , STATIC , AARCH64 , Y, 0, 0,0 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_UABS_G3 , STATIC , AARCH64 , Y, 0, 0,0 , 48,63 , Symbol::ABSOLUTE_REF , MOVW )
+// Above is from Table 4-7, Group relocations to create a 16-, 32-, 48-, or 64-bit unsigned data value or address inline.
+
+ARD(MOVW_SABS_G0 , STATIC , AARCH64 , Y, 0, 16,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_SABS_G1 , STATIC , AARCH64 , Y, 0, 32,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
+ARD(MOVW_SABS_G2 , STATIC , AARCH64 , Y, 0, 48,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
+// Above is from Table 4-8, Group relocations to create a 16, 32, 48, or 64 bit signed data or offset value inline.
+
ARD(LD_PREL_LO19 , STATIC , AARCH64 , Y, -1, 20,20 , 2,20 , Symbol::RELATIVE_REF , LDST )
ARD(ADR_PREL_LO21 , STATIC , AARCH64 , Y, -1, 20,20 , 0,20 , Symbol::RELATIVE_REF , ADR )
ARD(ADR_PREL_PG_HI21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::RELATIVE_REF , ADRP )
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index db9f06c..ab7e563 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -6026,6 +6026,23 @@ Target_aarch64<size, big_endian>::Scan::local(
}
break;
+ case elfcpp::R_AARCH64_MOVW_UABS_G0: // 263
+ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: // 264
+ case elfcpp::R_AARCH64_MOVW_UABS_G1: // 265
+ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: // 266
+ case elfcpp::R_AARCH64_MOVW_UABS_G2: // 267
+ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: // 268
+ case elfcpp::R_AARCH64_MOVW_UABS_G3: // 269
+ case elfcpp::R_AARCH64_MOVW_SABS_G0: // 270
+ case elfcpp::R_AARCH64_MOVW_SABS_G1: // 271
+ case elfcpp::R_AARCH64_MOVW_SABS_G2: // 272
+ if (parameters->options().output_is_position_independent())
+ {
+ gold_error(_("%s: unsupported reloc %u in pos independent link."),
+ object->name().c_str(), r_type);
+ }
+ break;
+
case elfcpp::R_AARCH64_LD_PREL_LO19: // 273
case elfcpp::R_AARCH64_ADR_PREL_LO21: // 274
case elfcpp::R_AARCH64_ADR_PREL_PG_HI21: // 275
@@ -6311,6 +6328,23 @@ Target_aarch64<size, big_endian>::Scan::global(
}
break;
+ case elfcpp::R_AARCH64_MOVW_UABS_G0: // 263
+ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: // 264
+ case elfcpp::R_AARCH64_MOVW_UABS_G1: // 265
+ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: // 266
+ case elfcpp::R_AARCH64_MOVW_UABS_G2: // 267
+ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: // 268
+ case elfcpp::R_AARCH64_MOVW_UABS_G3: // 269
+ case elfcpp::R_AARCH64_MOVW_SABS_G0: // 270
+ case elfcpp::R_AARCH64_MOVW_SABS_G1: // 271
+ case elfcpp::R_AARCH64_MOVW_SABS_G2: // 272
+ if (parameters->options().output_is_position_independent())
+ {
+ gold_error(_("%s: unsupported reloc %u in pos independent link."),
+ object->name().c_str(), r_type);
+ }
+ break;
+
case elfcpp::R_AARCH64_LD_PREL_LO19: // 273
case elfcpp::R_AARCH64_ADR_PREL_LO21: // 274
case elfcpp::R_AARCH64_ADR_PREL_PG_HI21: // 275
@@ -6993,6 +7027,23 @@ Target_aarch64<size, big_endian>::Relocate::relocate(
view, object, psymval, addend, address, reloc_property);
break;
+ case elfcpp::R_AARCH64_MOVW_UABS_G0:
+ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC:
+ case elfcpp::R_AARCH64_MOVW_UABS_G1:
+ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC:
+ case elfcpp::R_AARCH64_MOVW_UABS_G2:
+ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC:
+ case elfcpp::R_AARCH64_MOVW_UABS_G3:
+ reloc_status = Reloc::template rela_general<32>(
+ view, object, psymval, addend, reloc_property);
+ break;
+ case elfcpp::R_AARCH64_MOVW_SABS_G0:
+ case elfcpp::R_AARCH64_MOVW_SABS_G1:
+ case elfcpp::R_AARCH64_MOVW_SABS_G2:
+ reloc_status = Reloc::movnz(view, psymval->value(object, addend),
+ reloc_property);
+ break;
+
case elfcpp::R_AARCH64_LD_PREL_LO19:
reloc_status = Reloc::template pcrela_general<32>(
view, object, psymval, addend, address, reloc_property);
diff --git a/gold/testsuite/Makefile.am b/gold/testsuite/Makefile.am
index c8d3093..39f9e9e 100644
--- a/gold/testsuite/Makefile.am
+++ b/gold/testsuite/Makefile.am
@@ -3619,6 +3619,19 @@ aarch64_reloc_none.stdout: aarch64_reloc_none
MOSTLYCLEANFILES += aarch64_reloc_none
+check_SCRIPTS += aarch64_relocs.sh
+check_DATA += aarch64_relocs.stdout
+aarch64_globals.o: aarch64_globals.s
+ $(TEST_AS) -o $@ $<
+aarch64_relocs.o: aarch64_relocs.s
+ $(TEST_AS) -o $@ $<
+aarch64_relocs: aarch64_relocs.o aarch64_globals.o ../ld-new
+ ../ld-new -o $@ aarch64_relocs.o aarch64_globals.o -e0 --emit-relocs
+aarch64_relocs.stdout: aarch64_relocs
+ $(TEST_OBJDUMP) -dr $< > $@
+
+MOSTLYCLEANFILES += aarch64_relocs
+
endif DEFAULT_TARGET_AARCH64
if DEFAULT_TARGET_S390
diff --git a/gold/testsuite/Makefile.in b/gold/testsuite/Makefile.in
index 4185287..bd58d13 100644
--- a/gold/testsuite/Makefile.in
+++ b/gold/testsuite/Makefile.in
@@ -909,9 +909,12 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_thumb_6m \
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm \
@DEFAULT_TARGET_ARM_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ arm_farcall_thumb_arm_5t
-@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_94 = aarch64_reloc_none.sh
-@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_95 = aarch64_reloc_none.stdout
-@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_96 = aarch64_reloc_none
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_94 = aarch64_reloc_none.sh \
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ aarch64_relocs.sh
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_95 = aarch64_reloc_none.stdout \
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ aarch64_relocs.stdout
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_96 = aarch64_reloc_none \
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ aarch64_relocs
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_97 = split_s390.sh
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@am__append_98 = split_s390_z1.stdout split_s390_z2.stdout split_s390_z3.stdout \
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ split_s390_z4.stdout split_s390_n1.stdout split_s390_n2.stdout \
@@ -5148,6 +5151,8 @@ arm_farcall_thumb_arm.sh.log: arm_farcall_thumb_arm.sh
@p='arm_farcall_thumb_arm.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
aarch64_reloc_none.sh.log: aarch64_reloc_none.sh
@p='aarch64_reloc_none.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
+aarch64_relocs.sh.log: aarch64_relocs.sh
+ @p='aarch64_relocs.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
split_s390.sh.log: split_s390.sh
@p='split_s390.sh'; $(am__check_pre) $(LOG_COMPILE) "$$tst" $(am__check_post)
dwp_test_1.sh.log: dwp_test_1.sh
@@ -7587,6 +7592,14 @@ uninstall-am:
@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -o $@ aarch64_reloc_none.o --gc-sections
@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_reloc_none.stdout: aarch64_reloc_none
@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_NM) $< > $@
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_globals.o: aarch64_globals.s
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $<
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_relocs.o: aarch64_relocs.s
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -o $@ $<
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_relocs: aarch64_relocs.o aarch64_globals.o ../ld-new
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ ../ld-new -o $@ aarch64_relocs.o aarch64_globals.o -e0 --emit-relocs
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@aarch64_relocs.stdout: aarch64_relocs
+@DEFAULT_TARGET_AARCH64_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_OBJDUMP) -dr $< > $@
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@split_s390_1_z1.o: split_s390_1_z1.s
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@ $(TEST_AS) -m31 -o $@ $<
@DEFAULT_TARGET_S390_TRUE@@NATIVE_OR_CROSS_LINKER_TRUE@split_s390_1_z2.o: split_s390_1_z2.s
diff --git a/gold/testsuite/aarch64_globals.s b/gold/testsuite/aarch64_globals.s
new file mode 100644
index 0000000..f6a1897
--- /dev/null
+++ b/gold/testsuite/aarch64_globals.s
@@ -0,0 +1,11 @@
+.global abs_0x1234
+abs_0x1234=0x1234
+
+.global abs_0x11000
+abs_0x11000=0x11000
+
+.global abs_0x45000
+abs_0x45000=0x45000
+
+.global abs_0x3600010000
+abs_0x3600010000=0x3600010000
diff --git a/gold/testsuite/aarch64_relocs.s b/gold/testsuite/aarch64_relocs.s
new file mode 100644
index 0000000..0aa3d68
--- /dev/null
+++ b/gold/testsuite/aarch64_relocs.s
@@ -0,0 +1,45 @@
+.text
+
+test_R_AARCH64_MOVW_UABS_G0:
+ movz x4, :abs_g0:abs_0x1234
+ movz x4, :abs_g0:abs_0x1234 + 4
+
+test_R_AARCH64_MOVW_UABS_G0_NC:
+ movz x4, :abs_g0_nc:abs_0x1234
+ movz x4, :abs_g0_nc:abs_0x1234 + 0x45000
+
+test_R_AARCH64_MOVW_UABS_G1:
+ movz x4, :abs_g1:abs_0x1234 - 4
+ movz x4, :abs_g1:abs_0x11000
+ movz x4, :abs_g1:abs_0x45000 + 0x20010
+
+test_R_AARCH64_MOVW_UABS_G1_NC:
+ movz x4, :abs_g1_nc:abs_0x1234 - 4
+ movz x4, :abs_g1_nc:abs_0x11000
+ movz x4, :abs_g1_nc:abs_0x45000 + 0x100020010
+
+test_R_AARCH64_MOVW_UABS_G2:
+ movz x4, :abs_g2:abs_0x45000 + 0x20010
+ movz x4, :abs_g2:abs_0x3600010000 + 0x100020010
+
+test_R_AARCH64_MOVW_UABS_G2_NC:
+ movz x4, :abs_g2_nc:abs_0x45000 + 0x20010
+ movz x4, :abs_g2_nc:abs_0x3600010000 + 0x3000100020010
+
+test_R_AARCH64_MOVW_UABS_G3:
+ movz x4, :abs_g3:abs_0x3600010000 + 0x100020010
+ movz x4, :abs_g3:abs_0x3600010000 + 0x3000100020010
+
+test_R_AARCH64_MOVW_SABS_G0:
+ movz x4, :abs_g0_s:abs_0x1234 + 4
+ movz x4, :abs_g0_s:abs_0x1234 - 0x2345
+
+test_R_AARCH64_MOVW_SABS_G1:
+ movz x4, :abs_g1_s:abs_0x1234 - 0x2345
+ movz x4, :abs_g1_s:abs_0x45000 + 0x20010
+ movz x4, :abs_g1_s:abs_0x45000 - 0x56000
+
+test_R_AARCH64_MOVW_SABS_G2:
+ movz x4, :abs_g2_s:abs_0x45000 + 0x20010
+ movz x4, :abs_g2_s:abs_0x3600010000 + 0x100020010
+ movz x4, :abs_g2_s:abs_0x3600010000 - 0x4400010000
diff --git a/gold/testsuite/aarch64_relocs.sh b/gold/testsuite/aarch64_relocs.sh
new file mode 100755
index 0000000..f23c58f
--- /dev/null
+++ b/gold/testsuite/aarch64_relocs.sh
@@ -0,0 +1,110 @@
+#!/bin/sh
+
+# aarch64_relocs.sh -- test AArch64 relocations.
+
+# Copyright (C) 2016 Free Software Foundation, Inc.
+# Written by Igor Kudrin <ikudrin@accesssoftek.com>
+
+# This file is part of gold.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+check()
+{
+ file=$1
+ lbl=$2
+ line=$3
+ pattern=$4
+
+ found=`grep "<$lbl>:" $file`
+ if test -z "$found"; then
+ echo "Label $lbl not found."
+ exit 1
+ fi
+
+ match_pattern=`grep "<$lbl>:" -A$line $file | tail -n 1 | grep -e "$pattern"`
+ if test -z "$match_pattern"; then
+ echo "Expected pattern did not found in line $line after label $lbl:"
+ echo " $pattern"
+ echo ""
+ echo "Extract:"
+ grep "<$lbl>:" -A$line $file
+ echo ""
+ echo "Actual output below:"
+ cat "$file"
+ exit 1
+ fi
+}
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 1 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 2 "\<R_AARCH64_MOVW_UABS_G0[[:space:]]\+abs_0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1238\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0" 4 "\<R_AARCH64_MOVW_UABS_G0[[:space:]]\+abs_0x1234+0x4\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 1 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 2 "\<R_AARCH64_MOVW_UABS_G0_NC[[:space:]]\+abs_0x1234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x6234\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G0_NC" 4 "\<R_AARCH64_MOVW_UABS_G0_NC[[:space:]]\+abs_0x1234+0x45000\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #16\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 2 "\<R_AARCH64_MOVW_UABS_G1[[:space:]]\+abs_0x1234-0x4\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x10000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 4 "\<R_AARCH64_MOVW_UABS_G1[[:space:]]\+abs_0x11000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x60000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1" 6 "\<R_AARCH64_MOVW_UABS_G1[[:space:]]\+abs_0x45000+0x20010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #16\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 2 "\<R_AARCH64_MOVW_UABS_G1_NC[[:space:]]\+abs_0x1234-0x4\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x10000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 4 "\<R_AARCH64_MOVW_UABS_G1_NC[[:space:]]\+abs_0x11000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x60000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G1_NC" 6 "\<R_AARCH64_MOVW_UABS_G1_NC[[:space:]]\+abs_0x45000+0x100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #32\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 2 "\<R_AARCH64_MOVW_UABS_G2[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3700000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2" 4 "\<R_AARCH64_MOVW_UABS_G2[[:space:]]\+abs_0x3600010000+0x100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #32\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 2 "\<R_AARCH64_MOVW_UABS_G2_NC[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3700000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G2_NC" 4 "\<R_AARCH64_MOVW_UABS_G2_NC[[:space:]]\+abs_0x3600010000+0x3000100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #48\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 2 "\<R_AARCH64_MOVW_UABS_G3[[:space:]]\+abs_0x3600010000+0x100020010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3000000000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_UABS_G3" 4 "\<R_AARCH64_MOVW_UABS_G3[[:space:]]\+abs_0x3600010000+0x3000100020010\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 1 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x1238\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 2 "\<R_AARCH64_MOVW_SABS_G0[[:space:]]\+abs_0x1234+0x4\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0xffffffffffffeeef\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G0" 4 "\<R_AARCH64_MOVW_SABS_G0[[:space:]]\+abs_0x1234-0x2345\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 1 "\<movn[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #16\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 2 "\<R_AARCH64_MOVW_SABS_G1[[:space:]]\+abs_0x1234-0x2345\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x60000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 4 "\<R_AARCH64_MOVW_SABS_G1[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0xfffffffffffeffff\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G1" 6 "\<R_AARCH64_MOVW_SABS_G1[[:space:]]\+abs_0x45000-0x56000\b"
+
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 1 "\<movz[[:space:]]\+x4,[[:space:]]\+#0x0, lsl #32\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 2 "\<R_AARCH64_MOVW_SABS_G2[[:space:]]\+abs_0x45000+0x20010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 3 "\<mov[[:space:]]\+x4,[[:space:]]\+#0x3700000000\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 4 "\<R_AARCH64_MOVW_SABS_G2[[:space:]]\+abs_0x3600010000+0x100020010\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 5 "\<mov[[:space:]]\+x4,[[:space:]]\+#0xfffffff2ffffffff\b"
+check "aarch64_relocs.stdout" "test_R_AARCH64_MOVW_SABS_G2" 6 "\<R_AARCH64_MOVW_SABS_G2[[:space:]]\+abs_0x3600010000-0x4400010000\b"
+
+exit 0
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-06-30 17:14 ` [PATCH v2][gold] " Igor Kudrin
@ 2016-07-06 16:47 ` Han Shen
2016-07-25 10:30 ` Igor Kudrin
0 siblings, 1 reply; 10+ messages in thread
From: Han Shen @ 2016-07-06 16:47 UTC (permalink / raw)
To: Igor Kudrin; +Cc: Cary Coutant, binutils
Thanks, Igor, LGTM.
Han
On Thu, Jun 30, 2016 at 10:14 AM, Igor Kudrin <ikudrin@accesssoftek.com> wrote:
> Hi Cary, Han,
>
> Thank you very much for the review comments!
>
> Here is an updated patch with the following changes:
> * Rebased to the top.
> * Changed "(uint64_t)1" to "1ULL".
> * Added a comment for "Rvalue_bit_select_impl<0, 0>".
> * Changed "rela_general<64>" to "rela_general<32>".
>
> Best regards,
> Igor Kudrin
>
> ---
> gold/ChangeLog
>
> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
> (rvalue_bit_select): Use Rvalue_bit_select_impl.
> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
> MOVW_UABS_* and MOVW_SABS_* relocations.
> (Target_aarch64::Scan::global): Likewise.
> (Target_aarch64::Relocate::relocate): Add cases and handlings
> for new MOVW_UABS_* and MOVW_SABS_* relocations.
> * testsuite/Makefile.am (aarch64_relocs): New test.
> * testsuite/Makefile.in: Regenerate.
> * testsuite/aarch64_globals.s: New test source file.
> * testsuite/aarch64_relocs.s: Likewise.
> * testsuite/aarch64_relocs.sh: New test script.
>
> ________________________________________
> From: Han Shen <shenhan@google.com>
> Sent: Wednesday, June 29, 2016 8:48 AM
> To: Cary Coutant
> Cc: Igor Kudrin; binutils@sourceware.org
> Subject: Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
>
> Hi Igor, could you add comments to the specialization that L=U=0 means
> no check, otherwise readers might mistake it for selecting LSB. (The
> origin code should have added it.)
>
> +class Rvalue_bit_select_impl<0, 0>
> +{
> +public:
> + static uint64_t
> + calc(uint64_t x)
> + {
> + return x;
> + }
> +};
>
> Also in the below segment - "rela_general<64>" should be
> "rela_general<32>", cause we are patching a 32 bit mov insn.
>
> + case elfcpp::R_AARCH64_MOVW_UABS_G3:
> + reloc_status = Reloc::template rela_general<64>(
> + view, object, psymval, addend, reloc_property);
> + break;
>
> Thanks,
> Han
>
> On Tue, Jun 28, 2016 at 3:18 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>> [+shenhan this time]
>>
>> On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>>>> relocations for AArch64 target.
>>>>
>>>> Best regards,
>>>> Igor Kudrin
>>>>
>>>> ---
>>>> gold/ChangeLog
>>>>
>>>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>>>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>>>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>>>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>>>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>>>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>>>> MOVW_UABS_* and MOVW_SABS_* relocations.
>>>> (Target_aarch64::Scan::global): Likewise.
>>>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>>>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>>>> * testsuite/Makefile.am (aarch64_relocs): New test.
>>>> * testsuite/Makefile.in: Regenerate.
>>>> * testsuite/aarch64_globals.s: New test source file.
>>>> * testsuite/aarch64_relocs.s: New test source file.
>>>> * testsuite/aarch64_relocs.sh: New test script.
>>>
>>> + static uint64_t
>>> + calc(uint64_t x)
>>> + {
>>> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
>>> + }
>>>
>>> I know this was the same before your patch, but I'd prefer using
>>> "1ULL" instead of the C-style cast.
>>>
>>> Han, can you take a look at this patch?
>>>
>>> -cary
>
>
>
> --
> Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
--
Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-07-06 16:47 ` Han Shen
@ 2016-07-25 10:30 ` Igor Kudrin
2016-07-26 15:58 ` Han Shen
0 siblings, 1 reply; 10+ messages in thread
From: Igor Kudrin @ 2016-07-25 10:30 UTC (permalink / raw)
To: Han Shen; +Cc: Cary Coutant, binutils
Hello Han,
Thanks for the review.
Could someone apply the patch, please? I don't have write permissions yet.
Best regards,
Igor Kudrin
________________________________________
From: Han Shen <shenhan@google.com>
Sent: Wednesday, July 6, 2016 10:47 PM
To: Igor Kudrin
Cc: Cary Coutant; binutils@sourceware.org
Subject: Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
Thanks, Igor, LGTM.
Han
On Thu, Jun 30, 2016 at 10:14 AM, Igor Kudrin <ikudrin@accesssoftek.com> wrote:
> Hi Cary, Han,
>
> Thank you very much for the review comments!
>
> Here is an updated patch with the following changes:
> * Rebased to the top.
> * Changed "(uint64_t)1" to "1ULL".
> * Added a comment for "Rvalue_bit_select_impl<0, 0>".
> * Changed "rela_general<64>" to "rela_general<32>".
>
> Best regards,
> Igor Kudrin
>
> ---
> gold/ChangeLog
>
> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
> (rvalue_bit_select): Use Rvalue_bit_select_impl.
> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
> MOVW_UABS_* and MOVW_SABS_* relocations.
> (Target_aarch64::Scan::global): Likewise.
> (Target_aarch64::Relocate::relocate): Add cases and handlings
> for new MOVW_UABS_* and MOVW_SABS_* relocations.
> * testsuite/Makefile.am (aarch64_relocs): New test.
> * testsuite/Makefile.in: Regenerate.
> * testsuite/aarch64_globals.s: New test source file.
> * testsuite/aarch64_relocs.s: Likewise.
> * testsuite/aarch64_relocs.sh: New test script.
>
> ________________________________________
> From: Han Shen <shenhan@google.com>
> Sent: Wednesday, June 29, 2016 8:48 AM
> To: Cary Coutant
> Cc: Igor Kudrin; binutils@sourceware.org
> Subject: Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
>
> Hi Igor, could you add comments to the specialization that L=U=0 means
> no check, otherwise readers might mistake it for selecting LSB. (The
> origin code should have added it.)
>
> +class Rvalue_bit_select_impl<0, 0>
> +{
> +public:
> + static uint64_t
> + calc(uint64_t x)
> + {
> + return x;
> + }
> +};
>
> Also in the below segment - "rela_general<64>" should be
> "rela_general<32>", cause we are patching a 32 bit mov insn.
>
> + case elfcpp::R_AARCH64_MOVW_UABS_G3:
> + reloc_status = Reloc::template rela_general<64>(
> + view, object, psymval, addend, reloc_property);
> + break;
>
> Thanks,
> Han
>
> On Tue, Jun 28, 2016 at 3:18 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>> [+shenhan this time]
>>
>> On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>>>> relocations for AArch64 target.
>>>>
>>>> Best regards,
>>>> Igor Kudrin
>>>>
>>>> ---
>>>> gold/ChangeLog
>>>>
>>>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>>>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>>>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>>>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>>>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>>>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>>>> MOVW_UABS_* and MOVW_SABS_* relocations.
>>>> (Target_aarch64::Scan::global): Likewise.
>>>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>>>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>>>> * testsuite/Makefile.am (aarch64_relocs): New test.
>>>> * testsuite/Makefile.in: Regenerate.
>>>> * testsuite/aarch64_globals.s: New test source file.
>>>> * testsuite/aarch64_relocs.s: New test source file.
>>>> * testsuite/aarch64_relocs.sh: New test script.
>>>
>>> + static uint64_t
>>> + calc(uint64_t x)
>>> + {
>>> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
>>> + }
>>>
>>> I know this was the same before your patch, but I'd prefer using
>>> "1ULL" instead of the C-style cast.
>>>
>>> Han, can you take a look at this patch?
>>>
>>> -cary
>
>
>
> --
> Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
--
Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-07-25 10:30 ` Igor Kudrin
@ 2016-07-26 15:58 ` Han Shen
2016-07-27 5:15 ` Igor Kudrin
0 siblings, 1 reply; 10+ messages in thread
From: Han Shen @ 2016-07-26 15:58 UTC (permalink / raw)
To: Igor Kudrin; +Cc: Cary Coutant, binutils
Hi Igor, thanks. Done.
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=8769bc4bab847cefc2bb5682a0a0dad579528ac8
Han
On Mon, Jul 25, 2016 at 3:29 AM, Igor Kudrin <ikudrin@accesssoftek.com> wrote:
> Hello Han,
>
> Thanks for the review.
>
> Could someone apply the patch, please? I don't have write permissions yet.
>
> Best regards,
> Igor Kudrin
> ________________________________________
> From: Han Shen <shenhan@google.com>
> Sent: Wednesday, July 6, 2016 10:47 PM
> To: Igor Kudrin
> Cc: Cary Coutant; binutils@sourceware.org
> Subject: Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
>
> Thanks, Igor, LGTM.
>
> Han
>
> On Thu, Jun 30, 2016 at 10:14 AM, Igor Kudrin <ikudrin@accesssoftek.com> wrote:
>> Hi Cary, Han,
>>
>> Thank you very much for the review comments!
>>
>> Here is an updated patch with the following changes:
>> * Rebased to the top.
>> * Changed "(uint64_t)1" to "1ULL".
>> * Added a comment for "Rvalue_bit_select_impl<0, 0>".
>> * Changed "rela_general<64>" to "rela_general<32>".
>>
>> Best regards,
>> Igor Kudrin
>>
>> ---
>> gold/ChangeLog
>>
>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>> MOVW_UABS_* and MOVW_SABS_* relocations.
>> (Target_aarch64::Scan::global): Likewise.
>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>> * testsuite/Makefile.am (aarch64_relocs): New test.
>> * testsuite/Makefile.in: Regenerate.
>> * testsuite/aarch64_globals.s: New test source file.
>> * testsuite/aarch64_relocs.s: Likewise.
>> * testsuite/aarch64_relocs.sh: New test script.
>>
>> ________________________________________
>> From: Han Shen <shenhan@google.com>
>> Sent: Wednesday, June 29, 2016 8:48 AM
>> To: Cary Coutant
>> Cc: Igor Kudrin; binutils@sourceware.org
>> Subject: Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
>>
>> Hi Igor, could you add comments to the specialization that L=U=0 means
>> no check, otherwise readers might mistake it for selecting LSB. (The
>> origin code should have added it.)
>>
>> +class Rvalue_bit_select_impl<0, 0>
>> +{
>> +public:
>> + static uint64_t
>> + calc(uint64_t x)
>> + {
>> + return x;
>> + }
>> +};
>>
>> Also in the below segment - "rela_general<64>" should be
>> "rela_general<32>", cause we are patching a 32 bit mov insn.
>>
>> + case elfcpp::R_AARCH64_MOVW_UABS_G3:
>> + reloc_status = Reloc::template rela_general<64>(
>> + view, object, psymval, addend, reloc_property);
>> + break;
>>
>> Thanks,
>> Han
>>
>> On Tue, Jun 28, 2016 at 3:18 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>> [+shenhan this time]
>>>
>>> On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>>>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>>>>> relocations for AArch64 target.
>>>>>
>>>>> Best regards,
>>>>> Igor Kudrin
>>>>>
>>>>> ---
>>>>> gold/ChangeLog
>>>>>
>>>>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>>>>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>>>>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>>>>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>>>>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>>>>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>>>>> MOVW_UABS_* and MOVW_SABS_* relocations.
>>>>> (Target_aarch64::Scan::global): Likewise.
>>>>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>>>>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>>>>> * testsuite/Makefile.am (aarch64_relocs): New test.
>>>>> * testsuite/Makefile.in: Regenerate.
>>>>> * testsuite/aarch64_globals.s: New test source file.
>>>>> * testsuite/aarch64_relocs.s: New test source file.
>>>>> * testsuite/aarch64_relocs.sh: New test script.
>>>>
>>>> + static uint64_t
>>>> + calc(uint64_t x)
>>>> + {
>>>> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
>>>> + }
>>>>
>>>> I know this was the same before your patch, but I'd prefer using
>>>> "1ULL" instead of the C-style cast.
>>>>
>>>> Han, can you take a look at this patch?
>>>>
>>>> -cary
>>
>>
>>
>> --
>> Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
>
>
>
> --
> Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
--
Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-07-26 15:58 ` Han Shen
@ 2016-07-27 5:15 ` Igor Kudrin
2016-07-27 6:58 ` Alan Modra
0 siblings, 1 reply; 10+ messages in thread
From: Igor Kudrin @ 2016-07-27 5:15 UTC (permalink / raw)
To: Han Shen; +Cc: Cary Coutant, binutils
Hi Han,
Thank you for applying this.
Unfortunatelly, "aarch64_relocs.sh" doesn't have "execute" bit set.
I wonder if something is wrong with my patches because there was
the same issue with my previous patch. At least, when I applied the patch
on my Linux system, the file was marked as executable, but maybe I miss
something?
Best regards,
Igor Kudrin
________________________________________
From: Han Shen <shenhan@google.com>
Sent: Tuesday, July 26, 2016 9:58 PM
To: Igor Kudrin
Cc: Cary Coutant; binutils@sourceware.org
Subject: Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
Hi Igor, thanks. Done.
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=8769bc4bab847cefc2bb5682a0a0dad579528ac8
Han
On Mon, Jul 25, 2016 at 3:29 AM, Igor Kudrin <ikudrin@accesssoftek.com> wrote:
> Hello Han,
>
> Thanks for the review.
>
> Could someone apply the patch, please? I don't have write permissions yet.
>
> Best regards,
> Igor Kudrin
> ________________________________________
> From: Han Shen <shenhan@google.com>
> Sent: Wednesday, July 6, 2016 10:47 PM
> To: Igor Kudrin
> Cc: Cary Coutant; binutils@sourceware.org
> Subject: Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
>
> Thanks, Igor, LGTM.
>
> Han
>
> On Thu, Jun 30, 2016 at 10:14 AM, Igor Kudrin <ikudrin@accesssoftek.com> wrote:
>> Hi Cary, Han,
>>
>> Thank you very much for the review comments!
>>
>> Here is an updated patch with the following changes:
>> * Rebased to the top.
>> * Changed "(uint64_t)1" to "1ULL".
>> * Added a comment for "Rvalue_bit_select_impl<0, 0>".
>> * Changed "rela_general<64>" to "rela_general<32>".
>>
>> Best regards,
>> Igor Kudrin
>>
>> ---
>> gold/ChangeLog
>>
>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>> MOVW_UABS_* and MOVW_SABS_* relocations.
>> (Target_aarch64::Scan::global): Likewise.
>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>> * testsuite/Makefile.am (aarch64_relocs): New test.
>> * testsuite/Makefile.in: Regenerate.
>> * testsuite/aarch64_globals.s: New test source file.
>> * testsuite/aarch64_relocs.s: Likewise.
>> * testsuite/aarch64_relocs.sh: New test script.
>>
>> ________________________________________
>> From: Han Shen <shenhan@google.com>
>> Sent: Wednesday, June 29, 2016 8:48 AM
>> To: Cary Coutant
>> Cc: Igor Kudrin; binutils@sourceware.org
>> Subject: Re: [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
>>
>> Hi Igor, could you add comments to the specialization that L=U=0 means
>> no check, otherwise readers might mistake it for selecting LSB. (The
>> origin code should have added it.)
>>
>> +class Rvalue_bit_select_impl<0, 0>
>> +{
>> +public:
>> + static uint64_t
>> + calc(uint64_t x)
>> + {
>> + return x;
>> + }
>> +};
>>
>> Also in the below segment - "rela_general<64>" should be
>> "rela_general<32>", cause we are patching a 32 bit mov insn.
>>
>> + case elfcpp::R_AARCH64_MOVW_UABS_G3:
>> + reloc_status = Reloc::template rela_general<64>(
>> + view, object, psymval, addend, reloc_property);
>> + break;
>>
>> Thanks,
>> Han
>>
>> On Tue, Jun 28, 2016 at 3:18 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>> [+shenhan this time]
>>>
>>> On Tue, Jun 28, 2016 at 3:17 PM, Cary Coutant <ccoutant@gmail.com> wrote:
>>>>> This patch implements R_AARCH64_MOVW_UABS_G* and R_AARCH64_MOVW_SABS_G*
>>>>> relocations for AArch64 target.
>>>>>
>>>>> Best regards,
>>>>> Igor Kudrin
>>>>>
>>>>> ---
>>>>> gold/ChangeLog
>>>>>
>>>>> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
>>>>> (rvalue_bit_select): Use Rvalue_bit_select_impl.
>>>>> * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1,
>>>>> MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
>>>>> MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
>>>>> * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
>>>>> MOVW_UABS_* and MOVW_SABS_* relocations.
>>>>> (Target_aarch64::Scan::global): Likewise.
>>>>> (Target_aarch64::Relocate::relocate): Add cases and handlings
>>>>> for new MOVW_UABS_* and MOVW_SABS_* relocations.
>>>>> * testsuite/Makefile.am (aarch64_relocs): New test.
>>>>> * testsuite/Makefile.in: Regenerate.
>>>>> * testsuite/aarch64_globals.s: New test source file.
>>>>> * testsuite/aarch64_relocs.s: New test source file.
>>>>> * testsuite/aarch64_relocs.sh: New test script.
>>>>
>>>> + static uint64_t
>>>> + calc(uint64_t x)
>>>> + {
>>>> + return (x & (((uint64_t)1 << (U+1)) - 1)) >> L;
>>>> + }
>>>>
>>>> I know this was the same before your patch, but I'd prefer using
>>>> "1ULL" instead of the C-style cast.
>>>>
>>>> Han, can you take a look at this patch?
>>>>
>>>> -cary
>>
>>
>>
>> --
>> Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
>
>
>
> --
> Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
--
Han Shen | Software Engineer | shenhan@google.com | +1-650-440-3330
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations.
2016-07-27 5:15 ` Igor Kudrin
@ 2016-07-27 6:58 ` Alan Modra
0 siblings, 0 replies; 10+ messages in thread
From: Alan Modra @ 2016-07-27 6:58 UTC (permalink / raw)
To: Igor Kudrin; +Cc: Han Shen, Cary Coutant, binutils
On Wed, Jul 27, 2016 at 05:15:08AM +0000, Igor Kudrin wrote:
> Unfortunatelly, "aarch64_relocs.sh" doesn't have "execute" bit set.
Fixed.
--
Alan Modra
Australia Development Lab, IBM
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-07-27 6:58 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-24 16:57 [PATCH][gold] AArch64: Implement MOVW_UABS_* and MOVW_SABS_* relocations Igor Kudrin
2016-06-28 22:17 ` Cary Coutant
2016-06-28 22:18 ` Cary Coutant
2016-06-29 2:48 ` Han Shen
2016-06-30 17:14 ` [PATCH v2][gold] " Igor Kudrin
2016-07-06 16:47 ` Han Shen
2016-07-25 10:30 ` Igor Kudrin
2016-07-26 15:58 ` Han Shen
2016-07-27 5:15 ` Igor Kudrin
2016-07-27 6:58 ` Alan Modra
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