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* [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
       [not found] <55D46D3C.6070406@arm.com>
@ 2015-08-19 12:32 ` Jiong Wang
  2015-08-19 15:12   ` Marcus Shawcroft
       [not found] ` <55D46E1D.4000104@arm.com>
  1 sibling, 1 reply; 12+ messages in thread
From: Jiong Wang @ 2015-08-19 12:32 UTC (permalink / raw)
  To: binutils

[-- Attachment #1: Type: text/plain, Size: 757 bytes --]

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
   * bfd-in2.h: Regenerate.
   * libbfd.h: Regenerate.
   * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
   * config/tc-aarch64.c (reloc_table): New relocation modifiers.
   (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
   (aarch64_force_relocation): Likewise.

gas/testsuite/
   * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
   * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
   * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
   * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.

OK for trunk?


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-1.patch --]
[-- Type: text/x-diff; name=0001-1.patch, Size: 7597 bytes --]

From 88f631d85a86067d30c820c06e6aca95ba3f260c Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 19 Aug 2015 10:57:34 +0100
Subject: [PATCH 1/6] [1]

---
 bfd/bfd-in2.h                                          |  3 +++
 bfd/elfnn-aarch64.c                                    | 15 +++++++++++++++
 bfd/libbfd.h                                           |  1 +
 bfd/reloc.c                                            |  4 ++++
 gas/config/tc-aarch64.c                                | 11 +++++++++++
 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d | 10 ++++++++++
 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s |  5 +++++
 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d       |  9 +++++++++
 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.s       |  5 +++++
 include/elf/aarch64.h                                  |  1 +
 10 files changed, 64 insertions(+)
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.s

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 3299055..1a99ba6 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5797,6 +5797,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.  */
 /* Unsigned 12 bit byte offset to module TLS base address.  */
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
 
+/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.  */
+  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC,
+
 /* Unsigned 12 bit byte offset to global offset table entry for a symbols
 tls_index structure.  Used in conjunction with
 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.  */
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index beedb70..9277261 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -1057,6 +1057,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0xfff,			/* dst_mask */
 	 FALSE),		/* pcrel_offset */
 
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.  */
+  HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xfff,			/* src_mask */
+	 0xfff,			/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
   HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC),	/* type */
 	 0,			/* rightshift */
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index f0eea9e..cdda315 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2760,6 +2760,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
   "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 83b7cd2..846befc 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6848,6 +6848,10 @@ ENUM
 ENUMDOC
   Unsigned 12 bit byte offset to module TLS base address.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
+ENUMDOC
+  No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
+ENUM
   BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
 ENUMDOC
   Unsigned 12 bit byte offset to global offset table entry for a symbols
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index df37541..d55356f 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2531,6 +2531,15 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0},
 
+  /* Same as dtprel_lo12, no overflow check.  */
+  {"dtprel_lo12_nc", 0,
+   0,				/* adr_type */
+   0,
+   0,
+   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC,
+   0,
+   0},
+
   /* Get to the page containing GOT TLS entry for a symbol */
   {"gottprel", 0,
    0,				/* adr_type */
@@ -6797,6 +6806,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
@@ -7010,6 +7020,7 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
new file mode 100644
index 0000000..b232b2f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	110002a8 	add	w8, w21, #0x0
+			0: R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s
new file mode 100644
index 0000000..34226a5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc	ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
+	add  w8, w21, #:dtprel_lo12_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
new file mode 100644
index 0000000..795fb0b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	91000347 	add	x7, x26, #0x0
+			0: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.s
new file mode 100644
index 0000000..187309f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
+	add  x7, x26, #:dtprel_lo12_nc:x
diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h
index 8e23278..c297ebc 100644
--- a/include/elf/aarch64.h
+++ b/include/elf/aarch64.h
@@ -133,6 +133,7 @@ RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
-- 
1.9.1


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
       [not found] ` <55D46E1D.4000104@arm.com>
@ 2015-08-19 12:32   ` Jiong Wang
  2015-08-19 15:13     ` Marcus Shawcroft
       [not found]   ` <55D46E7A.3010004@arm.com>
  1 sibling, 1 reply; 12+ messages in thread
From: Jiong Wang @ 2015-08-19 12:32 UTC (permalink / raw)
  To: binutils

[-- Attachment #1: Type: text/plain, Size: 700 bytes --]

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
   (aarch64_reloc_got_type): Likewise.
   (elfNN_aarch64_final_link_relocate): Likewise.
   (elfNN_aarch64_relocate_section): Likewise.
   * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
   (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
   * ld-aarch64/emit-relocs-530.s: New testcase.
   * ld-aarch64/emit-relocs-92.s: Likewise.
   * ld-aarch64/emit-relocs-530.d: New expectation file.
   * ld-aarch64/emit-relocs-92.d: Likewise.
   * ld-aarch64/aarch64-elf.exp: Run new testcases.

OK for trunk?


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0002-2.patch --]
[-- Type: text/x-diff; name=0002-2.patch, Size: 5209 bytes --]

From 679cf6ea15a965d6d6a75a61fc5ce88e2308e504 Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 19 Aug 2015 10:58:13 +0100
Subject: [PATCH 2/6] 2

---
 bfd/elfnn-aarch64.c                       |  2 ++
 bfd/elfxx-aarch64.c                       |  2 ++
 ld/testsuite/ld-aarch64/aarch64-elf.exp   |  2 ++
 ld/testsuite/ld-aarch64/emit-relocs-530.d |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-530.s | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-92.d  |  8 ++++++++
 ld/testsuite/ld-aarch64/emit-relocs-92.s  | 10 ++++++++++
 7 files changed, 41 insertions(+)
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-530.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-530.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-92.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-92.s

diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 9277261..962a10e 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -175,6 +175,7 @@
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC		\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21		\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21		\
@@ -5093,6 +5094,7 @@ elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
       break;
 
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
       value = _bfd_aarch64_elf_resolve_relocation (bfd_r_type, place, value,
 						   signed_addend - dtpoff_base (info),
 						   weak_undef_p);
diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c
index 69dac6d..dbb134a 100644
--- a/bfd/elfxx-aarch64.c
+++ b/bfd/elfxx-aarch64.c
@@ -250,6 +250,7 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
     case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
@@ -400,6 +401,7 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
     case BFD_RELOC_AARCH64_MOVW_G2_S:
     case BFD_RELOC_AARCH64_MOVW_G3:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
       value = value + addend;
       break;
 
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 15247dc..bb8f4c2 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -68,6 +68,7 @@ run_dump_test "weak-undefined"
 run_dump_test "emit-relocs-28"
 run_dump_test "emit-relocs-86"
 run_dump_test "emit-relocs-86-overflow"
+run_dump_test "emit-relocs-92"
 run_dump_test "emit-relocs-257"
 run_dump_test "emit-relocs-257-be"
 # 258 is tested in 257
@@ -120,6 +121,7 @@ run_dump_test "emit-relocs-312"
 run_dump_test "emit-relocs-313"
 run_dump_test "emit-relocs-529"
 run_dump_test "emit-relocs-529-overflow"
+run_dump_test "emit-relocs-530"
 
 # test addend correctness when --emit-relocs specified for non-relocatable obj.
 run_dump_test "emit-relocs-local-addend"
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-530.d b/ld/testsuite/ld-aarch64/emit-relocs-530.d
new file mode 100644
index 0000000..fc70bcc
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-530.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-530.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	91001134 	add	x20, x9, #0x4
+			10000: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-530.s b/ld/testsuite/ld-aarch64/emit-relocs-530.s
new file mode 100644
index 0000000..72af8b2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-530.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	add	x20, x9, #:dtprel_lo12_nc:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-92.d b/ld/testsuite/ld-aarch64/emit-relocs-92.d
new file mode 100644
index 0000000..0ff532b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-92.d
@@ -0,0 +1,8 @@
+#source: emit-relocs-92.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#...
+.* <.text>:
+  .*:	11001134 	add	w20, w9, #0x4
+			.*: R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-92.s b/ld/testsuite/ld-aarch64/emit-relocs-92.s
new file mode 100644
index 0000000..14b6206
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-92.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	add	w20, w9, #:dtprel_lo12_nc:v2
-- 
1.9.1


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [AArch64][3/6] GAS support TLSLD move/add relocation types
       [not found]   ` <55D46E7A.3010004@arm.com>
       [not found]     ` <55D46EFE.9060508@arm.com>
@ 2015-08-19 12:33     ` Jiong Wang
  2015-08-19 15:16       ` Marcus Shawcroft
  1 sibling, 1 reply; 12+ messages in thread
From: Jiong Wang @ 2015-08-19 12:33 UTC (permalink / raw)
  To: binutils

[-- Attachment #1: Type: text/plain, Size: 1978 bytes --]

All these relocation types are for arithmetic instructions,
add/movk/movz, they share the same gas internal logic, so put them
together.

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * reloc.c: New entries, including
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
   * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
   * bfd-in2.h: Regenerate.
   * libbfd.h: Regenerate.


gas/
   * config/tc-aarch64.c (reloc_table): New relocation modifiers,
   "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
   "dtprel_g1_nc", "dtprel_g2".
   (md_apply_fix): Support new relocation types.
   (aarch64_force_relocation): Likewise.
   (process_movw_reloc_info): Likewise.

gas/testsuite/
   * gas/aarch64/reloc-dtprel_g0.s: New testcase.
   * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
   * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
   * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
   * gas/aarch64/reloc-dtprel_g1.s: Likewise.
   * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
   * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
   * gas/aarch64/reloc-dtprel_g2.s: Likewise.
   * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
   * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
   * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
   * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
   * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
   * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
   * gas/aarch64/reloc-dtprel_g1.d: Likewise.
   * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.	
   * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
   * gas/aarch64/reloc-dtprel_g2.d: Likewise.
   * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
   * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0003-3.patch --]
[-- Type: text/x-diff; name=0003-3.patch, Size: 24559 bytes --]

From e8b6997e70b281f1885031ae326b7662a1ccc901 Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 19 Aug 2015 11:02:34 +0100
Subject: [PATCH 3/6] 3

---
 bfd/bfd-in2.h                                      | 18 +++++
 bfd/elfnn-aarch64.c                                | 90 ++++++++++++++++++++++
 bfd/libbfd.h                                       |  6 ++
 bfd/reloc.c                                        | 24 ++++++
 gas/config/tc-aarch64.c                            | 71 +++++++++++++++++
 gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d  | 10 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s  |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_g0.d        |  9 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g0.s        |  5 ++
 .../gas/aarch64/reloc-dtprel_g0_nc-ilp32.d         | 10 +++
 .../gas/aarch64/reloc-dtprel_g0_nc-ilp32.s         |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d     |  9 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s     |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d  | 10 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s  |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_g1.d        |  9 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g1.s        |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d     |  9 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s     |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_g2.d        |  9 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_g2.s        |  5 ++
 .../gas/aarch64/reloc-dtprel_hi12-ilp32.d          | 10 +++
 .../gas/aarch64/reloc-dtprel_hi12-ilp32.s          |  5 ++
 gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d      |  9 +++
 gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s      |  5 ++
 include/elf/aarch64.h                              |  4 +
 26 files changed, 357 insertions(+)
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g1.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_g2.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
 create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 1a99ba6..7a5ff76 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5794,6 +5794,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.  */
 /* AArch64 TLS INITIAL EXEC relocation.  */
   BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
 
+/* bit[23:12] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
+
 /* Unsigned 12 bit byte offset to module TLS base address.  */
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
 
@@ -5812,6 +5815,21 @@ instruction.  */
 /* GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.  */
   BFD_RELOC_AARCH64_TLSLD_ADR_PREL21,
 
+/* bit[15:0] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
+
+/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
+
+/* bit[31:16] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
+
+/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
+
+/* bit[47:32] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2,
+
 /* AArch64 TLS LOCAL EXEC relocation.  */
   BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2,
 
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 962a10e..6051108 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -1043,6 +1043,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0x1ffffc,		/* dst_mask */
 	 FALSE),		/* pcrel_offset */
 
+  /* ADD: bit[23:12] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12),	/* type */
+	 12,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xfff,			/* src_mask */
+	 0xfff,			/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   /* Unsigned 12 bit byte offset to module TLS base address.  */
   HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12),	/* type */
 	 0,			/* rightshift */
@@ -1118,6 +1133,81 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0x1fffff,		/* dst_mask */
 	 TRUE),			/* pcrel_offset */
 
+  /* MOVZ: bit[15:0] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0.  */
+  HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* MOVZ: bit[31:16] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1),	/* type */
+	 16,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1.  */
+  HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC),	/* type */
+	 16,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* MOVZ: bit[47:32] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2),	/* type */
+	 32,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2),	/* type */
 	 32,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index cdda315..5b3359c 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2759,11 +2759,17 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
+  "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12",
   "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12",
   "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2",
   "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2",
   "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1",
   "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 846befc..90ddfb5 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6844,6 +6844,10 @@ ENUM
 ENUMDOC
   AArch64 TLS INITIAL EXEC relocation.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
+ENUMDOC
+  bit[23:12] of byte offset to module TLS base address.
+ENUM
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
 ENUMDOC
   Unsigned 12 bit byte offset to module TLS base address.
@@ -6867,6 +6871,26 @@ ENUM
 ENUMDOC
   GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+ENUMDOC
+  bit[15:0] of byte offset to module TLS base address.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
+ENUMDOC
+  No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+ENUMDOC
+  bit[31:16] of byte offset to module TLS base address.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
+ENUMDOC
+  No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
+ENUMDOC
+  bit[47:32] of byte offset to module TLS base address.
+ENUM
   BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
 ENUMDOC
   AArch64 TLS LOCAL EXEC relocation.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index d55356f..d373c70 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2540,6 +2540,60 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0},
 
+  /* bits[23:12] of offset to the module TLS base address.  */
+  {"dtprel_hi12", 0,
+   0,				/* adr_type */
+   0,
+   0,
+   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
+   0,
+   0},
+
+  /* bits[15:0] of offset to the module TLS base address.  */
+  {"dtprel_g0", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
+   0,
+   0,
+   0},
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0.  */
+  {"dtprel_g0_nc", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
+   0,
+   0,
+   0},
+
+  /* bits[31:16] of offset to the module TLS base address.  */
+  {"dtprel_g1", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
+   0,
+   0,
+   0},
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1.  */
+  {"dtprel_g1_nc", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
+   0,
+   0,
+   0},
+
+  /* bits[47:32] of offset to the module TLS base address.  */
+  {"dtprel_g2", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2,
+   0,
+   0,
+   0},
+
   /* Get to the page containing GOT TLS entry for a symbol */
   {"gottprel", 0,
    0,				/* adr_type */
@@ -4613,6 +4667,8 @@ process_movw_reloc_info (void)
     case BFD_RELOC_AARCH64_MOVW_G0:
     case BFD_RELOC_AARCH64_MOVW_G0_NC:
     case BFD_RELOC_AARCH64_MOVW_G0_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
       shift = 0;
@@ -4620,6 +4676,8 @@ process_movw_reloc_info (void)
     case BFD_RELOC_AARCH64_MOVW_G1:
     case BFD_RELOC_AARCH64_MOVW_G1_NC:
     case BFD_RELOC_AARCH64_MOVW_G1_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
       shift = 16;
@@ -4627,6 +4685,7 @@ process_movw_reloc_info (void)
     case BFD_RELOC_AARCH64_MOVW_G2:
     case BFD_RELOC_AARCH64_MOVW_G2_NC:
     case BFD_RELOC_AARCH64_MOVW_G2_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
       if (is32)
 	{
@@ -6805,11 +6864,17 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -7019,11 +7084,17 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
new file mode 100644
index 0000000..44b6676
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	52800009 	mov	w9, #0x0.*
+			0: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s
new file mode 100644
index 0000000..ebf106e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+	movz w9, #:dtprel_g0:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
new file mode 100644
index 0000000..f1d4c16
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d2800009 	mov	x9, #0x0.*
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G0	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.s
new file mode 100644
index 0000000..201c2a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+	movz x9, #:dtprel_g0:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
new file mode 100644
index 0000000..c319e3d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	72800010 	movk	w16, #0x0
+			0: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s
new file mode 100644
index 0000000..59881bf
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0_nc ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
+	movk w16, #:dtprel_g0_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
new file mode 100644
index 0000000..68bcc00
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f2800010 	movk	x16, #0x0
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s
new file mode 100644
index 0000000..649b6a2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0_nc
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
+	movk x16, #:dtprel_g0_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
new file mode 100644
index 0000000..6a91806
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	52a00009 	movz	w9, #0x0, lsl #16
+			0: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s
new file mode 100644
index 0000000..1a51e9e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g1 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+	movz w9, #:dtprel_g1:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
new file mode 100644
index 0000000..859da28
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d2a00009 	movz	x9, #0x0, lsl #16
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G1	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.s
new file mode 100644
index 0000000..7dc1685
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g1
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+	movz x9, #:dtprel_g1:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
new file mode 100644
index 0000000..4a053eb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f2a00009 	movk	x9, #0x0, lsl #16
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s
new file mode 100644
index 0000000..571f759
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g1_nc
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
+	movk x9, #:dtprel_g1_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
new file mode 100644
index 0000000..1f2fb2d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d2c0000a 	movz	x10, #0x0, lsl #32
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G2	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.s
new file mode 100644
index 0000000..9e11002
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g2
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
+	movz x10, #:dtprel_g2:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
new file mode 100644
index 0000000..0235aeb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	11000341 	add	w1, w26, #0x0
+			0: R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s
new file mode 100644
index 0000000..3d1b852
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_hi12 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
+	add  w1, w26, #:dtprel_hi12:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
new file mode 100644
index 0000000..84cec8c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	91000341 	add	x1, x26, #0x0
+			0: R_AARCH64_TLSLD_ADD_DTPREL_HI12	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s
new file mode 100644
index 0000000..c4a5cb6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_hi12
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
+	add  x1, x26, #:dtprel_hi12:x
diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h
index c297ebc..41de67e 100644
--- a/include/elf/aarch64.h
+++ b/include/elf/aarch64.h
@@ -132,6 +132,10 @@ RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
-- 
1.9.1


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [AArch64][5/6] GAS support TLSLD load/store relocation types
       [not found]       ` <55D46FAD.9090601@arm.com>
       [not found]         ` <55D471B2.2010009@arm.com>
@ 2015-08-19 12:33         ` Jiong Wang
  2015-08-19 15:22           ` Marcus Shawcroft
  1 sibling, 1 reply; 12+ messages in thread
From: Jiong Wang @ 2015-08-19 12:33 UTC (permalink / raw)
  To: binutils

[-- Attachment #1: Type: text/plain, Size: 1989 bytes --]

All these relocation types are for LDST instructions, they share the
same gas internal logic, so put them together.

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * reloc.c: New entries, including
   BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
   * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
   * bfd-in2.h: Regenerate.
   * libbfd.h: Regenerate.

gas/
   * config/tc-aarch64.c (reloc_table): New relocation modifiers.
   (ldst_lo12_determine_real_reloc_type): Support new LDST reloc types.
   (parse_operands): Likewise.
   (md_apply_fix): Support new relocation types.
   (aarch64_force_relocation): Likewise.
   (process_movw_reloc_info): Likewise.

gas/testsuite/
   * gas/aarch64/reloc-dtprel-lo12-ldst8.s: New testcase.
   * gas/aarch64/reloc-dtprel-lo12-ldst8-nc.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst16.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst16-nc.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst32.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst32-nc.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst64.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst64-nc.s: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst8.d: New expectation file.
   * gas/aarch64/reloc-dtprel-lo12-ldst8-nc.d: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst16.d: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst16-nc.d: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst32.d: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst32-nc.d: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
   * gas/aarch64/reloc-dtprel-lo12-ldst64-nc.d: Likewise.


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0005-5.patch --]
[-- Type: text/x-diff; name=0005-5.patch, Size: 24004 bytes --]

commit 6a632ba8459c2a8cf179591070fb90a423240566
Author: Jiong Wang <jiong.wang@arm.com>
Date:   Wed Aug 19 11:22:22 2015 +0100

    5

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 7a5ff76..6ba3641 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5815,6 +5815,34 @@ instruction.  */
 /* GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.  */
   BFD_RELOC_AARCH64_TLSLD_ADR_PREL21,
 
+/* bit[11:1] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+
+/* bit[11:2] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+
+/* bit[11:3] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+
+/* bit[11:0] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+
 /* bit[15:0] of byte offset to module TLS base address.  */
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
 
@@ -5929,6 +5957,14 @@ assembler and not (currently) written to any object files.  */
 address.  Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.  */
   BFD_RELOC_AARCH64_LDST_LO12,
 
+/* AArch64 pseudo relocation code for TLS local dynamic mode.  It's to be
+used internally by the AArch64 assembler and not (currently) written to
+any object files.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC,
+
 /* AArch64 pseudo relocation code to be used internally by the AArch64
 assembler and not (currently) written to any object files.  */
   BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index eb79922..083bb0f 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -1139,6 +1139,126 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0x1fffff,		/* dst_mask */
 	 TRUE),			/* pcrel_offset */
 
+  /* LD/ST16: bit[11:1] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12),	/* type */
+	 1,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x1ffc00,		/* src_mask */
+	 0x1ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC),	/* type */
+	 1,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x1ffc00,		/* src_mask */
+	 0x1ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST32: bit[11:2] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12),	/* type */
+	 2,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC),	/* type */
+	 2,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffc00,		/* src_mask */
+	 0xffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST64: bit[11:3] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12),	/* type */
+	 3,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 9,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC),	/* type */
+	 3,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 9,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x7fc00,		/* src_mask */
+	 0x7fc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST8: bit[11:0] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   /* MOVZ: bit[15:0] of byte offset to module TLS base address.  */
   HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0),	/* type */
 	 0,			/* rightshift */
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 5b3359c..fc70e29 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2765,6 +2765,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",
+  "BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0",
   "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC",
   "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1",
@@ -2801,6 +2809,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_RELOC_END",
   "BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP",
   "BFD_RELOC_AARCH64_LDST_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_LD_GOT_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 90ddfb5..3d329a5 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6871,6 +6871,42 @@ ENUM
 ENUMDOC
   GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
+ENUMDOC
+  bit[11:1] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
+ENUMDOC
+  bit[11:2] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
+ENUMDOC
+  bit[11:3] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
+ENUMDOC
+  bit[11:0] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
+ENUM
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
 ENUMDOC
   bit[15:0] of byte offset to module TLS base address.
@@ -7021,6 +7057,16 @@ ENUMDOC
   AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
   address.  Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
+ENUMDOC
+  AArch64 pseudo relocation code for TLS local dynamic mode.  It's to be
+  used internally by the AArch64 assembler and not (currently) written to
+  any object files.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
+ENUM
   BFD_RELOC_AARCH64_LD_GOT_LO12_NC
 ENUMDOC
   AArch64 pseudo relocation code to be used internally by the AArch64
@@ -7035,7 +7081,6 @@ ENUM
 ENUMDOC
   AArch64 pseudo relocation code to be used internally by the AArch64
   assembler and not (currently) written to any object files.
-
 ENUM
   BFD_RELOC_TILEPRO_COPY
 ENUMX
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index d373c70..b97a090 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2528,7 +2528,7 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0,
    BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
-   0,
+   BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12,
    0},
 
   /* Same as dtprel_lo12, no overflow check.  */
@@ -2537,7 +2537,7 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0,
    BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC,
-   0,
+   BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC,
    0},
 
   /* bits[23:12] of offset to the module TLS base address.  */
@@ -4739,17 +4739,38 @@ get_logsz (unsigned int size)
 static inline bfd_reloc_code_real_type
 ldst_lo12_determine_real_reloc_type (void)
 {
-  int logsz;
+  unsigned logsz;
   enum aarch64_opnd_qualifier opd0_qlf = inst.base.operands[0].qualifier;
   enum aarch64_opnd_qualifier opd1_qlf = inst.base.operands[1].qualifier;
 
-  const bfd_reloc_code_real_type reloc_ldst_lo12[5] = {
-      BFD_RELOC_AARCH64_LDST8_LO12, BFD_RELOC_AARCH64_LDST16_LO12,
-      BFD_RELOC_AARCH64_LDST32_LO12, BFD_RELOC_AARCH64_LDST64_LO12,
+  const bfd_reloc_code_real_type reloc_ldst_lo12[3][5] = {
+    {
+      BFD_RELOC_AARCH64_LDST8_LO12,
+      BFD_RELOC_AARCH64_LDST16_LO12,
+      BFD_RELOC_AARCH64_LDST32_LO12,
+      BFD_RELOC_AARCH64_LDST64_LO12,
       BFD_RELOC_AARCH64_LDST128_LO12
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
+      BFD_RELOC_AARCH64_NONE
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_NONE
+    }
   };
 
-  gas_assert (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12);
+  gas_assert (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12
+	      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
+	      || (inst.reloc.type
+		  == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC));
   gas_assert (inst.base.opcode->operands[1] == AARCH64_OPND_ADDR_UIMM12);
 
   if (opd1_qlf == AARCH64_OPND_QLF_NIL)
@@ -4759,9 +4780,16 @@ ldst_lo12_determine_real_reloc_type (void)
   gas_assert (opd1_qlf != AARCH64_OPND_QLF_NIL);
 
   logsz = get_logsz (aarch64_get_qualifier_esize (opd1_qlf));
-  gas_assert (logsz >= 0 && logsz <= 4);
+  if (inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+    gas_assert (logsz <= 3);
+  else
+    gas_assert (logsz <= 4);
 
-  return reloc_ldst_lo12[logsz];
+  /* In reloc.c, these pseudo relocation types should be defined in similar
+     order as above reloc_ldst_lo12 array. Because the array index calcuation
+     below relies on this.  */
+  return reloc_ldst_lo12[inst.reloc.type - BFD_RELOC_AARCH64_LDST_LO12][logsz];
 }
 
 /* Check whether a register list REGINFO is valid.  The registers must be
@@ -5397,7 +5425,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	    }
 	  if (inst.reloc.type == BFD_RELOC_UNUSED)
 	    aarch64_set_gas_internal_fixup (&inst.reloc, info, 1);
-	  else if (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12)
+	  else if (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12)
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC))
 	    inst.reloc.type = ldst_lo12_determine_real_reloc_type ();
 	  /* Leave qualifier to be determined by libopcodes.  */
 	  break;
@@ -6870,6 +6902,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
@@ -7090,6 +7130,14 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
new file mode 100644
index 0000000..fec41b2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7980009b 	ldrsh	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST16_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.s
new file mode 100644
index 0000000..a9ac0c5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
+	ldrsh  x27, [x4, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
new file mode 100644
index 0000000..74f122c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b980009b 	ldrsw	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST32_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.s
new file mode 100644
index 0000000..18ad0f0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
+	ldrsw  x27, [x4, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
new file mode 100644
index 0000000..c8858f8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST64_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.s
new file mode 100644
index 0000000..7a017f6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
+	ldr  x27, [x4, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
new file mode 100644
index 0000000..3b6560e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	39800115 	ldrsb	x21, \[x8\]
+			0: R_AARCH64_TLSLD_LDST8_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.s
new file mode 100644
index 0000000..7391376
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
+	ldrsb  x21, [x8, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
new file mode 100644
index 0000000..1b24e1c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7940009b 	ldrh	w27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s
new file mode 100644
index 0000000..3262a8f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
+	ldrh  w27, [x4, #:dtprel_lo12_nc:sym]
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
new file mode 100644
index 0000000..883e427
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b98000f4 	ldrsw	x20, \[x7\]
+			0: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s
new file mode 100644
index 0000000..60f1c70
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
+	ldrsw  x20, [x7, #:dtprel_lo12_nc:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
new file mode 100644
index 0000000..fd9e1cb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s
new file mode 100644
index 0000000..d5da5cb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
+	ldr  x27, [x4, #:dtprel_lo12_nc:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
new file mode 100644
index 0000000..76adce0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	3940005d 	ldrb	w29, \[x2\]
+			0: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.s
new file mode 100644
index 0000000..80648e0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
+	ldrb  w29, [x2, #:dtprel_lo12_nc:sym]
+

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [AArch64][6/6] LD support TLSLD load/store relocation types
       [not found]         ` <55D471B2.2010009@arm.com>
@ 2015-08-19 12:33           ` Jiong Wang
  2015-08-19 15:23             ` Marcus Shawcroft
  0 siblings, 1 reply; 12+ messages in thread
From: Jiong Wang @ 2015-08-19 12:33 UTC (permalink / raw)
  To: binutils

[-- Attachment #1: Type: text/plain, Size: 1967 bytes --]

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
   types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
   (elfNN_aarch64_final_link_relocate): Likewise.
   * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
   (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
   * ld-aarch64/emit-relocs-531.s: New testcase.
   * ld-aarch64/emit-relocs-531-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-532.s: Likewise.
   * ld-aarch64/emit-relocs-533.s: Likewise.
   * ld-aarch64/emit-relocs-533-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-534.s: Likewise.
   * ld-aarch64/emit-relocs-535.s: Likewise.
   * ld-aarch64/emit-relocs-535-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-536.s: Likewise.
   * ld-aarch64/emit-relocs-537.s: Likewise.
   * ld-aarch64/emit-relocs-537-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-538.s: Likewise.
   * ld-aarch64/emit-relocs-531.d: New expectation file.
   * ld-aarch64/emit-relocs-531-overflow.d: Likewise.
   * ld-aarch64/emit-relocs-532.d: Likewise.
   * ld-aarch64/emit-relocs-533.d: Likewise.
   * ld-aarch64/emit-relocs-533-overflow.d: Likewise.
   * ld-aarch64/emit-relocs-534.d: Likewise.
   * ld-aarch64/emit-relocs-535.d: Likewise.
   * ld-aarch64/emit-relocs-535-overflow.d: Likewise.
   * ld-aarch64/emit-relocs-536.d: Likewise.
   * ld-aarch64/emit-relocs-537.d: Likewise.
   * ld-aarch64/emit-relocs-537-overflow.d: Likewise.
   * ld-aarch64/emit-relocs-538.d: Likewise.
   * ld-aarch64/aarch64-elf.exp: Run new testcases.


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0006-6.patch --]
[-- Type: text/x-diff; name=0006-6.patch, Size: 19628 bytes --]

From c2a8808d45ccbe3767ef02ec7a251cc1ed06c2c1 Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 19 Aug 2015 11:26:56 +0100
Subject: [PATCH 6/6] 6

---
 bfd/elfnn-aarch64.c                                | 16 ++++++++++++++++
 bfd/elfxx-aarch64.c                                | 16 ++++++++++++++++
 ld/testsuite/ld-aarch64/aarch64-elf.exp            | 12 ++++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-531-overflow.d |  4 ++++
 ld/testsuite/ld-aarch64/emit-relocs-531-overflow.s | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-531.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-531.s          | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-532.d          |  9 +++++++++
 ld/testsuite/ld-aarch64/emit-relocs-532.s          | 17 +++++++++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-533-overflow.d |  4 ++++
 ld/testsuite/ld-aarch64/emit-relocs-533-overflow.s | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-533.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-533.s          | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-534.d          |  9 +++++++++
 ld/testsuite/ld-aarch64/emit-relocs-534.s          | 17 +++++++++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-535-overflow.d |  4 ++++
 ld/testsuite/ld-aarch64/emit-relocs-535-overflow.s | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-535.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-535.s          | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-536.d          |  9 +++++++++
 ld/testsuite/ld-aarch64/emit-relocs-536.s          | 17 +++++++++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-537-overflow.d |  4 ++++
 ld/testsuite/ld-aarch64/emit-relocs-537-overflow.s | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-537.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-537.s          | 12 ++++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-538.d          |  9 +++++++++
 ld/testsuite/ld-aarch64/emit-relocs-538.s          | 19 +++++++++++++++++++
 27 files changed, 280 insertions(+)
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-531-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-531-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-531.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-531.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-532.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-532.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-533-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-533-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-533.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-533.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-534.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-534.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-535-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-535-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-535.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-535.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-536.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-536.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-537-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-537-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-537.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-537.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-538.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-538.s

diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 375208c..8e56b27 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -180,6 +180,14 @@
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC		\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21		\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21		\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1	\
@@ -5312,6 +5320,14 @@ elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c
index 82c6ec9..34bd1a6 100644
--- a/bfd/elfxx-aarch64.c
+++ b/bfd/elfxx-aarch64.c
@@ -276,6 +276,14 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
     case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
       if (old_addend & ((1 << howto->rightshift) - 1))
 	return bfd_reloc_overflow;
       /* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
@@ -409,6 +417,14 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index b8e801f..cbbe6a9 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -136,6 +136,18 @@ run_dump_test "emit-relocs-528-overflow"
 run_dump_test "emit-relocs-529"
 run_dump_test "emit-relocs-529-overflow"
 run_dump_test "emit-relocs-530"
+run_dump_test "emit-relocs-531"
+run_dump_test "emit-relocs-531-overflow"
+run_dump_test "emit-relocs-532"
+run_dump_test "emit-relocs-533"
+run_dump_test "emit-relocs-533-overflow"
+run_dump_test "emit-relocs-534"
+run_dump_test "emit-relocs-535"
+run_dump_test "emit-relocs-535-overflow"
+run_dump_test "emit-relocs-536"
+run_dump_test "emit-relocs-537"
+run_dump_test "emit-relocs-537-overflow"
+run_dump_test "emit-relocs-538"
 
 # test addend correctness when --emit-relocs specified for non-relocatable obj.
 run_dump_test "emit-relocs-local-addend"
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-531-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-531-overflow.d
new file mode 100644
index 0000000..e22c7a4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-531-overflow.d
@@ -0,0 +1,4 @@
+#source: emit-relocs-531-overflow.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-531-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-531-overflow.s
new file mode 100644
index 0000000..812548a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-531-overflow.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 4096
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	4096
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldrsb	x22, [x1, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-531.d b/ld/testsuite/ld-aarch64/emit-relocs-531.d
new file mode 100644
index 0000000..588f127
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-531.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-531.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	39801115 	ldrsb	x21, \[x8,#4\]
+			10000: R_AARCH64_TLSLD_LDST8_DTPREL_LO12	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-531.s b/ld/testsuite/ld-aarch64/emit-relocs-531.s
new file mode 100644
index 0000000..2888cdd
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-531.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldrsb	x21, [x8, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-532.d b/ld/testsuite/ld-aarch64/emit-relocs-532.d
new file mode 100644
index 0000000..f5f49b8
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-532.d
@@ -0,0 +1,9 @@
+#source: emit-relocs-532.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	3980109d 	ldrsb	x29, \[x4,#4\]
+			10000: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC	v2
+   10004:	398020f2 	ldrsb	x18, \[x7,#8\]
+			10004: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC	v3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-532.s b/ld/testsuite/ld-aarch64/emit-relocs-532.s
new file mode 100644
index 0000000..d8ef35f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-532.s
@@ -0,0 +1,17 @@
+	.global	v1
+	.global	v2
+	.size	v2, 4100
+	.global	v3
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.zero	4100
+v3:
+	.word	0xcafecafe
+
+	.text
+	ldrsb	x29, [x4, #:dtprel_lo12_nc:v2]
+
+	# should not issue overflow error.
+	ldrsb	x18, [x7, #:dtprel_lo12_nc:v3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-533-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-533-overflow.d
new file mode 100644
index 0000000..528693b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-533-overflow.d
@@ -0,0 +1,4 @@
+#source: emit-relocs-533-overflow.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-533-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-533-overflow.s
new file mode 100644
index 0000000..9a9cbcc
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-533-overflow.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 4096
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	4096
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldrsh	x2, [x17, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-533.d b/ld/testsuite/ld-aarch64/emit-relocs-533.d
new file mode 100644
index 0000000..09b3d11
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-533.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-533.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	798008eb 	ldrsh	x11, \[x7,#4\]
+			10000: R_AARCH64_TLSLD_LDST16_DTPREL_LO12	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-533.s b/ld/testsuite/ld-aarch64/emit-relocs-533.s
new file mode 100644
index 0000000..9238ed2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-533.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldrsh	x11, [x7, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-534.d b/ld/testsuite/ld-aarch64/emit-relocs-534.d
new file mode 100644
index 0000000..e2fa478
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-534.d
@@ -0,0 +1,9 @@
+#source: emit-relocs-534.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	798009d6 	ldrsh	x22, \[x14,#4\]
+			10000: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC	v2
+   10004:	79a71a28 	ldrsh	x8, \[x17,#5004\]
+			10004: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC	v3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-534.s b/ld/testsuite/ld-aarch64/emit-relocs-534.s
new file mode 100644
index 0000000..4265046
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-534.s
@@ -0,0 +1,17 @@
+	.global	v1
+	.global	v2
+	.size	v2, 5000
+	.global	v3
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.zero	5000
+v3:
+	.word	0xcafecafe
+
+	.text
+	ldrsh	x22, [x14, #:dtprel_lo12_nc:v2]
+
+	# should not issue overflow error.
+	ldrsh	x8, [x17, #:dtprel_lo12_nc:v3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-535-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-535-overflow.d
new file mode 100644
index 0000000..882edf4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-535-overflow.d
@@ -0,0 +1,4 @@
+#source: emit-relocs-535-overflow.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLD_LDST32_DTPREL_LO12 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-535-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-535-overflow.s
new file mode 100644
index 0000000..33e632f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-535-overflow.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 4096
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	4096
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldrsw  x2, [x17, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-535.d b/ld/testsuite/ld-aarch64/emit-relocs-535.d
new file mode 100644
index 0000000..32766bf
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-535.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-535.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	b9800661 	ldrsw	x1, \[x19,#4\]
+			10000: R_AARCH64_TLSLD_LDST32_DTPREL_LO12	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-535.s b/ld/testsuite/ld-aarch64/emit-relocs-535.s
new file mode 100644
index 0000000..0b83a2a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-535.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldrsw	x1, [x19, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-536.d b/ld/testsuite/ld-aarch64/emit-relocs-536.d
new file mode 100644
index 0000000..862208a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-536.d
@@ -0,0 +1,9 @@
+#source: emit-relocs-536.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	b98005d6 	ldrsw	x22, \[x14,#4\]
+			10000: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC	v2
+   10004:	b9800628 	ldrsw	x8, \[x17,#4\]
+			10004: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC	v3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-536.s b/ld/testsuite/ld-aarch64/emit-relocs-536.s
new file mode 100644
index 0000000..cb7d3d8
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-536.s
@@ -0,0 +1,17 @@
+	.global	v1
+	.global	v2
+	.size	v2, 16384
+	.global	v3
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.zero	16384
+v3:
+	.word	0xcafecafe
+
+	.text
+	ldrsw	x22, [x14, #:dtprel_lo12_nc:v2]
+
+	# should not issue overflow error.
+	ldrsw	x8, [x17, #:dtprel_lo12_nc:v3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-537-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-537-overflow.d
new file mode 100644
index 0000000..3ad6b2a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-537-overflow.d
@@ -0,0 +1,4 @@
+#source: emit-relocs-537-overflow.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLD_LDST64_DTPREL_LO12 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-537-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-537-overflow.s
new file mode 100644
index 0000000..a9903c3
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-537-overflow.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 4096
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	4096
+v2:
+	.word	0xcafecafe
+
+	.text
+	ldr	x12, [x13, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-537.d b/ld/testsuite/ld-aarch64/emit-relocs-537.d
new file mode 100644
index 0000000..82cc9bb
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-537.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-537.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f9400520 	ldr	x0, \[x9,#8\]
+			10000: R_AARCH64_TLSLD_LDST64_DTPREL_LO12	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-537.s b/ld/testsuite/ld-aarch64/emit-relocs-537.s
new file mode 100644
index 0000000..00f9de3
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-537.s
@@ -0,0 +1,12 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+	.word	0xcafecafe
+
+	.text
+	ldr	x0, [x9, #:dtprel_lo12:v2]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-538.d b/ld/testsuite/ld-aarch64/emit-relocs-538.d
new file mode 100644
index 0000000..dffde23
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-538.d
@@ -0,0 +1,9 @@
+#source: emit-relocs-538.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f9400482 	ldr	x2, \[x4,#8\]
+			10000: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC	v2
+   10004:	f940062e 	ldr	x14, \[x17,#8\]
+			10004: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC	v3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-538.s b/ld/testsuite/ld-aarch64/emit-relocs-538.s
new file mode 100644
index 0000000..4822dd3
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-538.s
@@ -0,0 +1,19 @@
+	.global	v1
+	.global	v2
+	.size	v2, 32768
+	.global	v3
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+	.word	0xdeaddead
+v2:
+	.zero	32768
+v3:
+	.word	0xcafecafe
+	.word	0xcafecafe
+
+	.text
+	ldr	x2, [x4, #:dtprel_lo12_nc:v2]
+
+	# should not issue overflow error.
+	ldr	x14, [x17, #:dtprel_lo12_nc:v3]
-- 
1.9.1


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [AArch64][4/6] LD support  TLSLD move/add relocation types
       [not found]     ` <55D46EFE.9060508@arm.com>
       [not found]       ` <55D46FAD.9090601@arm.com>
@ 2015-08-19 12:33       ` Jiong Wang
  2015-08-19 15:18         ` Marcus Shawcroft
  1 sibling, 1 reply; 12+ messages in thread
From: Jiong Wang @ 2015-08-19 12:33 UTC (permalink / raw)
  To: binutils

[-- Attachment #1: Type: text/plain, Size: 1967 bytes --]

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
   PR ld/18276
   * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
   types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
   (elfNN_aarch64_final_link_relocate): Likewise.
   * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
   (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
   * ld-aarch64/emit-relocs-87.s: New testcase.
   * ld-aarch64/emit-relocs-88.s: Likewise.
   * ld-aarch64/emit-relocs-88-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-89.s: Likewise.
   * ld-aarch64/emit-relocs-90.s: Likewise.
   * ld-aarch64/emit-relocs-90-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-523.s: Likewise.
   * ld-aarch64/emit-relocs-524.s: Likewise.
   * ld-aarch64/emit-relocs-525.s: Likewise.
   * ld-aarch64/emit-relocs-527.s: Likewise.
   * ld-aarch64/emit-relocs-526.s: Likewise.
   * ld-aarch64/emit-relocs-528.s: Likewise.
   * ld-aarch64/emit-relocs-528-overflow.s: Likewise.
   * ld-aarch64/emit-relocs-87.d: New expectation file.
   * ld-aarch64/emit-relocs-88.d: Likewise.
   * ld-aarch64/emit-relocs-88-overflow.d: Likewise.
   * ld-aarch64/emit-relocs-89.d: Likewise.
   * ld-aarch64/emit-relocs-90.d: Likewise.
   * ld-aarch64/emit-relocs-90-overflow.d: Likewise.
   * ld-aarch64/emit-relocs-91.d: Likewise.
   * ld-aarch64/emit-relocs-523.d: Likewise.
   * ld-aarch64/emit-relocs-524.d: Likewise.
   * ld-aarch64/emit-relocs-525.d: Likewise.
   * ld-aarch64/emit-relocs-526.d: Likewise.
   * ld-aarch64/emit-relocs-527.d: Likewise.
   * ld-aarch64/emit-relocs-528.d: Likewise.
   * ld-aarch64/emit-relocs-528-overflow.d: Likewise.
   * ld-aarch64/aarch64-elf.exp: Run new testcases.


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0004-4.patch --]
[-- Type: text/x-diff; name=0004-4.patch, Size: 21413 bytes --]

From 20d15cd94c6ec8e5e0c68897e164c123b5d9cb9f Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Wed, 19 Aug 2015 11:18:25 +0100
Subject: [PATCH 4/6] 4

---
 bfd/elfnn-aarch64.c                                | 12 ++++++++++++
 bfd/elfxx-aarch64.c                                | 12 ++++++++++++
 ld/testsuite/ld-aarch64/aarch64-elf.exp            | 14 ++++++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-523.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-523.s          | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-524.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-524.s          | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-525.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-525.s          | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-526-overflow.d |  4 ++++
 ld/testsuite/ld-aarch64/emit-relocs-526-overflow.s | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-526.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-526.s          | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-527.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-527.s          | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-528-overflow.d |  4 ++++
 ld/testsuite/ld-aarch64/emit-relocs-528-overflow.s | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-528.d          |  7 +++++++
 ld/testsuite/ld-aarch64/emit-relocs-528.s          | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-87.d           |  8 ++++++++
 ld/testsuite/ld-aarch64/emit-relocs-87.s           | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-88-overflow.d  |  5 +++++
 ld/testsuite/ld-aarch64/emit-relocs-88-overflow.s  | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-88.d           |  8 ++++++++
 ld/testsuite/ld-aarch64/emit-relocs-88.s           | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-89.d           |  8 ++++++++
 ld/testsuite/ld-aarch64/emit-relocs-89.s           | 10 ++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-90-overflow.d  |  5 +++++
 ld/testsuite/ld-aarch64/emit-relocs-90-overflow.s  | 11 +++++++++++
 ld/testsuite/ld-aarch64/emit-relocs-90.d           |  8 ++++++++
 ld/testsuite/ld-aarch64/emit-relocs-90.s           | 11 +++++++++++
 31 files changed, 277 insertions(+)
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-523.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-523.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-524.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-524.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-525.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-525.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-526-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-526-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-526.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-526.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-527.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-527.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-528-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-528-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-528.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-528.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-87.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-87.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-88-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-88-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-88.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-88.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-89.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-89.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-90-overflow.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-90-overflow.s
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-90.d
 create mode 100644 ld/testsuite/ld-aarch64/emit-relocs-90.s

diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 6051108..eb79922 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -174,11 +174,17 @@
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC		\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21		\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21		\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC	\
+   || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12	\
    || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC	\
@@ -5183,8 +5189,14 @@ elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
       *unresolved_reloc_p = FALSE;
       break;
 
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
       value = _bfd_aarch64_elf_resolve_relocation (bfd_r_type, place, value,
 						   signed_addend - dtpoff_base (info),
 						   weak_undef_p);
diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c
index dbb134a..82c6ec9 100644
--- a/bfd/elfxx-aarch64.c
+++ b/bfd/elfxx-aarch64.c
@@ -249,6 +249,7 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
     case BFD_RELOC_AARCH64_ADD_LO12:
     case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
@@ -291,6 +292,9 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
     case BFD_RELOC_AARCH64_MOVW_G0_S:
     case BFD_RELOC_AARCH64_MOVW_G1_S:
     case BFD_RELOC_AARCH64_MOVW_G2_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
@@ -318,6 +322,8 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
     case BFD_RELOC_AARCH64_MOVW_G2:
     case BFD_RELOC_AARCH64_MOVW_G2_NC:
     case BFD_RELOC_AARCH64_MOVW_G3:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
       contents = reencode_movw_imm (contents, addend);
@@ -400,8 +406,14 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
     case BFD_RELOC_AARCH64_MOVW_G2_NC:
     case BFD_RELOC_AARCH64_MOVW_G2_S:
     case BFD_RELOC_AARCH64_MOVW_G3:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
       value = value + addend;
       break;
 
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index bb8f4c2..b8e801f 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -68,6 +68,12 @@ run_dump_test "weak-undefined"
 run_dump_test "emit-relocs-28"
 run_dump_test "emit-relocs-86"
 run_dump_test "emit-relocs-86-overflow"
+run_dump_test "emit-relocs-87"
+run_dump_test "emit-relocs-88"
+run_dump_test "emit-relocs-88-overflow"
+run_dump_test "emit-relocs-89"
+run_dump_test "emit-relocs-90"
+run_dump_test "emit-relocs-90-overflow"
 run_dump_test "emit-relocs-92"
 run_dump_test "emit-relocs-257"
 run_dump_test "emit-relocs-257-be"
@@ -119,6 +125,14 @@ run_dump_test "emit-relocs-309-low-bad"
 run_dump_test "emit-relocs-311"
 run_dump_test "emit-relocs-312"
 run_dump_test "emit-relocs-313"
+run_dump_test "emit-relocs-523"
+run_dump_test "emit-relocs-524"
+run_dump_test "emit-relocs-525"
+run_dump_test "emit-relocs-526"
+run_dump_test "emit-relocs-526-overflow"
+run_dump_test "emit-relocs-527"
+run_dump_test "emit-relocs-528"
+run_dump_test "emit-relocs-528-overflow"
 run_dump_test "emit-relocs-529"
 run_dump_test "emit-relocs-529-overflow"
 run_dump_test "emit-relocs-530"
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-523.d b/ld/testsuite/ld-aarch64/emit-relocs-523.d
new file mode 100644
index 0000000..d2d719d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-523.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-523.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f2c0001d 	movk	x29, #0x0, lsl #32
+			10000: R_AARCH64_TLSLD_MOVW_DTPREL_G2	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-523.s b/ld/testsuite/ld-aarch64/emit-relocs-523.s
new file mode 100644
index 0000000..b2c4e5c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-523.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 65536
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	65536
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x29, #:dtprel_g2:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-524.d b/ld/testsuite/ld-aarch64/emit-relocs-524.d
new file mode 100644
index 0000000..d15b015
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-524.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-524.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f2a0003d 	movk	x29, #0x1, lsl #16
+			10000: R_AARCH64_TLSLD_MOVW_DTPREL_G1	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-524.s b/ld/testsuite/ld-aarch64/emit-relocs-524.s
new file mode 100644
index 0000000..58480b8
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-524.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 65536
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	65536
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x29, #:dtprel_g1:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-525.d b/ld/testsuite/ld-aarch64/emit-relocs-525.d
new file mode 100644
index 0000000..6588062
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-525.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-525.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f2a00031 	movk	x17, #0x1, lsl #16
+			10000: R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-525.s b/ld/testsuite/ld-aarch64/emit-relocs-525.s
new file mode 100644
index 0000000..b52595e
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-525.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 65536
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	65536
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x17, #:dtprel_g1_nc:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-526-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-526-overflow.d
new file mode 100644
index 0000000..7a29afb
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-526-overflow.d
@@ -0,0 +1,4 @@
+#source: emit-relocs-526-overflow.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLD_MOVW_DTPREL_G0 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-526-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-526-overflow.s
new file mode 100644
index 0000000..28e953f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-526-overflow.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	65536
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x17, #:dtprel_g0:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-526.d b/ld/testsuite/ld-aarch64/emit-relocs-526.d
new file mode 100644
index 0000000..ed432d6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-526.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-526.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f2800091 	movk	x17, #0x4
+			10000: R_AARCH64_TLSLD_MOVW_DTPREL_G0	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-526.s b/ld/testsuite/ld-aarch64/emit-relocs-526.s
new file mode 100644
index 0000000..3216468
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-526.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x17, #:dtprel_g0:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-527.d b/ld/testsuite/ld-aarch64/emit-relocs-527.d
new file mode 100644
index 0000000..a546cd8
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-527.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-527.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	f2800091 	movk	x17, #0x4
+			10000: R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-527.s b/ld/testsuite/ld-aarch64/emit-relocs-527.s
new file mode 100644
index 0000000..04dc37c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-527.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x17, #:dtprel_g0_nc:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-528-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-528-overflow.d
new file mode 100644
index 0000000..ed754ff
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-528-overflow.d
@@ -0,0 +1,4 @@
+#source: emit-relocs-528-overflow.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLD_ADD_DTPREL_HI12 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-528-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-528-overflow.s
new file mode 100644
index 0000000..1a3645f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-528-overflow.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 16777216
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	16777216
+v2:
+	.word	0xcafecafe
+
+	.text
+	add	x20, x9, #:dtprel_hi12:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-528.d b/ld/testsuite/ld-aarch64/emit-relocs-528.d
new file mode 100644
index 0000000..ee2797f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-528.d
@@ -0,0 +1,7 @@
+#source: emit-relocs-528.s
+#ld: -T relocs.ld -e0 --emit-relocs
+#objdump: -dr
+#...
+0000000000010000 <.text>:
+   10000:	91002934 	add	x20, x9, #0xa
+			10000: R_AARCH64_TLSLD_ADD_DTPREL_HI12	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-528.s b/ld/testsuite/ld-aarch64/emit-relocs-528.s
new file mode 100644
index 0000000..6e6a0b4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-528.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size v1, 40960
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	40960
+v2:
+	.word	0xcafecafe
+
+	.text
+	add	x20, x9, #:dtprel_hi12:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-87.d b/ld/testsuite/ld-aarch64/emit-relocs-87.d
new file mode 100644
index 0000000..dce85b6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-87.d
@@ -0,0 +1,8 @@
+#source: emit-relocs-87.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#...
+.* <.text>:
+  .*:	f2a00015 	movk	x21, #0x0, lsl #16
+			.*: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1	v1
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-87.s b/ld/testsuite/ld-aarch64/emit-relocs-87.s
new file mode 100644
index 0000000..5d1162e
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-87.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x21, #:dtprel_g1:v1
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-88-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-88-overflow.d
new file mode 100644
index 0000000..cedf505
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-88-overflow.d
@@ -0,0 +1,5 @@
+#source: emit-relocs-88-overflow.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-88-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-88-overflow.s
new file mode 100644
index 0000000..a4e5265
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-88-overflow.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	65536
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x21, #:dtprel_g0:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-88.d b/ld/testsuite/ld-aarch64/emit-relocs-88.d
new file mode 100644
index 0000000..a6f6320
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-88.d
@@ -0,0 +1,8 @@
+#source: emit-relocs-88.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#...
+.* <.text>:
+  .*:	f2800015 	movk	x21, #0x0
+			.*: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0	v1
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-88.s b/ld/testsuite/ld-aarch64/emit-relocs-88.s
new file mode 100644
index 0000000..cd5eda2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-88.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x21, #:dtprel_g0:v1
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-89.d b/ld/testsuite/ld-aarch64/emit-relocs-89.d
new file mode 100644
index 0000000..33cf0cc
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-89.d
@@ -0,0 +1,8 @@
+#source: emit-relocs-89.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#...
+.* <.text>:
+  .*:	f2800015 	movk	x21, #0x0
+			.*: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC	v1
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-89.s b/ld/testsuite/ld-aarch64/emit-relocs-89.s
new file mode 100644
index 0000000..b4d135c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-89.s
@@ -0,0 +1,10 @@
+	.global	v1
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.word	0xdeaddead
+v2:
+	.word	0xcafecafe
+
+	.text
+	movk	x21, #:dtprel_g0_nc:v1
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-90-overflow.d b/ld/testsuite/ld-aarch64/emit-relocs-90-overflow.d
new file mode 100644
index 0000000..f5f65b5
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-90-overflow.d
@@ -0,0 +1,5 @@
+#source: emit-relocs-90-overflow.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12 against symbol `v2' .*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-90-overflow.s b/ld/testsuite/ld-aarch64/emit-relocs-90-overflow.s
new file mode 100644
index 0000000..e10298d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-90-overflow.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size	v1, 16777216
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	16777216
+v2:
+	.word	0xcafecafe
+
+	.text
+	add	w20, w9, #:dtprel_hi12:v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-90.d b/ld/testsuite/ld-aarch64/emit-relocs-90.d
new file mode 100644
index 0000000..d6ef58b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-90.d
@@ -0,0 +1,8 @@
+#source: emit-relocs-90.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -e0 --emit-relocs
+#objdump: -dr
+#...
+.* <.text>:
+  .*:	11019134 	add	w20, w9, #0x64
+			.*: R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12	v2
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-90.s b/ld/testsuite/ld-aarch64/emit-relocs-90.s
new file mode 100644
index 0000000..e60f9ba
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-90.s
@@ -0,0 +1,11 @@
+	.global	v1
+	.size v1, 409600
+	.global	v2
+	.section	.tdata,"awT",%progbits
+v1:
+	.zero	409600
+v2:
+	.word	0xcafecafe
+
+	.text
+	add	w20, w9, #:dtprel_hi12:v2
-- 
1.9.1


^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
  2015-08-19 12:32 ` [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC Jiong Wang
@ 2015-08-19 15:12   ` Marcus Shawcroft
  0 siblings, 0 replies; 12+ messages in thread
From: Marcus Shawcroft @ 2015-08-19 15:12 UTC (permalink / raw)
  To: Jiong Wang; +Cc: binutils

On 19 August 2015 at 13:32, Jiong Wang <jiong.wang@arm.com> wrote:
> 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
>
> bfd/
>   * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
>   * bfd-in2.h: Regenerate.
>   * libbfd.h: Regenerate.
>   * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
>   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
>
> gas/
>   * config/tc-aarch64.c (reloc_table): New relocation modifiers.
>   (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
>   (aarch64_force_relocation): Likewise.
>
> gas/testsuite/
>   * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
>   * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
>   * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
>   * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
>
> OK for trunk?

Looks OK to me. /Marcus

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
  2015-08-19 12:32   ` [AArch64][2/6] LD " Jiong Wang
@ 2015-08-19 15:13     ` Marcus Shawcroft
  0 siblings, 0 replies; 12+ messages in thread
From: Marcus Shawcroft @ 2015-08-19 15:13 UTC (permalink / raw)
  To: Jiong Wang; +Cc: binutils

On 19 August 2015 at 13:32, Jiong Wang <jiong.wang@arm.com> wrote:
> 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
>
> bfd/
>   * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
>   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
>   (aarch64_reloc_got_type): Likewise.
>   (elfNN_aarch64_final_link_relocate): Likewise.
>   (elfNN_aarch64_relocate_section): Likewise.
>   * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
>   (_bfd_aarch64_elf_resolve_relocation): Likewise.
>
> ld/testsuite/
>   * ld-aarch64/emit-relocs-530.s: New testcase.
>   * ld-aarch64/emit-relocs-92.s: Likewise.
>   * ld-aarch64/emit-relocs-530.d: New expectation file.
>   * ld-aarch64/emit-relocs-92.d: Likewise.
>   * ld-aarch64/aarch64-elf.exp: Run new testcases.
>
> OK for trunk?

OK /Marcus

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [AArch64][3/6] GAS support TLSLD move/add relocation types
  2015-08-19 12:33     ` [AArch64][3/6] GAS " Jiong Wang
@ 2015-08-19 15:16       ` Marcus Shawcroft
  0 siblings, 0 replies; 12+ messages in thread
From: Marcus Shawcroft @ 2015-08-19 15:16 UTC (permalink / raw)
  To: Jiong Wang; +Cc: binutils

On 19 August 2015 at 13:32, Jiong Wang <jiong.wang@arm.com> wrote:
> All these relocation types are for arithmetic instructions,
> add/movk/movz, they share the same gas internal logic, so put them
> together.
>
> 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
>
> bfd/
>   * reloc.c: New entries, including
>   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.

I think this should be written with the reloc names comma separated
inside (). Otherwise OK.
/Marcus

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [AArch64][4/6] LD support TLSLD move/add relocation types
  2015-08-19 12:33       ` [AArch64][4/6] LD support TLSLD move/add " Jiong Wang
@ 2015-08-19 15:18         ` Marcus Shawcroft
  0 siblings, 0 replies; 12+ messages in thread
From: Marcus Shawcroft @ 2015-08-19 15:18 UTC (permalink / raw)
  To: Jiong Wang; +Cc: binutils

On 19 August 2015 at 13:32, Jiong Wang <jiong.wang@arm.com> wrote:
> 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
>
> bfd/
>   PR ld/18276
>   * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
>   types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
>   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
>   (elfNN_aarch64_final_link_relocate): Likewise.
>   * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
>   (_bfd_aarch64_elf_resolve_relocation): Likewise.

OK /Marcus

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [AArch64][5/6] GAS support TLSLD load/store relocation types
  2015-08-19 12:33         ` [AArch64][5/6] GAS " Jiong Wang
@ 2015-08-19 15:22           ` Marcus Shawcroft
  0 siblings, 0 replies; 12+ messages in thread
From: Marcus Shawcroft @ 2015-08-19 15:22 UTC (permalink / raw)
  To: Jiong Wang; +Cc: binutils

On 19 August 2015 at 13:33, Jiong Wang <jiong.wang@arm.com> wrote:
> All these relocation types are for LDST instructions, they share the
> same gas internal logic, so put them together.
>
> 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
>
> bfd/
>   * reloc.c: New entries, including
>   BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
>   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
>   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
>   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.

I think the reloc name should be comma separated between ().


> gas/
>   * config/tc-aarch64.c (reloc_table): New relocation modifiers.

Please list the relocation modifiers added.

>   (ldst_lo12_determine_real_reloc_type): Support new LDST reloc types.
>   (parse_operands): Likewise.
>   (md_apply_fix): Support new relocation types.

Likewise.

>   (aarch64_force_relocation): Likewise.
>   (process_movw_reloc_info): Likewise.
>
> gas/testsuite/
>   * gas/aarch64/reloc-dtprel-lo12-ldst8.s: New testcase.
>   * gas/aarch64/reloc-dtprel-lo12-ldst8-nc.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst16.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst16-nc.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst32.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst32-nc.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst64.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst64-nc.s: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst8.d: New expectation file.
>   * gas/aarch64/reloc-dtprel-lo12-ldst8-nc.d: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst16.d: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst16-nc.d: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst32.d: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst32-nc.d: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
>   * gas/aarch64/reloc-dtprel-lo12-ldst64-nc.d: Likewise.
>

OK, thanks /Marcus

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [AArch64][6/6] LD support TLSLD load/store relocation types
  2015-08-19 12:33           ` [AArch64][6/6] LD support TLSLD load/store relocation types Jiong Wang
@ 2015-08-19 15:23             ` Marcus Shawcroft
  0 siblings, 0 replies; 12+ messages in thread
From: Marcus Shawcroft @ 2015-08-19 15:23 UTC (permalink / raw)
  To: Jiong Wang; +Cc: binutils

On 19 August 2015 at 13:33, Jiong Wang <jiong.wang@arm.com> wrote:
> 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
>
> bfd/
>   * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
>   types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
>   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
>   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
>   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
>   BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
>   (elfNN_aarch64_final_link_relocate): Likewise.
>   * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
>   (_bfd_aarch64_elf_resolve_relocation): Likewise.

> ld/testsuite/
>   * ld-aarch64/emit-relocs-531.s: New testcase.
>   * ld-aarch64/emit-relocs-531-overflow.s: Likewise.
>   * ld-aarch64/emit-relocs-532.s: Likewise.
>   * ld-aarch64/emit-relocs-533.s: Likewise.
>   * ld-aarch64/emit-relocs-533-overflow.s: Likewise.
>   * ld-aarch64/emit-relocs-534.s: Likewise.
>   * ld-aarch64/emit-relocs-535.s: Likewise.
>   * ld-aarch64/emit-relocs-535-overflow.s: Likewise.
>   * ld-aarch64/emit-relocs-536.s: Likewise.
>   * ld-aarch64/emit-relocs-537.s: Likewise.
>   * ld-aarch64/emit-relocs-537-overflow.s: Likewise.
>   * ld-aarch64/emit-relocs-538.s: Likewise.
>   * ld-aarch64/emit-relocs-531.d: New expectation file.
>   * ld-aarch64/emit-relocs-531-overflow.d: Likewise.
>   * ld-aarch64/emit-relocs-532.d: Likewise.
>   * ld-aarch64/emit-relocs-533.d: Likewise.
>   * ld-aarch64/emit-relocs-533-overflow.d: Likewise.
>   * ld-aarch64/emit-relocs-534.d: Likewise.
>   * ld-aarch64/emit-relocs-535.d: Likewise.
>   * ld-aarch64/emit-relocs-535-overflow.d: Likewise.
>   * ld-aarch64/emit-relocs-536.d: Likewise.
>   * ld-aarch64/emit-relocs-537.d: Likewise.
>   * ld-aarch64/emit-relocs-537-overflow.d: Likewise.
>   * ld-aarch64/emit-relocs-538.d: Likewise.
>   * ld-aarch64/aarch64-elf.exp: Run new testcases.

OK /Marcus

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2015-08-19 15:23 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
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2015-08-19 12:32 ` [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC Jiong Wang
2015-08-19 15:12   ` Marcus Shawcroft
     [not found] ` <55D46E1D.4000104@arm.com>
2015-08-19 12:32   ` [AArch64][2/6] LD " Jiong Wang
2015-08-19 15:13     ` Marcus Shawcroft
     [not found]   ` <55D46E7A.3010004@arm.com>
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     [not found]         ` <55D471B2.2010009@arm.com>
2015-08-19 12:33           ` [AArch64][6/6] LD support TLSLD load/store relocation types Jiong Wang
2015-08-19 15:23             ` Marcus Shawcroft
2015-08-19 12:33         ` [AArch64][5/6] GAS " Jiong Wang
2015-08-19 15:22           ` Marcus Shawcroft
2015-08-19 12:33       ` [AArch64][4/6] LD support TLSLD move/add " Jiong Wang
2015-08-19 15:18         ` Marcus Shawcroft
2015-08-19 12:33     ` [AArch64][3/6] GAS " Jiong Wang
2015-08-19 15:16       ` Marcus Shawcroft

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