The RISC-V Type U instruction (.insn u) at
https://sourceware.org/binutils/docs/as/RISC_002dV_002dFormats.html
shows an incorrect format for the `simm20` immediate.  The bits should
be sequentially arranged (simm20[19:0]) which is how `gas` treats
them, but instead they appear in the Type J format
(simm20[20|10:1|11|19:12]) in the documentation.
Additionally, I changed all occurrences of `opcode6` to `opcode7`
since the opcode has 7 bits, not 6.

(This is my first patch on this project, so my apologies if the format
is not correct!)

As a side note, and speaking of off-by-one errors, I don't quite like
the bit numbering in the instructions: the numbers appear in the ASCII
box diagrams directly under the field boundaries; they should either
appear slightly to the left (indicating that they refer to the first
bit of the next field) or to the right in the case of the leftmost 31;
otherwise it becomes a little confusing (especially since the leftmost
field appears to have one bit less).
Alternatively, you may go full "Python style limits" and
systematically write the index of the bit to the left of the boundary
-- i.e., replace all those 31 with 32 (and the 30 in Type J with 31).
Otherwise the leftmost field is "different".
A third, more explicit but maybe too verbose option is to include both
boundaries in every field.

Thanks in advance.
Keep up the good work!