From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe33.google.com (mail-vs1-xe33.google.com [IPv6:2607:f8b0:4864:20::e33]) by sourceware.org (Postfix) with ESMTPS id A22113858D32 for ; Thu, 7 Jul 2022 04:25:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A22113858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-vs1-xe33.google.com with SMTP id 126so17065888vsq.13 for ; Wed, 06 Jul 2022 21:25:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=jdGZbgxEAhOHm++qC2rc8Z/5fVA8btKny5fE+DtOwkQ=; b=k5JT6ExKwj24PUR8H0JA6c8RIP37I6sbRdnMUtp1wN6RPn5G3ClWjXC4toszEnIWK8 mm1QPa7yGtz8ccaxGmklLAPdSYuAQkE7aCtj9pjO7oJGCNhTpge0yqRQuqPo90mSiwHI brM/W4vGsKbhb0SOn0TKKK6xnphHzFD1MzmimAJIGme7m+/WqaDOUyuJEx/M6jrCWHcI cdQeu2XVc5Z/JsUyuE2PiXCK7ivrG8ssPIYMI8MuIxy1DWEByBBMXz86ffrAZ/jMCndS Gz/nho1scRuP3tArBw0MJWY3K895+P+MqI3/VdMQW9DzpMskSucFWxlOPI2ZftWBgUS9 fH7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=jdGZbgxEAhOHm++qC2rc8Z/5fVA8btKny5fE+DtOwkQ=; b=yWu3uad9KO7B2qipcRzBthsnpVbkVC5IazzXxI/SnvI0TG8rATkdVRGzwy/+IyTcwA 4q3Qw0IaBbrzqwyu4fGx4qTU0SVTPySBBF/TtNwbhoaIedSUtlGe46R7KcXiWKQ/CQzm sT8gYYbOOCtFp3APKWSiCA488x6ktBRF8L7YfdRIV2PZGn05543twwFAd9fs8lbbakjk IUCNcEVbr9fjXbmdglLbqRxqn4308+3UqViX49FBeIOOFVjYiBtVVXOcj6lDzIrVz0f/ Lh90rpdFQHJhG379+yOL54AihKzsMXw+HVtCz30rGC+ocVpS6uBI3HuG4lXVdfpOCydI N+wA== X-Gm-Message-State: AJIora9dXa/vQ+ogaUQ8i7//68s6o831pnVAg2jhyFMIENKPErFq4xIw n+2RUS18/qEr44jbwyeJofxHOz6iKkobpNS0jNWbHA== X-Google-Smtp-Source: AGRyM1tUXNZ4LDP/bDa95/6CpHdk8QFIIuPsvACxhyKTctqeUHc3ZpcBXxQlWdpOEf1CXQx6wYoOoJwDlHy7tB6j7wQ= X-Received: by 2002:a05:6102:370d:b0:356:f866:831c with SMTP id s13-20020a056102370d00b00356f866831cmr7090656vst.87.1657167918976; Wed, 06 Jul 2022 21:25:18 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Nelson Chu Date: Thu, 7 Jul 2022 12:25:08 +0800 Message-ID: Subject: Re: [PATCH v3 1/2] RISC-V: Fix requirement handling on Zhinx+{D,Q} To: Kito Cheng Cc: Tsukasa OI , Palmer Dabbelt , Kito Cheng , Weiwei Li , Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jul 2022 04:25:21 -0000 OK, regressions passed so committed. Thanks Nelson On Thu, Jul 7, 2022 at 11:02 AM Kito Cheng wrote: > > LGTM > > On Fri, Jun 24, 2022 at 11:52 AM Tsukasa OI via Binutils > wrote: > > > > This commit fixes how instructions are masked on Zhinx+Z{d,q}inx. > > fcvt.h.d and fcvt.d.h require ((D&&Zfh)||(Zdinx&&Zhinx)) and > > fcvt.h.q and fcvt.q.h require ((Q&&Zfh)||(Zqinx&&Zhinx)). > > > > bfd/ChangeLog: > > > > * elfxx-riscv.c (riscv_multi_subset_supports): Fix feature gate > > on INSN_CLASS_{D,Q}_AND_ZFH_INX. > > (riscv_multi_subset_supports_ext): Fix feature gate diagnostics > > on INSN_CLASS_{D,Q}_AND_ZFH_INX. > > > > gas/ChangeLog: > > > > * testsuite/gas/riscv/fp-zhinx-insns.d: Add Zqinx to -march > > for proper testing. > > --- > > bfd/elfxx-riscv.c | 30 ++++++++++++++++++++---- > > gas/testsuite/gas/riscv/fp-zhinx-insns.d | 2 +- > > 2 files changed, 26 insertions(+), 6 deletions(-) > > > > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > > index f920e0ce9ff..308516c3e60 100644 > > --- a/bfd/elfxx-riscv.c > > +++ b/bfd/elfxx-riscv.c > > @@ -2337,15 +2337,17 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, > > return riscv_subset_supports (rps, "zfh"); > > case INSN_CLASS_ZFH_OR_ZHINX: > > return riscv_subset_supports (rps, "zfh") > > - || riscv_subset_supports (rps, "zhinx"); > > + || riscv_subset_supports (rps, "zhinx"); > > case INSN_CLASS_D_AND_ZFH_INX: > > return (riscv_subset_supports (rps, "d") > > && riscv_subset_supports (rps, "zfh")) > > - || riscv_subset_supports (rps, "zhinx"); > > + || (riscv_subset_supports (rps, "zdinx") > > + && riscv_subset_supports (rps, "zhinx")); > > case INSN_CLASS_Q_AND_ZFH_INX: > > return (riscv_subset_supports (rps, "q") > > && riscv_subset_supports (rps, "zfh")) > > - || riscv_subset_supports (rps, "zhinx"); > > + || (riscv_subset_supports (rps, "zqinx") > > + && riscv_subset_supports (rps, "zhinx")); > > case INSN_CLASS_ZBA: > > return riscv_subset_supports (rps, "zba"); > > case INSN_CLASS_ZBB: > > @@ -2492,9 +2494,27 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, > > case INSN_CLASS_ZFH_OR_ZHINX: > > return _("zfh' or 'zhinx"); > > case INSN_CLASS_D_AND_ZFH_INX: > > - return _("('d' and 'zfh') or 'zhinx"); > > + if (riscv_subset_supports (rps, "zfh")) > > + return "d"; > > + else if (riscv_subset_supports (rps, "d")) > > + return "zfh"; > > + else if (riscv_subset_supports (rps, "zhinx")) > > + return "zdinx"; > > + else if (riscv_subset_supports (rps, "zdinx")) > > + return "zhinx"; > > + else > > + return _("zfh' and `d', or `zhinx' and `zdinx"); > > case INSN_CLASS_Q_AND_ZFH_INX: > > - return _("('q' and 'zfh') or 'zhinx"); > > + if (riscv_subset_supports (rps, "zfh")) > > + return "q"; > > + else if (riscv_subset_supports (rps, "q")) > > + return "zfh"; > > + else if (riscv_subset_supports (rps, "zhinx")) > > + return "zqinx"; > > + else if (riscv_subset_supports (rps, "zqinx")) > > + return "zhinx"; > > + else > > + return _("zfh' and `q', or `zhinx' and `zqinx"); > > case INSN_CLASS_H: > > return _("h"); > > default: > > diff --git a/gas/testsuite/gas/riscv/fp-zhinx-insns.d b/gas/testsuite/gas/riscv/fp-zhinx-insns.d > > index 6e1c40e65f5..2592d8c74e2 100644 > > --- a/gas/testsuite/gas/riscv/fp-zhinx-insns.d > > +++ b/gas/testsuite/gas/riscv/fp-zhinx-insns.d > > @@ -1,4 +1,4 @@ > > -#as: -march=rv64ima_zhinx > > +#as: -march=rv64ima_zqinx_zhinx > > #source: fp-zhinx-insns.s > > #objdump: -dr > > > > -- > > 2.34.1 > >