Re: [PATCH v2 1/1] RISC-V: Fix RV32Q conflict

[Nelson Chu <nelson.chu@sifive.com>]

On Sun, Feb 27, 2022 at 4:51 PM Tsukasa OI <research_trasio@irq.a4lg.com> wrote:
>
> This commit makes RV32 + 'Q' extension (version 2.2 or later) not
> conflicting since this combination is no longer prohibited by the
> specification.
>
> bfd/ChangeLog:
>
>         * elfxx-riscv.c (riscv_parse_check_conflicts): Remove conflict
>         detection that prohibits RV32Q on 'Q' version 2.2 or later.
>
> gas/ChangeLog:
>
>         * testsuite/gas/riscv/march-fail-rv32iq.d: Removed.
>         * testsuite/gas/riscv/march-fail-rv32iq.l: Likewise.
>         * testsuite/gas/riscv/march-fail-rv32iq2p0.d: New test
>         showing RV32IQ fails on 'Q' extension version 2.0.
>         * testsuite/gas/riscv/march-fail-rv32iq2p0.l: Likewise.
>         * testsuite/gas/riscv/march-fail-rv32iq2.d: Likewise.
>         * testsuite/gas/riscv/march-fail-rv32iq-isa-2p2.d: New test
>         showing RV32IQ fails on ISA specification version 2.2.
>         * testsuite/gas/riscv/march-ok-rv32iq2p2.d: New test
>         showing RV32IQ succesds on 'Q' extension version 2.2.
>         * testsuite/gas/riscv/march-ok-rv32iq-isa-20190608.d: New test
>         showing RV32IQ succesds on ISA specification 20190608.

Most of these testcases seems redundant, just test two of them should
be enough - rv32iq2p0 and rv32iq2p2.  Test ISA spec version here is
unnecessary, since they don't really related to this patch.  Anyway,
we could scale them down in the future patches, so committed for now.

Thanks
Nelson

> ---
>  bfd/elfxx-riscv.c                                            | 5 +++--
>  gas/testsuite/gas/riscv/march-fail-rv32iq-isa-2p2.d          | 3 +++
>  gas/testsuite/gas/riscv/march-fail-rv32iq.d                  | 3 ---
>  gas/testsuite/gas/riscv/march-fail-rv32iq2.d                 | 3 +++
>  gas/testsuite/gas/riscv/march-fail-rv32iq2p0.d               | 3 +++
>  .../riscv/{march-fail-rv32iq.l => march-fail-rv32iq2p0.l}    | 0
>  gas/testsuite/gas/riscv/march-ok-rv32iq-isa-20190608.d       | 5 +++++
>  gas/testsuite/gas/riscv/march-ok-rv32iq2p2.d                 | 5 +++++
>  8 files changed, 22 insertions(+), 5 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/march-fail-rv32iq-isa-2p2.d
>  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32iq.d
>  create mode 100644 gas/testsuite/gas/riscv/march-fail-rv32iq2.d
>  create mode 100644 gas/testsuite/gas/riscv/march-fail-rv32iq2p0.d
>  rename gas/testsuite/gas/riscv/{march-fail-rv32iq.l => march-fail-rv32iq2p0.l} (100%)
>  create mode 100644 gas/testsuite/gas/riscv/march-ok-rv32iq-isa-20190608.d
>  create mode 100644 gas/testsuite/gas/riscv/march-ok-rv32iq2p2.d
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 2915b74dd0f..17567b2af54 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1880,10 +1880,11 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
>        no_conflict = false;
>      }
>    if (riscv_lookup_subset (rps->subset_list, "q", &subset)
> +      && (subset->major_version < 2 || (subset->major_version == 2
> +                                       && subset->minor_version < 2))
>        && xlen < 64)
>      {
> -      rps->error_handler
> -        (_("rv%d does not support the `q' extension"), xlen);
> +      rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
>        no_conflict = false;
>      }
>    if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32iq-isa-2p2.d b/gas/testsuite/gas/riscv/march-fail-rv32iq-isa-2p2.d
> new file mode 100644
> index 00000000000..16451b0f43f
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/march-fail-rv32iq-isa-2p2.d
> @@ -0,0 +1,3 @@
> +#as: -misa-spec=2.2 -march=rv32iq
> +#source: empty.s
> +#error_output: march-fail-rv32iq2p0.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32iq.d b/gas/testsuite/gas/riscv/march-fail-rv32iq.d
> deleted file mode 100644
> index c289c695cad..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32iq.d
> +++ /dev/null
> @@ -1,3 +0,0 @@
> -#as: -march=rv32iq
> -#source: empty.s
> -#error_output: march-fail-rv32iq.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32iq2.d b/gas/testsuite/gas/riscv/march-fail-rv32iq2.d
> new file mode 100644
> index 00000000000..34fce730ce5
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/march-fail-rv32iq2.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32iq2
> +#source: empty.s
> +#error_output: march-fail-rv32iq2p0.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32iq2p0.d b/gas/testsuite/gas/riscv/march-fail-rv32iq2p0.d
> new file mode 100644
> index 00000000000..916f845a970
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/march-fail-rv32iq2p0.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32iq2p0
> +#source: empty.s
> +#error_output: march-fail-rv32iq2p0.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32iq.l b/gas/testsuite/gas/riscv/march-fail-rv32iq2p0.l
> similarity index 100%
> rename from gas/testsuite/gas/riscv/march-fail-rv32iq.l
> rename to gas/testsuite/gas/riscv/march-fail-rv32iq2p0.l
> diff --git a/gas/testsuite/gas/riscv/march-ok-rv32iq-isa-20190608.d b/gas/testsuite/gas/riscv/march-ok-rv32iq-isa-20190608.d
> new file mode 100644
> index 00000000000..8322957948d
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/march-ok-rv32iq-isa-20190608.d
> @@ -0,0 +1,5 @@
> +#as: -misa-spec=20190608 -march=rv32iq
> +#objdump: -dr
> +#source: empty.s
> +
> +.*:     file format elf32-(little|big)riscv
> diff --git a/gas/testsuite/gas/riscv/march-ok-rv32iq2p2.d b/gas/testsuite/gas/riscv/march-ok-rv32iq2p2.d
> new file mode 100644
> index 00000000000..1a922bfaa4d
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/march-ok-rv32iq2p2.d
> @@ -0,0 +1,5 @@
> +#as: -march=rv32iq2p2
> +#objdump: -dr
> +#source: empty.s
> +
> +.*:     file format elf32-(little|big)riscv
> --
> 2.32.0
>