From: Nelson Chu <nelson.chu@sifive.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 1/3] RISC-V: Remove a loop in the ISA parser
Date: Fri, 25 Feb 2022 17:10:15 +0800 [thread overview]
Message-ID: <CAJYME4GJuW1Ud_FofHdCF=opKwi3dZYkyiMLVop3pS+cBq_+xg@mail.gmail.com> (raw)
In-Reply-To: <a86ea82baa70769b05f0283fdaeb50ab193cae66.1645580829.git.research_trasio@irq.a4lg.com>
On Wed, Feb 23, 2022 at 9:48 AM Tsukasa OI via Binutils
<binutils@sourceware.org> wrote:
>
> Since commit e601909a3287bf541c6a7d82214bb387d2c76d82 ("RISC-V: Support
> to parse the multi-letter prefix in the architecture string.") changed
> so that all prefixed extensions are parsed in single
> riscv_parse_prefixed_ext call, a "while" loop on riscv_parse_subset
> is no longer required.
Make sense! LGTM, so committed.
Thanks
Nelson
> bfd/ChangeLog:
>
> * elfxx-riscv.c (riscv_parse_subset): Remove unnecessary loop.
> ---
> bfd/elfxx-riscv.c | 11 ++++-------
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 27d06d2fa3d..329dcaed304 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -2019,14 +2019,11 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
> if (p == NULL)
> return false;
>
> - /* Parse the different classes of extensions in the specified order. */
> - while (*p != '\0')
> - {
> - p = riscv_parse_prefixed_ext (rps, arch, p);
> + /* Parse prefixed extensions. */
> + p = riscv_parse_prefixed_ext (rps, arch, p);
>
> - if (p == NULL)
> - return false;
> - }
> + if (p == NULL)
> + return false;
>
> /* Finally add implicit extensions according to the current
> extensions. */
> --
> 2.32.0
>
next prev parent reply other threads:[~2022-02-25 9:10 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-23 1:47 [PATCH 0/3] RISC-V: Make ISA parser stricter (with code clarity improvement) Tsukasa OI
2022-02-23 1:47 ` [PATCH 1/3] RISC-V: Remove a loop in the ISA parser Tsukasa OI
2022-02-25 9:10 ` Nelson Chu [this message]
2022-02-23 1:47 ` [PATCH 2/3] RISC-V: Stricter underscore handling for ISA Tsukasa OI
2022-02-25 9:22 ` Nelson Chu
2022-02-25 9:37 ` Kito Cheng
2022-02-25 11:26 ` Andrew Waterman
2022-02-23 1:47 ` [PATCH 3/3] RISC-V: Tests for ISA string handling (underscore) Tsukasa OI
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