From: Nelson Chu <nelson.chu@sifive.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 1/6] RISC-V: Reorganize testcases for CFI directives
Date: Wed, 23 Feb 2022 14:58:08 +0800 [thread overview]
Message-ID: <CAJYME4GZgn1G2+XQphPh1osyXaz2b4gAitPg8EcoM87xDBv7Hw@mail.gmail.com> (raw)
In-Reply-To: <fa533938ef1b9a2385f80aed0ab3ddb943efdab3.1641898723.git.research_trasio@irq.a4lg.com>
OK, committed.
Thanks
Nelson
On Tue, Jan 11, 2022 at 7:00 PM Tsukasa OI via Binutils
<binutils@sourceware.org> wrote:
>
> This commit reorganizes and adds some CSRs to csr-dw-regnums.[sd] to
> make it test the same CSRs as csr.s.
>
> gas/ChangeLog:
>
> * testsuite/gas/riscv/csr-dw-regnums.s: Reorganize and add
> defined CSRs tested in csr.s.
> * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
> ---
> gas/testsuite/gas/riscv/csr-dw-regnums.d | 48 ++++++++++++++++++----
> gas/testsuite/gas/riscv/csr-dw-regnums.s | 51 +++++++++++++++++++++---
> 2 files changed, 86 insertions(+), 13 deletions(-)
>
> diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
> index ea0a445c39c..2aa5ff4bcee 100644
> --- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
> +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv32if -mpriv-spec=1.11
> +#as: -march=rv32if -mpriv-spec=1.12
> #objdump: --dwarf=frames
>
>
> @@ -229,6 +229,37 @@ Contents of the .* section:
> DW_CFA_offset_extended_sf: r4925 \(mhpmevent29\) at cfa\+3316
> DW_CFA_offset_extended_sf: r4926 \(mhpmevent30\) at cfa\+3320
> DW_CFA_offset_extended_sf: r4927 \(mhpmevent31\) at cfa\+3324
> + DW_CFA_offset_extended_sf: r5632 \(hstatus\) at cfa\+6144
> + DW_CFA_offset_extended_sf: r5634 \(hedeleg\) at cfa\+6152
> + DW_CFA_offset_extended_sf: r5635 \(hideleg\) at cfa\+6156
> + DW_CFA_offset_extended_sf: r5636 \(hie\) at cfa\+6160
> + DW_CFA_offset_extended_sf: r5638 \(hcounteren\) at cfa\+6168
> + DW_CFA_offset_extended_sf: r5639 \(hgeie\) at cfa\+6172
> + DW_CFA_offset_extended_sf: r5699 \(htval\) at cfa\+6412
> + DW_CFA_offset_extended_sf: r5700 \(hip\) at cfa\+6416
> + DW_CFA_offset_extended_sf: r5701 \(hvip\) at cfa\+6420
> + DW_CFA_offset_extended_sf: r5706 \(htinst\) at cfa\+6440
> + DW_CFA_offset_extended_sf: r7698 \(hgeip\) at cfa\+14408
> + DW_CFA_offset_extended_sf: r5642 \(henvcfg\) at cfa\+6184
> + DW_CFA_offset_extended_sf: r5658 \(henvcfgh\) at cfa\+6248
> + DW_CFA_offset_extended_sf: r5760 \(hgatp\) at cfa\+6656
> + DW_CFA_offset_extended_sf: r5800 \(hcontext\) at cfa\+6816
> + DW_CFA_offset_extended_sf: r5637 \(htimedelta\) at cfa\+6164
> + DW_CFA_offset_extended_sf: r5653 \(htimedeltah\) at cfa\+6228
> + DW_CFA_offset_extended_sf: r4608 \(vsstatus\) at cfa\+2048
> + DW_CFA_offset_extended_sf: r4612 \(vsie\) at cfa\+2064
> + DW_CFA_offset_extended_sf: r4613 \(vstvec\) at cfa\+2068
> + DW_CFA_offset_extended_sf: r4672 \(vsscratch\) at cfa\+2304
> + DW_CFA_offset_extended_sf: r4673 \(vsepc\) at cfa\+2308
> + DW_CFA_offset_extended_sf: r4674 \(vscause\) at cfa\+2312
> + DW_CFA_offset_extended_sf: r4675 \(vstval\) at cfa\+2316
> + DW_CFA_offset_extended_sf: r4676 \(vsip\) at cfa\+2320
> + DW_CFA_offset_extended_sf: r4736 \(vsatp\) at cfa\+2560
> + DW_CFA_offset_extended_sf: r4163 \(utval\) at cfa\+268
> + DW_CFA_offset_extended_sf: r4419 \(stval\) at cfa\+1292
> + DW_CFA_offset_extended_sf: r4480 \(satp\) at cfa\+1536
> + DW_CFA_offset_extended_sf: r4931 \(mtval\) at cfa\+3340
> + DW_CFA_offset_extended_sf: r4896 \(mcountinhibit\) at cfa\+3200
> DW_CFA_offset_extended_sf: r4992 \(mbase\) at cfa\+3584
> DW_CFA_offset_extended_sf: r4993 \(mbound\) at cfa\+3588
> DW_CFA_offset_extended_sf: r4994 \(mibase\) at cfa\+3592
> @@ -244,6 +275,7 @@ Contents of the .* section:
> DW_CFA_offset_extended_sf: r6065 \(dpc\) at cfa\+7876
> DW_CFA_offset_extended_sf: r6066 \(dscratch0\) at cfa\+7880
> DW_CFA_offset_extended_sf: r6067 \(dscratch1\) at cfa\+7884
> + DW_CFA_offset_extended_sf: r6066 \(dscratch0\) at cfa\+7880
> DW_CFA_offset_extended_sf: r6048 \(tselect\) at cfa\+7808
> DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
> DW_CFA_offset_extended_sf: r6050 \(tdata2\) at cfa\+7816
> @@ -252,16 +284,18 @@ Contents of the .* section:
> DW_CFA_offset_extended_sf: r6053 \(tcontrol\) at cfa\+7828
> DW_CFA_offset_extended_sf: r6056 \(mcontext\) at cfa\+7840
> DW_CFA_offset_extended_sf: r6058 \(scontext\) at cfa\+7848
> - DW_CFA_offset_extended_sf: r4163 \(utval\) at cfa\+268
> - DW_CFA_offset_extended_sf: r4419 \(stval\) at cfa\+1292
> - DW_CFA_offset_extended_sf: r4480 \(satp\) at cfa\+1536
> - DW_CFA_offset_extended_sf: r4931 \(mtval\) at cfa\+3340
> - DW_CFA_offset_extended_sf: r4896 \(mcountinhibit\) at cfa\+3200
> - DW_CFA_offset_extended_sf: r6066 \(dscratch0\) at cfa\+7880
> DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
> DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
> DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
> DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
> DW_CFA_offset_extended_sf: r6051 \(tdata3\) at cfa\+7820
> DW_CFA_offset_extended_sf: r6051 \(tdata3\) at cfa\+7820
> + DW_CFA_offset_extended_sf: r4117 \(seed\) at cfa\+84
> + DW_CFA_offset_extended_sf: r4104 \(vstart\) at cfa\+32
> + DW_CFA_offset_extended_sf: r4105 \(vxsat\) at cfa\+36
> + DW_CFA_offset_extended_sf: r4106 \(vxrm\) at cfa\+40
> + DW_CFA_offset_extended_sf: r4111 \(vcsr\) at cfa\+60
> + DW_CFA_offset_extended_sf: r7200 \(vl\) at cfa\+12416
> + DW_CFA_offset_extended_sf: r7201 \(vtype\) at cfa\+12420
> + DW_CFA_offset_extended_sf: r7202 \(vlenb\) at cfa\+12424
> #...
> diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
> index 549475d650e..2431a23f37c 100644
> --- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
> +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
> @@ -219,6 +219,39 @@ _start:
> .cfi_offset mhpmevent29, 3316
> .cfi_offset mhpmevent30, 3320
> .cfi_offset mhpmevent31, 3324
> + # Hypervisor extension (Privileged Architecture, version 1.12)
> + .cfi_offset hstatus, 6144
> + .cfi_offset hedeleg, 6152
> + .cfi_offset hideleg, 6156
> + .cfi_offset hie, 6160
> + .cfi_offset hcounteren, 6168
> + .cfi_offset hgeie, 6172
> + .cfi_offset htval, 6412
> + .cfi_offset hip, 6416
> + .cfi_offset hvip, 6420
> + .cfi_offset htinst, 6440
> + .cfi_offset hgeip, 14408
> + .cfi_offset henvcfg, 6184
> + .cfi_offset henvcfgh, 6248
> + .cfi_offset hgatp, 6656
> + .cfi_offset hcontext, 6816
> + .cfi_offset htimedelta, 6164
> + .cfi_offset htimedeltah, 6228
> + .cfi_offset vsstatus, 2048
> + .cfi_offset vsie, 2064
> + .cfi_offset vstvec, 2068
> + .cfi_offset vsscratch, 2304
> + .cfi_offset vsepc, 2308
> + .cfi_offset vscause, 2312
> + .cfi_offset vstval, 2316
> + .cfi_offset vsip, 2320
> + .cfi_offset vsatp, 2560
> + # dropped aliases
> + .cfi_offset ubadaddr, 268
> + .cfi_offset sbadaddr, 1292
> + .cfi_offset sptbr, 1536
> + .cfi_offset mbadaddr, 3340
> + .cfi_offset mucounteren, 3200
> # dropped
> .cfi_offset mbase, 3584
> .cfi_offset mbound, 3588
> @@ -236,6 +269,9 @@ _start:
> .cfi_offset dpc, 7876
> .cfi_offset dscratch0, 7880
> .cfi_offset dscratch1, 7884
> + # unprivileged alias
> + .cfi_offset dscratch, 7880
> + # unprivileged
> .cfi_offset tselect, 7808
> .cfi_offset tdata1, 7812
> .cfi_offset tdata2, 7816
> @@ -245,17 +281,20 @@ _start:
> .cfi_offset mcontext, 7840
> .cfi_offset scontext, 7848
> # aliases
> - .cfi_offset ubadaddr, 268
> - .cfi_offset sbadaddr, 1292
> - .cfi_offset sptbr, 1536
> - .cfi_offset mbadaddr, 3340
> - .cfi_offset mucounteren, 3200
> - .cfi_offset dscratch, 7880
> .cfi_offset mcontrol, 7812
> .cfi_offset icount, 7812
> .cfi_offset itrigger, 7812
> .cfi_offset etrigger, 7812
> .cfi_offset textra32, 7820
> .cfi_offset textra64, 7820
> + # unprivileged
> + .cfi_offset seed, 84
> + .cfi_offset vstart, 32
> + .cfi_offset vxsat, 36
> + .cfi_offset vxrm, 40
> + .cfi_offset vcsr, 60
> + .cfi_offset vl, 12416
> + .cfi_offset vtype, 12420
> + .cfi_offset vlenb, 12424
> nop
> .cfi_endproc
> --
> 2.32.0
>
next prev parent reply other threads:[~2022-02-23 6:58 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-11 10:59 [PATCH 0/6] RISC-V: Add Privileged Arch 1.12 and More CSRs Tsukasa OI
2022-01-11 10:59 ` [PATCH 1/6] RISC-V: Reorganize testcases for CFI directives Tsukasa OI
2022-02-23 6:58 ` Nelson Chu [this message]
2022-01-11 10:59 ` [PATCH 2/6] RISC-V: Add Privileged Architecture 1.12 CSRs Tsukasa OI
2022-02-23 6:58 ` Nelson Chu
2022-02-24 2:35 ` Tsukasa OI
2022-02-24 6:05 ` Nelson Chu
2022-01-11 10:59 ` [PATCH 3/6] RISC-V: Add Privileged Arch 1.12 CSR testcases Tsukasa OI
2022-02-23 6:58 ` Nelson Chu
2022-01-11 10:59 ` [PATCH 4/6] RISC-V: Add 'Smstateen' extension and its CSRs Tsukasa OI
2022-01-11 10:59 ` [PATCH 5/6] RISC-V: Add 'Sscofpmf' extension with " Tsukasa OI
2022-01-11 10:59 ` [PATCH 6/6] RISC-V: Add 'Sstc' extension and " Tsukasa OI
2022-02-24 12:10 ` [PATCH 0/3] RISC-V: Add CSRs for several supervisor extensions Tsukasa OI
2022-02-24 12:10 ` [PATCH 1/3] RISC-V: Add 'Smstateen' extension and its CSRs Tsukasa OI
2022-02-25 6:32 ` Nelson Chu
2022-02-25 6:35 ` Tsukasa OI
2022-02-25 10:51 ` Tsukasa OI
2022-03-02 4:34 ` Nelson Chu
2022-02-24 12:10 ` [PATCH 2/3] RISC-V: Add 'Sscofpmf' extension with " Tsukasa OI
2022-02-24 12:10 ` [PATCH 3/3] RISC-V: Add 'Sstc' extension and " Tsukasa OI
2022-05-24 9:35 ` [PATCH v2 0/3] RISC-V: Add CSRs for several supervisor extensions Tsukasa OI
2022-05-24 9:35 ` [PATCH v2 1/3] RISC-V: Add 'Smstateen' extension and its CSRs Tsukasa OI
2022-05-24 9:35 ` [PATCH v2 2/3] RISC-V: Add 'Sscofpmf' extension with " Tsukasa OI
2022-05-24 9:35 ` [PATCH v2 3/3] RISC-V: Add 'Sstc' extension and " Tsukasa OI
2022-06-24 2:51 ` [PATCH v3 0/4] RISC-V: Add CSRs for several supervisor extensions Tsukasa OI
2022-06-24 2:51 ` [PATCH v3 1/4] RISC-V: Add new CSR feature gate handling (RV32,H) Tsukasa OI
2022-06-24 2:51 ` [PATCH v3 2/4] RISC-V: Add 'Smstateen' extension and its CSRs Tsukasa OI
2022-06-24 2:51 ` [PATCH v3 3/4] RISC-V: Add 'Sscofpmf' extension with " Tsukasa OI
2022-06-24 2:51 ` [PATCH v3 4/4] RISC-V: Add 'Sstc' extension and " Tsukasa OI
2022-06-28 1:40 ` [PATCH v3 0/4] RISC-V: Add CSRs for several supervisor extensions Nelson Chu
2022-06-28 5:33 ` Tsukasa OI
2022-06-28 6:56 ` Nelson Chu
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