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* [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR
@ 2020-04-18 11:07 Nelson Chu
  2020-04-18 11:07 ` [PATCH 1/7] RISC-V: Remove the redundant gas test file Nelson Chu
                   ` (8 more replies)
  0 siblings, 9 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

Hi binutils and gdb,

I know every RISCV contirbutors all do the best to maintain the compatibility
between different spec versions.  But the specs are changed frequently, and
sometimes it is very hard to keep the compatibility if we don't have a good
way to deal with versioning problems.  Since different ISA specs define
different instructions, and different privilege specs define different CSR,
both of them need the version checking and controling mechanism.

For the ISA versions, you can set them by the RISCV ELF architecture attribute
and assembler option -march, but you have to set them one by one for each
extension.  It seems not so friendly for user, so Kito Cheng proposed a good
solution to resolve the problem.  That is, support the new assembler options and
default configure options to reduce the burdens when setting ISA versions.
The original idea and discussion are come from the following link,

https://groups.google.com/a/groups.riscv.org/forum/#!msg/sw-dev/aZhMG7NIVTk/PTZEaTWiAwAJ)

=== New Assembler Options ===

* -misa-spec = [2p0|2p1|2p2|20190608|20191213]
You can simply choose the ISA spec by this option, and then assembler will set
the version for the standard extensions if you don’t set in the ELF arch
attributes or -march option.

* -mriscv-isa-version = <ISA-string>
The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
prefix.  There are two reasons that you may need this option,

1. Some versions of extensions defined in the ISA spec are not matched to the
toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
have to use this option to choose the correct version for V-ext.

2. You want to update the version for the specific standard extensions if the
version are not set in the ELF arch attributes and -march option.

=== New Default Configure Options ===

* --with-arch = <ISA-string>
The syntax of <ISA-string> is same as -march option.  Assembler will check this
if -march option and ELF arch attributes aren’t set.

* --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
The syntax is same as -misa-spec option.  Assembler will check this if
-misa-spec option isn’t set.

* --with-riscv-isa-version = <ISA-string>
The syntax of <ISA-string> is same as -mriscv-isa-version option.  Assembler
will check this if -mriscv-isa-version option isn’t set.

=== The Priority of these options ===

* ELF arch attributes > Assembler options > Default configure options
* For GAS options, -march > -mriscv-isa-version > -misa-spec
* For configure options, --with-arch > --with-riscv-isa-version > --with-isa-spec

=== Example ===

$ cat test.s
.attribute arch, "rv32i1p9fv_zicsr"

$ riscv32-unknown-elf-as -march-attr -misa-spec=2p2 -mriscv-isa-version=i2p1a2p1v0p9 test.s -o test.o

$ riscv32-unknown-elf-readelf -A test.o
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
...

The above example covers most cases.

* For i-ext, we already set the version 1p9 in elf attribute, so -misa-spec and
-mriscv-isa-version don't update the version to 2p0 and 2p1.

* For f-ext, we don't set the version to it, so use the default version 2p0
according to the ISA spec 2p2.

* For v-ext, the default version is 0p7 according to ISA spec 2p2, but we use
-mriscv-isa-version to update it to 0p9.

* For a-ext, it isn't enabled by -march or elf attribute, so we don't update it's
version even if -mriscv-isa-version is set.

* As for the zicsr extension, it is defined in the lastest ISA spec rather than 2p2,
so set it's version to 0p0.


As for the privilege version, I get the related request in the following link,
https://github.com/riscv/riscv-binutils-gdb/issues/202

We also support new assembler options to choose the spec you want, and then
assembler will generate the correct CSR address according to the chosen spec.
If the obselete CSR name is used, then report the warning message when the
-mcsr-check is set, and use the latest defined address for the CSR.  Of course,
you can also choose the spec by setting the orginal RISCV ELF priv attributes.
Beside, the disassembler can show the CSR according to the chosen privilege spec
by the new disassmebler option.  However, the CSR address is showed directly if
it is invalid for the chosen spec.

=== New Assembler Option ===

* -mpriv-spec=[1p9|1p9p1|1p10|1p11]
This is used to set the privileged spec’s version, and we can decide whether
the CSR is valid or not.

=== New Default Configure Option ===

* --with-priv-spec = [1p9|1p9p1|1p10|1p11]
The syntax is same as -mpriv-spec option.  Assembler will check this setting
if -mpriv-spec option isn’t set.

=== New Disassmebler Option ===

* -Mpriv-spec=[1p9|1p9p1|1p10|1p11]
The syntax is same as -mpriv-spec option.  The disassembler can show the CSR
correctly according to the chosen privilege spec.


Notes,

1. I'm not sure if GDB needs the above version checking, but I think the current
modifications won't change the behavior of GDB.  We still use the DECLARE_CSR
to generate the gdb/features/riscv/[32|64]bit-csr.xml, that means we only generate
the CSR which are valid in the latest privilege spec.  Also, the objdump shows
the CSR according to the latest privilege spec by default.

2. The default ISA spec is set to 2p2 rather than the lastest version.  The reason
is that compiler generates the ISA string with fixed 2p0 verisons only for the
RISCV ELF architecture attributes, but not for the -march option.  Therefore, we
should update the compiler or linker to resolve this problem in the futrue patches.

3. How to extend the default versions and new ISA spec?
You only need to update the riscv_ext_version_table which is defined in the
opcodes/riscv-opc.c.

const struct riscv_ext_version riscv_ext_version_table[] =
{
/* name, spec name,  major,  minor.  */
{"e",    "20191213",      1,     9},
{"e",    "20190608",      1,     9},
{"e",    "2p2",           1,     9},

{"i",    "20191213",      2,     1},
{"i",    "20190608",      2,     1},
{"i",    "2p2",           2,     0},
...
};

4. How to extend new privilege spec and new CSR?

* include/opcode/riscv.h
enum riscv_csr_vclass
{
  CSR_CLASS_VNONE,     /* Default value */

  CSR_CLASS_V1P9,       /* v1.9 */
  CSR_CLASS_V1P9P1,     /* v1.9.1 */
  CSR_CLASS_V1P10,      /* v1.10 */
  CSR_CLASS_V1P11,      /* v1.11 */
  CSR_CLASS_VDRAFT
};

* opcodes/riscv-opc.c

static const struct priv_version_t priv_versions[] =
{
  {"1p9", CSR_CLASS_V1P9},
  {"1p9p1", CSR_CLASS_V1P9P1},
  {"1p10", CSR_CLASS_V1P10},
  {"1p11", CSR_CLASS_V1P11},

/* Terminate the list.  */
  {NULL, 0}
};

* include/opcode/riscv-opc.h

Format, DECLARE_CSR      (NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)
	DECLARE_CSR_ALIAS(NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)

NAME:	    CSR name.
VALUE:	    CSR address
CLASS:	    ISA dependency
DEFINE_VER: First defined in which privilege spec.
ABORT_VER:  Aborted in which privilege spec.  If the CSR is still valid in
	    the lastest version, then it should be CSR_CLASS_VDRAFT.

If the CSR is aborted in the latest spec, or has not only one information, then
use DECLARE_CSR_ALIAS.  Otherwise, use DECLARE_CSR.

For example,
DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)


Thanks
Nelson


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 1/7] RISC-V: Remove the redundant gas test file.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:17   ` Nelson Chu
  2020-04-18 11:07 ` [PATCH 2/7] RISC-V: Forgot to update the priv-reg-fail-read-only-01 test case Nelson Chu
                   ` (7 subsequent siblings)
  8 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

	gas/
	* testsuite/gas/riscv/march-fail-s-with-version: Removed.
---
 gas/testsuite/gas/riscv/march-fail-s-with-version | 2 --
 1 file changed, 2 deletions(-)
 delete mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version

diff --git a/gas/testsuite/gas/riscv/march-fail-s-with-version b/gas/testsuite/gas/riscv/march-fail-s-with-version
deleted file mode 100644
index a514d4a..0000000
--- a/gas/testsuite/gas/riscv/march-fail-s-with-version
+++ /dev/null
@@ -1,2 +0,0 @@
-Assembler messages:
-.*: Invalid or unknown s ISA extension: 'sfoo'
\ No newline at end of file
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 2/7] RISC-V: Forgot to update the priv-reg-fail-read-only-01 test case.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
  2020-04-18 11:07 ` [PATCH 1/7] RISC-V: Remove the redundant gas test file Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:17   ` Nelson Chu
  2020-04-18 11:07 ` [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions Nelson Chu
                   ` (6 subsequent siblings)
  8 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

priv-reg and priv-reg-fail-read-only-01 should be updated at the same time.
The fromer checks all CSR by csrr instructions, and the later uses csrw to
check whether the CSR is read only or not.

	gas/
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated.
---
 .../gas/riscv/priv-reg-fail-read-only-01.s         | 114 ++++++++++-----------
 1 file changed, 57 insertions(+), 57 deletions(-)

diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
index 501a52e..3646c80 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
@@ -1,7 +1,8 @@
 	.macro csr val
 	csrw \val, a1
 	.endm
-# 1.9.1 registers
+
+	# Supported the current priv spec 1.11.
 	csr ustatus
 	csr uie
 	csr utvec
@@ -9,7 +10,7 @@
 	csr uscratch
 	csr uepc
 	csr ucause
-	csr ubadaddr
+	csr utval		# Added in 1.10
 	csr uip
 
 	csr fflags
@@ -86,26 +87,15 @@
 	csr sideleg
 	csr sie
 	csr stvec
+	csr scounteren		# Added in 1.10
 
 	csr sscratch
 	csr sepc
 	csr scause
-	csr sbadaddr
+	csr stval		# Added in 1.10
 	csr sip
 
-	csr sptbr
-
-	csr hstatus
-	csr hedeleg
-	csr hideleg
-	csr hie
-	csr htvec
-
-	csr hscratch
-	csr hepc
-	csr hcause
-	csr hbadaddr
-	csr hip
+	csr satp		# Added in 1.10
 
 	csr mvendorid
 	csr marchid
@@ -113,24 +103,39 @@
 	csr mhartid
 
 	csr mstatus
-	csr misa
+	csr misa		# 0xf10 in 1.9, but changed to 0x301 since 1.9.1.
 	csr medeleg
 	csr mideleg
 	csr mie
 	csr mtvec
+	csr mcounteren		# Added in 1.10
 
 	csr mscratch
 	csr mepc
 	csr mcause
-	csr mbadaddr
+	csr mtval		# Added in 1.10
 	csr mip
 
-	csr mbase
-	csr mbound
-	csr mibase
-	csr mibound
-	csr mdbase
-	csr mdbound
+	csr pmpcfg0		# Added in 1.10
+	csr pmpcfg1		# Added in 1.10
+	csr pmpcfg2		# Added in 1.10
+	csr pmpcfg3		# Added in 1.10
+	csr pmpaddr0		# Added in 1.10
+	csr pmpaddr1		# Added in 1.10
+	csr pmpaddr2		# Added in 1.10
+	csr pmpaddr3		# Added in 1.10
+	csr pmpaddr4		# Added in 1.10
+	csr pmpaddr5		# Added in 1.10
+	csr pmpaddr6		# Added in 1.10
+	csr pmpaddr7		# Added in 1.10
+	csr pmpaddr8		# Added in 1.10
+	csr pmpaddr9		# Added in 1.10
+	csr pmpaddr10		# Added in 1.10
+	csr pmpaddr11		# Added in 1.10
+	csr pmpaddr12		# Added in 1.10
+	csr pmpaddr13		# Added in 1.10
+	csr pmpaddr14		# Added in 1.10
+	csr pmpaddr15		# Added in 1.10
 
 	csr mcycle
 	csr minstret
@@ -195,10 +200,7 @@
 	csr mhpmcounter30h
 	csr mhpmcounter31h
 
-	csr mucounteren
-	csr mscounteren
-	csr mhcounteren
-
+	csr mcountinhibit	# Added in 1.11
 	csr mhpmevent3
 	csr mhpmevent4
 	csr mhpmevent5
@@ -236,34 +238,32 @@
 
 	csr dcsr
 	csr dpc
-	csr dscratch
-# 1.10 registers
-	csr utval
-
-	csr scounteren
-	csr stval
-	csr satp
+	csr dscratch0		# Added in 1.11
+	csr dscratch1		# Added in 1.11
 
-	csr mcounteren
-	csr mtval
+	# Supported in previous priv spec, but dropped now.
+	csr ubadaddr		# 0x043 in 1.9.1, but the value is utval since 1.10
+	csr sbadaddr		# 0x143 in 1.9.1, but the value is stval since 1.10
+	csr sptbr		# 0x180 in 1.9.1, but the value is satp since 1.10
+	csr mbadaddr		# 0x343 in 1.9.1, but the value is mtval since 1.10
+	csr mucounteren		# 0x320 in 1.9.1, dropped in 1.10, but the value is mcountinhibit since 1.11
+	csr dscratch		# 0x7b2 in 1.10,  but the value is dscratch0 since 1.11
 
-	csr pmpcfg0
-	csr pmpcfg1
-	csr pmpcfg2
-	csr pmpcfg3
-	csr pmpaddr0
-	csr pmpaddr1
-	csr pmpaddr2
-	csr pmpaddr3
-	csr pmpaddr4
-	csr pmpaddr5
-	csr pmpaddr6
-	csr pmpaddr7
-	csr pmpaddr8
-	csr pmpaddr9
-	csr pmpaddr10
-	csr pmpaddr11
-	csr pmpaddr12
-	csr pmpaddr13
-	csr pmpaddr14
-	csr pmpaddr15
+	csr hstatus		# 0x200, dropped in 1.10
+	csr hedeleg		# 0x202, dropped in 1.10
+	csr hideleg		# 0x203, dropped in 1.10
+	csr hie			# 0x204, dropped in 1.10
+	csr htvec		# 0x205, dropped in 1.10
+	csr hscratch		# 0x240, dropped in 1.10
+	csr hepc		# 0x241, dropped in 1.10
+	csr hcause		# 0x242, dropped in 1.10
+	csr hbadaddr		# 0x243, dropped in 1.10
+	csr hip			# 0x244, dropped in 1.10
+	csr mbase		# 0x380, dropped in 1.10
+	csr mbound		# 0x381, dropped in 1.10
+	csr mibase		# 0x382, dropped in 1.10
+	csr mibound		# 0x383, dropped in 1.10
+	csr mdbase		# 0x384, dropped in 1.10
+	csr mdbound		# 0x385, dropped in 1.10
+	csr mscounteren		# 0x321, dropped in 1.10
+	csr mhcounteren		# 0x322, dropped in 1.10
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
  2020-04-18 11:07 ` [PATCH 1/7] RISC-V: Remove the redundant gas test file Nelson Chu
  2020-04-18 11:07 ` [PATCH 2/7] RISC-V: Forgot to update the priv-reg-fail-read-only-01 test case Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:18   ` Nelson Chu
  2020-04-23 22:58   ` Palmer Dabbelt
  2020-04-18 11:07 ` [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version Nelson Chu
                   ` (5 subsequent siblings)
  8 siblings, 2 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

For now, we can only use the GAS option -march and ELF arch attribute to set
the versions for ISA extensions.  It seems not so friendly for user.
Therefore, we support new GAS options and configure options to make it easiler
for user.

New Assembler Options,

* -misa-spec = [2p0|2p1|2p2|20190608|20191213]
You can simply choose the ISA spec by this option, and then assembler will set
the version for the standard extensions if you don’t set in the ELF arch
attributes or -march option.

* -mriscv-isa-version = <ISA-string>
The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
prefix.  There are two reasons that you may need this option,

1. Some versions of extensions defined in the ISA spec are not matched to the
toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
have to use this option to choose the correct version for V-ext.

2. You want to update the version for the specific standard extensions if the
version are not set in the ELF arch attributes and -march option.

New Default Configure Options,

* --with-arch = <ISA-string>
The syntax of <ISA-string> is same as -march option.  Assembler will check this
if -march option and ELF arch attributes aren’t set.

* --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
The syntax is same as -misa-spec option.  Assembler will check this if
-misa-spec option isn’t set.

* --with-riscv-isa-version = <ISA-string>
The syntax of <ISA-string> is same as -mriscv-isa-version option.  Assembler
will check this if -mriscv-isa-version option isn’t set.

The Priority of these options,

* ELF arch attributes > Assembler options > Default configure options
* For GAS options, -march > -mriscv-isa-version > -misa-spec
* For configure options, --with-arch > --with-riscv-isa-version > --with-isa-spec

	gas/
	* config/tc-riscv.c (DEFAULT_ARCH_WITH_EXT, DEFAULT_ISA_SPEC,
	DEFAULT_RISCV_ISA_VERSION): Default configure option settings.
	You can set them by new configure options --with-arch,
	--with-isa-spec and --with-riscv-isa-version.

	(default_arch_with_ext, default_isa_spec, default_riscv_isa_version):
	const char strings which are used to set the ISA extensions. You can
	use gas options -march (or ELF build attributes), and new gas options
	-misa-spec and -mriscv-isa-version to set them, respectively.  If the
	gas options and attributes are not set, then assembler will check the
	default configure option settings.

	(ext_version_hash): The hash table used to handle the extensions
	with versions.
	(init_ext_version_hash): Initialize the ext_version_hash according
	to riscv_ext_version_table.

	(riscv_get_default_ext_version): The callback function of
	riscv_parse_subset_t.  According to the choosed ISA spec,
	get the default version for the specific extension.

	(riscv_set_arch): Add new bfd_boolean parameter update_version.
	The update_version is TRUE means we just want to update the version
	according to default_riscv_isa_version, so don't call the
	riscv_release_subset_list to reset the subset list.  Pass two new
	arguments to riscv_parse_subset, one is update_version mentioned above,
	the other is the default_isa_spec.  We use the default_isa_spec to
	choose the default version for the extensions.

	(enum options, struct option md_longopts): Add new gas options,
	-misa-spec and -mriscv-isa-version.
	(md_parse_option): Handle the above new gas options.
	(riscv_after_parse_args): Call init_ext_version_hash to initialize the
	ext_version_hash, and then always call riscv_set_arch twice to set and
	update the architecture with versions according to default_arch_with_ext
	and default_riscv_isa_version.
	(s_riscv_attribute): Same as riscv_after_parse_args, we need to call
	riscv_set_arch twice.

	* testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2p2.  Set 0p0
	as default version for x extensions.
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* testsuite/gas/riscv/attribute-08.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: New testcase.  For i-ext, we
	already set the version 1p9 in elf attribute, so -misa-spec and
	-mriscv-isa-version don't update the version to 2p0 and 2p1.
	For f-ext, we don't set the version to it, so use the default version
	2p0 according to the ISA spec 2p2.  For v-ext, the default version is
	0p7 according to ISA spec 2p2, but we use -mriscv-isa-version to update
	it to 0p9.  For a-ext, it isn't enabled by -march or elf attribute, so
	we don't update it's version even if -mriscv-isa-version is set.
	As for the zicsr extension, it is defined in the lastest ISA spec
	rather than 2p2, so set it's version to 0p0.
	* testsuite/gas/riscv/attribute-09.s: Likewise.
	* testsuite/gas/riscv/attribute-10.d: New testcase.  The version of
	zicsr is 2p0 according to ISA spec 20191213.
	* testsuite/gas/riscv/attribute-11.d: New testcase.  We can also update
	the z* extension by -mriscv-isa-version.

	* configure.ac: Add new configure options, --with-arch, --with-isa-spec
	and --with-riscv-isa-version.
	* configure: Regenerated.
	* config.in: Regenerated.

	bfd/
	* elfxx-riscv.h (struct riscv_subset_t): Add new bfd_boolean field
	use_default_version, which is used to record whether the default
	version is used for the extension.
	(struct riscv_parse_subset_t): Add new callback function
	get_default_version.  It is used to find the default version for
	the specific extension.
	(riscv_add_subset, riscv_parse_subset): Update function declaration.

	* elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters
	default_major_version and default_minor_version.  Add new bfd_boolean
	parameter *use_default_version.  Set it to TRUE if we need to call
	the callback rps->get_default_version to find the default version.

	(riscv_update_subset_version): Only update the version of existin
	standard extensions and their Z* sub extensions, if -mriscv-isa-version
	or --with-riscv-isa-version are set, and the default version are used.

	(riscv_add_subset): New parameter use_default_version.  Record whether
	the default version is used.  riscv_update_subset_version only update
	the version of extensions if the default versions are used.

	(riscv_parse_subset): Add two parameters isa_spec_name and
	update_version.  Pass them to riscv_parse_std_ext and
	riscv_parse_prefixed_ext.  The string set by -mriscv-isa-version or
	--with-riscv-isa-version doesn't have to start with rv32/rv64, so
	skip the checking if update_version is TRUE.
	(riscv_parse_std_ext): If update_version is TRUE, then we just call
	riscv_update_subset_version to update the default version.  Otherwise,
	Call rps->get_default_version if we fail to find the default version
	in riscv_parsing_subset_version, and then call riscv_add_subset to add
	the subset into subset list.
	(riscv_parse_prefixed_ext): Same as the riscv_parse_std_ext.
	(riscv_std_z_ext_strtab): Support Zicsr extensions.

	* elfnn-riscv.c (riscv_merge_std_ext, riscv_merge_multi_letter_ext):
	Updated.  Pass update_version as FALSE to riscv_add_subset, the
	update_version is only needed for assembler, not linker.
	(riscv_merge_arch_attr_info): The callback function get_default_version
	is only needed for assembler, so set it to NULL in linker.  Also, Pass
	isa_spec_name as NULL and update_version as FALSE to riscv_parse_subset.

	include/
	* opcode/riscv.h (struct riscv_ext_version): New structure holds
	version information for the specific ISA.

	opcodes/
	* riscv-opc.c (riscv_ext_version_table): The table used to store
	all information about the supported spec and the corresponding ISA
	versions.  Currently, only Zicsr is supported to verify the
	correctness of Z sub extension settings.  Others will be supported
	in the future patches.
---
 bfd/elfnn-riscv.c                      |  24 ++-
 bfd/elfxx-riscv.c                      | 350 ++++++++++++++++++++++++---------
 bfd/elfxx-riscv.h                      |  12 +-
 gas/config.in                          |   9 +
 gas/config/tc-riscv.c                  | 128 +++++++++++-
 gas/configure                          |  53 ++++-
 gas/configure.ac                       |  35 +++-
 gas/testsuite/gas/riscv/attribute-01.d |   2 +-
 gas/testsuite/gas/riscv/attribute-02.d |   4 +-
 gas/testsuite/gas/riscv/attribute-03.d |   4 +-
 gas/testsuite/gas/riscv/attribute-04.d |   2 +-
 gas/testsuite/gas/riscv/attribute-05.d |   2 +-
 gas/testsuite/gas/riscv/attribute-06.d |   2 +-
 gas/testsuite/gas/riscv/attribute-07.d |   2 +-
 gas/testsuite/gas/riscv/attribute-08.d |   2 +-
 gas/testsuite/gas/riscv/attribute-09.d |   6 +
 gas/testsuite/gas/riscv/attribute-09.s |   1 +
 gas/testsuite/gas/riscv/attribute-10.d |   6 +
 gas/testsuite/gas/riscv/attribute-11.d |   6 +
 include/opcode/riscv.h                 |  11 ++
 opcodes/riscv-opc.c                    |  53 +++++
 21 files changed, 585 insertions(+), 129 deletions(-)
 create mode 100644 gas/testsuite/gas/riscv/attribute-09.d
 create mode 100644 gas/testsuite/gas/riscv/attribute-09.s
 create mode 100644 gas/testsuite/gas/riscv/attribute-10.d
 create mode 100644 gas/testsuite/gas/riscv/attribute-11.d

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 8fcb106..4ca49e0 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -2802,7 +2802,7 @@ riscv_merge_std_ext (bfd *ibfd,
   if (!riscv_i_or_e_p (ibfd, out_arch, out))
     return FALSE;
 
-  if (in->name[0] != out->name[0])
+  if (strcasecmp (in->name, out->name) != 0)
     {
       /* TODO: We might allow merge 'i' with 'e'.  */
       _bfd_error_handler
@@ -2818,8 +2818,8 @@ riscv_merge_std_ext (bfd *ibfd,
       return FALSE;
     }
   else
-    riscv_add_subset (&merged_subsets,
-		      in->name, in->major_version, in->minor_version);
+    riscv_add_subset (&merged_subsets, in->name, in->major_version,
+		      in->minor_version, FALSE);
 
   in = in->next;
   out = out->next;
@@ -2848,7 +2848,7 @@ riscv_merge_std_ext (bfd *ibfd,
 
       struct riscv_subset_t *merged = find_in ? find_in : find_out;
       riscv_add_subset (&merged_subsets, merged->name,
-			merged->major_version, merged->minor_version);
+			merged->major_version, merged->minor_version, FALSE);
     }
 
   /* Skip all standard extensions.  */
@@ -2917,14 +2917,14 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
 	{
 	  /* `in' comes before `out', append `in' and increment.  */
 	  riscv_add_subset (&merged_subsets, in->name, in->major_version,
-			    in->minor_version);
+			    in->minor_version, FALSE);
 	  in = in->next;
 	}
       else if (cmp > 0)
 	{
 	  /* `out' comes before `in', append `out' and increment.  */
 	  riscv_add_subset (&merged_subsets, out->name, out->major_version,
-			    out->minor_version);
+			    out->minor_version, FALSE);
 	  out = out->next;
 	}
       else
@@ -2938,7 +2938,7 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
 	    }
 
 	  riscv_add_subset (&merged_subsets, out->name, out->major_version,
-			    out->minor_version);
+			    out->minor_version, FALSE);
 	  out = out->next;
 	  in = in->next;
 	}
@@ -2952,7 +2952,7 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
     while (tail)
       {
 	riscv_add_subset (&merged_subsets, tail->name, tail->major_version,
-			  tail->minor_version);
+			  tail->minor_version, FALSE);
 	tail = tail->next;
       }
   }
@@ -2975,13 +2975,17 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
   riscv_parse_subset_t rpe_in;
   riscv_parse_subset_t rpe_out;
 
+  /* Only assembler needs to check the default version of ISA, so just set
+     the rpe_in.get_default_version and rpe_out.get_default_version to NULL.  */
   rpe_in.subset_list = &in_subsets;
   rpe_in.error_handler = _bfd_error_handler;
   rpe_in.xlen = &xlen_in;
+  rpe_in.get_default_version = NULL;
 
   rpe_out.subset_list = &out_subsets;
   rpe_out.error_handler = _bfd_error_handler;
   rpe_out.xlen = &xlen_out;
+  rpe_out.get_default_version = NULL;
 
   if (in_arch == NULL && out_arch == NULL)
     return NULL;
@@ -2993,10 +2997,10 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
     return in_arch;
 
   /* Parse subset from arch string.  */
-  if (!riscv_parse_subset (&rpe_in, in_arch))
+  if (!riscv_parse_subset (&rpe_in, in_arch, NULL, FALSE))
     return NULL;
 
-  if (!riscv_parse_subset (&rpe_out, out_arch))
+  if (!riscv_parse_subset (&rpe_out, out_arch, NULL, FALSE))
     return NULL;
 
   /* Checking XLEN.  */
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index b15fdee..3a6aaf3 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1025,9 +1025,8 @@ riscv_elf_add_sub_reloc (bfd *abfd,
      `minor_version`: Parsing result of minor version, set to 0 if version is
      not present in arch string, but set to `default_minor_version` if
      `major_version` using default_major_version.
-     `default_major_version`: Default major version.
-     `default_minor_version`: Default minor version.
-     `std_ext_p`: True if parsing std extension.  */
+     `std_ext_p`: True if parsing std extension.
+     `use_default_version`: Set it to True if we need the default version.  */
 
 static const char *
 riscv_parsing_subset_version (riscv_parse_subset_t *rps,
@@ -1035,17 +1034,16 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
 			      const char *p,
 			      unsigned *major_version,
 			      unsigned *minor_version,
-			      unsigned default_major_version,
-			      unsigned default_minor_version,
-			      bfd_boolean std_ext_p)
+			      bfd_boolean std_ext_p,
+			      bfd_boolean *use_default_version)
 {
   bfd_boolean major_p = TRUE;
   unsigned version = 0;
-  unsigned major = 0;
-  unsigned minor = 0;
   char np;
 
-  for (;*p; ++p)
+  *major_version = 0;
+  *minor_version = 0;
+  for (; *p; ++p)
     {
       if (*p == 'p')
 	{
@@ -1057,7 +1055,6 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
 	      if (std_ext_p)
 		{
 		  *major_version = version;
-		  *minor_version = 0;
 		  return p;
 		}
 	      else
@@ -1068,7 +1065,7 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
 		}
 	    }
 
-	  major = version;
+	  *major_version = version;
 	  major_p = FALSE;
 	  version = 0;
 	}
@@ -1079,21 +1076,15 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
     }
 
   if (major_p)
-    major = version;
+    *major_version = version;
   else
-    minor = version;
+    *minor_version = version;
 
-  if (major == 0 && minor == 0)
-    {
-      /* We don't found any version string, use default version.  */
-      *major_version = default_major_version;
-      *minor_version = default_minor_version;
-    }
-  else
-    {
-      *major_version = major;
-      *minor_version = minor;
-    }
+  /* We can not find any version in string, need to parse default version.  */
+  if (use_default_version != NULL
+      && *major_version == 0
+      && *minor_version == 0)
+    *use_default_version = TRUE;
   return p;
 }
 
@@ -1106,6 +1097,41 @@ riscv_supported_std_ext (void)
   return "mafdqlcbjtpvn";
 }
 
+/* Update the version of standard extensions and their Z* sub extensions
+   if -mriscv-isa-version is set.  */
+
+static bfd_boolean
+riscv_update_subset_version (riscv_parse_subset_t *rps,
+			     const char *ext_with_version,
+			     char *ext,
+                             unsigned major_version,
+			     unsigned minor_version,
+			     bfd_boolean use_default_version)
+{
+  riscv_subset_t *subset = riscv_lookup_subset (rps->subset_list, ext);;
+
+  /* The extension doesn't exist, so just return.  */
+  if (subset == NULL)
+    return TRUE;
+
+  /* This means we can not find the version in the string.  */
+  if (use_default_version)
+    {
+      rps->error_handler ("-mriscv-isa-version=%s: unexpected version "
+			  "setting for subset `%s'", ext_with_version, ext);
+      return FALSE;
+    }
+
+  /* We only update the extension which use the default version.  */
+  if (subset->use_default_version)
+    {
+      subset->major_version = major_version;
+      subset->minor_version = minor_version;
+    }
+
+  return TRUE;
+}
+
 /* Parsing function for standard extensions.
 
    Return Value:
@@ -1114,46 +1140,95 @@ riscv_supported_std_ext (void)
    Arguments:
      `rps`: Hooks and status for parsing subset.
      `march`: Full arch string.
-     `p`: Curent parsing position.  */
+     `p`: Curent parsing position.
+     `isa_spec_name`: The ISA spec name.  We set the default ISA versions
+     according to it.
+     `update_version`: True if the -mriscv-isa-version is set, and we need
+     to update the version for the existing extensions.  */
 
 static const char *
 riscv_parse_std_ext (riscv_parse_subset_t *rps,
-		     const char *march, const char *p)
+		     const char *march,
+		     const char *p,
+		     const char *isa_spec_name,
+		     bfd_boolean update_version)
 {
   const char *all_std_exts = riscv_supported_std_ext ();
   const char *std_exts = all_std_exts;
-
   unsigned major_version = 0;
   unsigned minor_version = 0;
   char std_ext = '\0';
+  bfd_boolean use_default_version = FALSE;
 
   /* First letter must start with i, e or g.  */
   switch (*p)
     {
       case 'i':
-	p++;
-	p = riscv_parsing_subset_version (
-	      rps,
-	      march,
-	      p, &major_version, &minor_version,
-	      /* default_major_version= */ 2,
-	      /* default_minor_version= */ 0,
-	      /* std_ext_p= */TRUE);
-	riscv_add_subset (rps->subset_list, "i", major_version, minor_version);
+	p = riscv_parsing_subset_version (rps,
+					  march,
+					  ++p,
+					  &major_version,
+					  &minor_version,
+					  /* std_ext_p= */TRUE,
+					  &use_default_version);
+
+	/* Update the version for exsiting extension.  */
+	if (update_version)
+	  {
+	    if (!riscv_update_subset_version (rps, march, "i",
+					      major_version,
+					      minor_version,
+					      use_default_version))
+	      return NULL;
+	    break;
+	  }
+
+	/* Find the default version if needed.  */
+	if (use_default_version)
+	  rps->get_default_version ("i",
+				    isa_spec_name,
+				    &major_version,
+				    &minor_version);
+	riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
+			  use_default_version);
 	break;
 
       case 'e':
-	p++;
-	p = riscv_parsing_subset_version (
-	      rps,
-	      march,
-	      p, &major_version, &minor_version,
-	      /* default_major_version= */ 1,
-	      /* default_minor_version= */ 9,
-	      /* std_ext_p= */TRUE);
-
-	riscv_add_subset (rps->subset_list, "e", major_version, minor_version);
-	riscv_add_subset (rps->subset_list, "i", 2, 0);
+	p = riscv_parsing_subset_version (rps,
+					  march,
+					  ++p,
+					  &major_version,
+					  &minor_version,
+					  /* std_ext_p= */TRUE,
+					  &use_default_version);
+
+	/* Update the version for exsiting extension.  */
+	if (update_version)
+	  {
+	    if (!riscv_update_subset_version (rps, march, "e",
+					      major_version,
+					      minor_version,
+					      use_default_version))
+	      return NULL;
+	    break;
+	  }
+
+	/* Find the default version if needed.  */
+	if (use_default_version)
+	  rps->get_default_version ("e",
+				    isa_spec_name,
+				    &major_version,
+				    &minor_version);
+	riscv_add_subset (rps->subset_list, "e", major_version, minor_version,
+			  use_default_version);
+
+	/* i-ext must be enabled.  */
+	rps->get_default_version ("i",
+				  isa_spec_name,
+				  &major_version,
+				  &minor_version);
+	riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
+			  TRUE);
 
 	if (*rps->xlen > 32)
 	  {
@@ -1161,35 +1236,58 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps,
 				march, *rps->xlen);
 	    return NULL;
 	  }
-
 	break;
 
       case 'g':
-	p++;
-	p = riscv_parsing_subset_version (
-	      rps,
-	      march,
-	      p, &major_version, &minor_version,
-	      /* default_major_version= */ 2,
-	      /* default_minor_version= */ 0,
-	      /* std_ext_p= */TRUE);
-	riscv_add_subset (rps->subset_list, "i", major_version, minor_version);
+	/* The g-ext shouldn't has the version, so we just skip the setting if
+	   user set a version to it.  */
+	p = riscv_parsing_subset_version (rps,
+					  march,
+					  ++p,
+					  &major_version,
+					  &minor_version,
+					  TRUE,
+					  &use_default_version);
+
+	/* Set the version of g in -mriscv-isa-version is meaningless,
+	   so just skip it.  */
+	if (update_version)
+	  break;
+
+	/* i-ext must be enabled.  */
+	rps->get_default_version ("i",
+				  isa_spec_name,
+				  &major_version,
+				  &minor_version);
+	riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
+			  TRUE);
 
 	for ( ; *std_exts != 'q'; std_exts++)
 	  {
 	    const char subset[] = {*std_exts, '\0'};
-	    riscv_add_subset (
-	      rps->subset_list, subset, major_version, minor_version);
+	    rps->get_default_version (subset,
+				      isa_spec_name,
+				      &major_version,
+				      &minor_version);
+	    riscv_add_subset (rps->subset_list, subset, major_version,
+			      minor_version, TRUE);
 	  }
 	break;
 
       default:
-	rps->error_handler (
-	  "-march=%s: first ISA subset must be `e', `i' or `g'", march);
-	return NULL;
+	/* The first ISA subset of -mriscv-isa-version will not necessarily
+	   be e/i/g.  */
+	if (!update_version)
+	  {
+	    rps->error_handler (
+	    "-march=%s: first ISA subset must be `e', `i' or `g'", march);
+	    return NULL;
+	  }
     }
 
-  while (*p)
+  /* The riscv_parsing_subset_version may set `p` to NULL, so I think we should
+     skip parsing the string if `p` is NULL or value of `p` is `\0`.  */
+  while (p != NULL && *p != '\0')
     {
       char subset[2] = {0, 0};
 
@@ -1218,21 +1316,37 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps,
 	      march, *p);
 	  return NULL;
 	}
-
       std_exts++;
 
-      p++;
-      p = riscv_parsing_subset_version (
-	    rps,
-	    march,
-	    p, &major_version, &minor_version,
-	    /* default_major_version= */ 2,
-	    /* default_minor_version= */ 0,
-	    /* std_ext_p= */TRUE);
-
+      use_default_version = FALSE;
       subset[0] = std_ext;
+      p = riscv_parsing_subset_version (rps,
+					march,
+					++p,
+					&major_version,
+					&minor_version,
+					TRUE,
+					&use_default_version);
+
+      /* Update the version for exsiting extension.  */
+      if (update_version)
+	{
+	  if (!riscv_update_subset_version (rps, march, subset,
+					    major_version,
+					    minor_version,
+					    use_default_version))
+	    return NULL;
+	  continue;
+	}
 
-      riscv_add_subset (rps->subset_list, subset, major_version, minor_version);
+      /* Find the default version if needed.  */
+      if (use_default_version)
+	rps->get_default_version (subset,
+				  isa_spec_name,
+				  &major_version,
+				  &minor_version);
+      riscv_add_subset (rps->subset_list, subset, major_version, minor_version,
+			use_default_version);
     }
   return p;
 }
@@ -1272,21 +1386,28 @@ typedef struct riscv_parse_config
 } riscv_parse_config_t;
 
 /* Parse a generic prefixed extension.
-   march: The full architecture string as passed in by "-march=...".
-   p: Point from which to start parsing the -march string.
-   config: What class of extensions to parse, predicate funcs,
-   and strings to use in error reporting.  */
+   `march`: The full architecture string as passed in by "-march=...".
+   `p`: Point from which to start parsing the -march string.
+   `config`: What class of extensions to parse, predicate funcs,
+   and strings to use in error reporting.
+   `isa_spec_name`: ISA spec name.  We set the default ISA versions
+   according to it.
+   `update_version`: True if the -mriscv-isa-version is set, and we need
+   update the version for the existing extensions.  */
 
 static const char *
 riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
 			  const char *march,
 			  const char *p,
-			  const riscv_parse_config_t *config)
+			  const riscv_parse_config_t *config,
+			  const char *isa_spec_name,
+			  bfd_boolean update_version)
 {
   unsigned major_version = 0;
   unsigned minor_version = 0;
   const char *last_name;
   riscv_isa_ext_class_t class;
+  bfd_boolean use_default_version;
 
   while (*p)
     {
@@ -1309,15 +1430,11 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
       while (*++q != '\0' && *q != '_' && !ISDIGIT (*q))
 	;
 
+      use_default_version = FALSE;
       end_of_version =
-	riscv_parsing_subset_version (
-	  rps,
-	  march,
-	  q, &major_version, &minor_version,
-	  /* default_major_version= */ 2,
-	  /* default_minor_version= */ 0,
-	  /* std_ext_p= */FALSE);
-
+	riscv_parsing_subset_version (rps, march, q, &major_version,
+				      &minor_version, FALSE,
+				      &use_default_version);
       *q = '\0';
 
       /* Check that the name is valid.
@@ -1335,10 +1452,11 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
 	  return NULL;
 	}
 
-      /* Check that the last item is not the same as this.  */
+      /* Check that the last item is not the same as this.  Just skip this
+	 check when updating the version.  */
       last_name = rps->subset_list->tail->name;
-
-      if (!strcasecmp (last_name, subset))
+      if (!update_version
+	  && !strcasecmp (last_name, subset))
 	{
 	  rps->error_handler ("-march=%s: Duplicate %s ISA extension: \'%s\'",
 			      march, config->prefix, subset);
@@ -1357,7 +1475,30 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
 	  return NULL;
 	}
 
-      riscv_add_subset (rps->subset_list, subset, major_version, minor_version);
+      if (update_version)
+	{
+	  /* Update the version for exsiting extension.  */
+	  if (!riscv_update_subset_version (rps, march, subset,
+					    major_version,
+					    minor_version,
+					    use_default_version))
+	    {
+	      free (subset);
+	      return NULL;
+	    }
+	}
+      else
+	{
+	  /* Find the default version if needed.  */
+	  if (use_default_version)
+	    rps->get_default_version (subset,
+				      isa_spec_name,
+				      &major_version,
+				      &minor_version);
+	  riscv_add_subset (rps->subset_list, subset, major_version,
+			    minor_version, use_default_version);
+	}
+
       free (subset);
       p += end_of_version - subset;
 
@@ -1384,7 +1525,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
 
 static const char * const riscv_std_z_ext_strtab[] =
   {
-    NULL
+    "zicsr", NULL
   };
 
 /* Same as `riscv_std_z_ext_strtab', but for S-class extensions.  */
@@ -1457,11 +1598,17 @@ static const riscv_parse_config_t parse_config[] =
 
    Arguments:
      `rps`: Hooks and status for parsing subset.
-     `arch`: Arch string.  */
+     `arch`: Arch string.
+     `isa_spec_name`: The ISA spec name.   We set the default ISA versions
+     according to it.
+     `update_version`: True if the -mriscv-isa-version is set, and we need
+     update the version for the existing extensions.  */
 
 bfd_boolean
 riscv_parse_subset (riscv_parse_subset_t *rps,
-		    const char *arch)
+		    const char *arch,
+		    const char *isa_spec_name,
+		    bfd_boolean update_version)
 {
   const char *p = arch;
   size_t i;
@@ -1476,15 +1623,17 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
       *rps->xlen = 64;
       p += 4;
     }
-  else
+  else if (!update_version)
     {
+      /* The string set by -mriscv-isa-version doesn't have to start
+	 with rv32/rv64.  */
       rps->error_handler ("-march=%s: ISA string must begin with rv32 or rv64",
 			  arch);
       return FALSE;
     }
 
   /* Parsing standard extension.  */
-  p = riscv_parse_std_ext (rps, arch, p);
+  p = riscv_parse_std_ext (rps, arch, p, isa_spec_name, update_version);
 
   if (p == NULL)
     return FALSE;
@@ -1492,7 +1641,8 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
   /* Parse the different classes of extensions in the specified order.  */
 
   for (i = 0; i < ARRAY_SIZE (parse_config); ++i) {
-    p = riscv_parse_prefixed_ext (rps, arch, p, &parse_config[i]);
+    p = riscv_parse_prefixed_ext (rps, arch, p, &parse_config[i],
+				  isa_spec_name, update_version);
 
     if (p == NULL)
       return FALSE;
@@ -1543,7 +1693,8 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
 void
 riscv_add_subset (riscv_subset_list_t *subset_list,
 		  const char *subset,
-		  int major, int minor)
+		  int major, int minor,
+		  bfd_boolean use_default_version)
 {
   riscv_subset_t *s = xmalloc (sizeof *s);
 
@@ -1553,6 +1704,9 @@ riscv_add_subset (riscv_subset_list_t *subset_list,
   s->name = xstrdup (subset);
   s->major_version = major;
   s->minor_version = minor;
+  /* Record whether the default version is used.  The -mriscv-isa-version
+     only update the ISA which use the default version.  */
+  s->use_default_version = use_default_version;
   s->next = NULL;
 
   if (subset_list->tail != NULL)
diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h
index 76ee274..e3d5177 100644
--- a/bfd/elfxx-riscv.h
+++ b/bfd/elfxx-riscv.h
@@ -40,6 +40,7 @@ struct riscv_subset_t
   const char *name;
   int major_version;
   int minor_version;
+  bfd_boolean use_default_version;
   struct riscv_subset_t *next;
 };
 
@@ -56,7 +57,8 @@ riscv_release_subset_list (riscv_subset_list_t *);
 extern void
 riscv_add_subset (riscv_subset_list_t *,
 		  const char *,
-		  int, int);
+		  int, int,
+		  bfd_boolean);
 
 extern riscv_subset_t *
 riscv_lookup_subset (const riscv_subset_list_t *,
@@ -72,11 +74,17 @@ typedef struct {
   void (*error_handler) (const char *,
 			 ...) ATTRIBUTE_PRINTF_1;
   unsigned *xlen;
+  void (*get_default_version) (const char *,
+			       const char *,
+			       unsigned int *,
+			       unsigned int *);
 } riscv_parse_subset_t;
 
 extern bfd_boolean
 riscv_parse_subset (riscv_parse_subset_t *,
-		    const char *);
+		    const char *,
+		    const char *,
+		    bfd_boolean);
 
 extern const char *
 riscv_supported_std_ext (void);
diff --git a/gas/config.in b/gas/config.in
index 8724eb1..935bd9b 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -30,6 +30,9 @@
 /* Default architecture. */
 #undef DEFAULT_ARCH
 
+/* Define default value for -march */
+#undef DEFAULT_ARCH_WITH_EXT
+
 /* Default CRIS architecture. */
 #undef DEFAULT_CRIS_ARCH
 
@@ -50,12 +53,18 @@
 /* Define to 1 if you want to generate x86 relax relocations by default. */
 #undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS
 
+/* Define default value for -misa-spec */
+#undef DEFAULT_ISA_SPEC
+
 /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
 #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
 
 /* Define to 1 if you want to generate RISC-V arch attribute by default. */
 #undef DEFAULT_RISCV_ATTR
 
+/* Define default isa version which are not covered by --with-isa-spec */
+#undef DEFAULT_RISCV_ISA_VERSION
+
 /* Define to 1 if you want to generate GNU x86 used ISA and feature properties
    by default. */
 #undef DEFAULT_X86_USED_NOTE
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 168561e..bfcf2f0 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -63,7 +63,22 @@ struct riscv_cl_insn
 #define DEFAULT_RISCV_ATTR 0
 #endif
 
+#ifndef DEFAULT_ARCH_WITH_EXT
+#define DEFAULT_ARCH_WITH_EXT NULL
+#endif
+
+#ifndef DEFAULT_ISA_SPEC
+#define DEFAULT_ISA_SPEC "2p2"
+#endif
+
+#ifndef DEFAULT_RISCV_ISA_VERSION
+#define DEFAULT_RISCV_ISA_VERSION NULL
+#endif
+
 static const char default_arch[] = DEFAULT_ARCH;
+static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
+static const char *default_isa_spec = DEFAULT_ISA_SPEC;
+static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
 
 static unsigned xlen = 0; /* width of an x-register */
 static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
@@ -147,18 +162,87 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
     }
 }
 
+/* Handle of the extension with version hash table.  */
+static struct hash_control *ext_version_hash = NULL;
+
+static struct hash_control *
+init_ext_version_hash (const struct riscv_ext_version *table)
+{
+  int i = 0;
+  struct hash_control *hash = hash_new ();
+
+  while (table[i].name)
+    {
+      const char *name = table[i].name;
+      const char *hash_error =
+	hash_insert (hash, name, (void *) &table[i]);
+
+      if (hash_error != NULL)
+	{
+	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
+		   table[i].name, hash_error);
+	  /* Probably a memory allocation problem?  Give up now.  */
+	  as_fatal (_("Broken assembler.  No assembly attempted."));
+	  return NULL;
+	}
+
+      i++;
+      while (table[i].name
+	     && strcmp (table[i].name, name) == 0)
+	i++;
+    }
+
+  return hash;
+}
+
+static void
+riscv_get_default_ext_version (const char *name,
+			       const char *spec_name,
+			       unsigned int *major_version,
+			       unsigned int *minor_version)
+{
+  struct riscv_ext_version *ext;
+
+  *major_version = 0;
+  *minor_version = 0;
+
+  if (name == NULL
+      || spec_name == NULL)
+    return;
+
+  ext = (struct riscv_ext_version *) hash_find (ext_version_hash, name);
+  while (ext
+	 && ext->name
+	 && strcmp (ext->name, name) == 0)
+    {
+      if (ext->spec_name
+	  && strcmp (ext->spec_name, spec_name) == 0)
+	{
+	  *major_version = ext->major_version;
+	  *minor_version = ext->minor_version;
+	  return;
+	}
+      ext++;
+    }
+}
+
 /* Set which ISA and extensions are available.  */
 
 static void
-riscv_set_arch (const char *s)
+riscv_set_arch (const char *s, bfd_boolean update_version)
 {
   riscv_parse_subset_t rps;
   rps.subset_list = &riscv_subsets;
   rps.error_handler = as_fatal;
   rps.xlen = &xlen;
+  rps.get_default_version = riscv_get_default_ext_version;
 
-  riscv_release_subset_list (&riscv_subsets);
-  riscv_parse_subset (&rps, s);
+  if (s == NULL)
+    return;
+
+  if (!update_version)
+    riscv_release_subset_list (&riscv_subsets);
+  riscv_parse_subset (&rps, s, default_isa_spec, update_version);
 }
 
 /* Handle of the OPCODE hash table.  */
@@ -2348,6 +2432,8 @@ enum options
   OPTION_NO_ARCH_ATTR,
   OPTION_CSR_CHECK,
   OPTION_NO_CSR_CHECK,
+  OPTION_MISA_SPEC,
+  OPTION_MRISCV_ISA_VERSION,
   OPTION_END_OF_ENUM
 };
 
@@ -2364,6 +2450,8 @@ struct option md_longopts[] =
   {"mno-arch-attr", no_argument, NULL, OPTION_NO_ARCH_ATTR},
   {"mcsr-check", no_argument, NULL, OPTION_CSR_CHECK},
   {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
+  {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
+  {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
 
   {NULL, no_argument, NULL, 0}
 };
@@ -2392,7 +2480,9 @@ md_parse_option (int c, const char *arg)
   switch (c)
     {
     case OPTION_MARCH:
-      riscv_set_arch (arg);
+      /* riscv_after_parse_args will call riscv_set_arch to parse
+	 the architecture.  */
+      default_arch_with_ext = arg;
       break;
 
     case OPTION_NO_PIC:
@@ -2450,6 +2540,14 @@ md_parse_option (int c, const char *arg)
       riscv_opts.csr_check = FALSE;
       break;
 
+    case OPTION_MISA_SPEC:
+      default_isa_spec = arg;
+      break;
+
+    case OPTION_MRISCV_ISA_VERSION:
+      default_riscv_isa_version = arg;
+      break;
+
     default:
       return 0;
     }
@@ -2460,6 +2558,13 @@ md_parse_option (int c, const char *arg)
 void
 riscv_after_parse_args (void)
 {
+  /* Initialize the hash table for extensions with default version.  */
+  ext_version_hash = init_ext_version_hash (riscv_ext_version_table);
+
+  /* The --with-arch is optional for now, so we have to set the xlen
+     according to the default_arch, which is set by the --targte, first.
+     Then, we use the xlen to set the default_arch_with_ext if the
+     -march and --with-arch are not set.  */
   if (xlen == 0)
     {
       if (strcmp (default_arch, "riscv32") == 0)
@@ -2469,9 +2574,15 @@ riscv_after_parse_args (void)
       else
 	as_bad ("unknown default architecture `%s'", default_arch);
     }
+  if (default_arch_with_ext == NULL)
+    default_arch_with_ext = xlen == 64 ? "rv64g" : "rv32g";
+
+  /* Set the architecture according to -march or --with-arch.  */
+  riscv_set_arch (default_arch_with_ext, FALSE);
 
-  if (riscv_subsets.head == NULL)
-    riscv_set_arch (xlen == 64 ? "rv64g" : "rv32g");
+  /* Update the version info according to -mriscv-isa-spec or
+     --with-riscv-isa-spec.  */
+  riscv_set_arch (default_riscv_isa_version, TRUE);
 
   /* Add the RVC extension, regardless of -march, to support .option rvc.  */
   riscv_set_rvc (FALSE);
@@ -3366,7 +3477,7 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
       obj_attribute *attr;
       attr = elf_known_obj_attributes_proc (stdoutput);
       if (!start_assemble)
-	riscv_set_arch (attr[Tag_RISCV_arch].s);
+	riscv_set_arch (attr[Tag_RISCV_arch].s, FALSE);
       else
 	as_fatal (_(".attribute arch must set before any instructions"));
 
@@ -3379,6 +3490,9 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
 	  if (! bfd_set_arch_mach (stdoutput, bfd_arch_riscv, mach))
 	    as_warn (_("Could not set architecture and machine"));
 	}
+
+      /* We also need to update the version of ISA here.  */
+      riscv_set_arch (default_riscv_isa_version, TRUE);
     }
 }
 
diff --git a/gas/configure b/gas/configure
index 1515787..bce847a 100755
--- a/gas/configure
+++ b/gas/configure
@@ -13009,7 +13009,7 @@ $as_echo "#define NDS32_DEFAULT_ZOL_EXT 1" >>confdefs.h
 $as_echo "$enable_zol_ext" >&6; }
 	;;
 
-      aarch64 | i386 | riscv | s390 | sparc)
+      aarch64 | i386 | s390 | sparc)
 	if test $this_target = $target ; then
 
 cat >>confdefs.h <<_ACEOF
@@ -13019,6 +13019,57 @@ _ACEOF
 	fi
 	;;
 
+      riscv)
+	# --target=riscv[32|64]-*-*.  */
+	if test $this_target = $target ; then
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_ARCH "${arch}"
+_ACEOF
+
+	fi
+
+	# --with-arch=<value>.  The syntax of <value> is same as Gas option -march.
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
+$as_echo_n "checking for default configuration of --with-arch... " >&6; }
+	if test "x${with_arch}" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_ARCH_WITH_EXT "$with_arch"
+_ACEOF
+
+	fi
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
+$as_echo "$with_arch" >&6; }
+
+	# --with-isa-spec=[2p0|2p1|2p2|20190608|20191213].
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-isa-spec" >&5
+$as_echo_n "checking for default configuration of --with-isa-spec... " >&6; }
+	if test "x${with_isa_spec}" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_ISA_SPEC "$with_isa_spec"
+_ACEOF
+
+	fi
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_isa_spec" >&5
+$as_echo "$with_isa_spec" >&6; }
+
+	# --with-riscv-isa-version=<value>.  The syntax of <value> is same as Gas
+	# -march, but without the rv[32|64] prefix.
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-riscv-isa-version" >&5
+$as_echo_n "checking for default configuration of --with-riscv-isa-version... " >&6; }
+	if test "x${with_riscv_isa_version}" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_RISCV_ISA_VERSION "$with_riscv_isa_version"
+_ACEOF
+
+	fi
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
+$as_echo "$with_riscv_isa_version" >&6; }
+	;;
+
       rl78)
 	f=rl78-parse.o
 	case " $extra_objects " in
diff --git a/gas/configure.ac b/gas/configure.ac
index 6f32e55..be4ba20 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -569,12 +569,45 @@ changequote([,])dnl
 	AC_MSG_RESULT($enable_zol_ext)
 	;;
 
-      aarch64 | i386 | riscv | s390 | sparc)
+      aarch64 | i386 | s390 | sparc)
 	if test $this_target = $target ; then
 	  AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
 	fi
 	;;
 
+      riscv)
+	# --target=riscv[32|64]-*-*.  */
+	if test $this_target = $target ; then
+	  AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
+	fi
+
+	# --with-arch=<value>.  The syntax of <value> is same as Gas option -march.
+	AC_MSG_CHECKING(for default configuration of --with-arch)
+	if test "x${with_arch}" != x; then
+	  AC_DEFINE_UNQUOTED(DEFAULT_ARCH_WITH_EXT, "$with_arch",
+			     [Define default value for -march])
+	fi
+	AC_MSG_RESULT($with_arch)
+
+	# --with-isa-spec=[2p0|2p1|2p2|20190608|20191213].
+	AC_MSG_CHECKING(for default configuration of --with-isa-spec)
+	if test "x${with_isa_spec}" != x; then
+	  AC_DEFINE_UNQUOTED(DEFAULT_ISA_SPEC, "$with_isa_spec",
+			     [Define default value for -misa-spec])
+	fi
+	AC_MSG_RESULT($with_isa_spec)
+
+	# --with-riscv-isa-version=<value>.  The syntax of <value> is same as Gas
+	# -march, but without the rv[32|64] prefix.
+	AC_MSG_CHECKING(for default configuration of --with-riscv-isa-version)
+	if test "x${with_riscv_isa_version}" != x; then
+	  AC_DEFINE_UNQUOTED(DEFAULT_RISCV_ISA_VERSION, "$with_riscv_isa_version",
+			     [Define default isa version which are not
+			      covered by --with-isa-spec])
+	fi
+	AC_MSG_RESULT($with_riscv_isa_version)
+	;;
+
       rl78)
 	f=rl78-parse.o
 	case " $extra_objects " in
diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
index e22773e..3f9e841 100644
--- a/gas/testsuite/gas/riscv/attribute-01.d
+++ b/gas/testsuite/gas/riscv/attribute-01.d
@@ -1,4 +1,4 @@
-#as: -march=rv32g -march-attr
+#as: -march=rv32g -march-attr -misa-spec=2p2
 #readelf: -A
 #source: empty.s
 Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
index bc3295b..a58248e 100644
--- a/gas/testsuite/gas/riscv/attribute-02.d
+++ b/gas/testsuite/gas/riscv/attribute-02.d
@@ -1,6 +1,6 @@
-#as: -march=rv32gxargle -march-attr
+#as: -march=rv32gxargle -march-attr -misa-spec=2p2
 #readelf: -A
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0"
diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
index 78b706a..04b9ab5 100644
--- a/gas/testsuite/gas/riscv/attribute-03.d
+++ b/gas/testsuite/gas/riscv/attribute-03.d
@@ -1,6 +1,6 @@
-#as: -march=rv32gxargle_xfoo -march-attr
+#as: -march=rv32gxargle_xfoo -march-attr -misa-spec=2p2
 #readelf: -A
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0_xfoo2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0_xfoo0p0"
diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
index c97bf03..8a3f51b 100644
--- a/gas/testsuite/gas/riscv/attribute-04.d
+++ b/gas/testsuite/gas/riscv/attribute-04.d
@@ -1,4 +1,4 @@
-#as: -march-attr
+#as: -march-attr -misa-spec=2p2
 #readelf: -A
 #source: attribute-04.s
 Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
index f9b65f2..3309ff3 100644
--- a/gas/testsuite/gas/riscv/attribute-05.d
+++ b/gas/testsuite/gas/riscv/attribute-05.d
@@ -1,4 +1,4 @@
-#as: -march-attr
+#as: -march-attr -misa-spec=2p2
 #readelf: -A
 #source: attribute-05.s
 Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/attribute-06.d b/gas/testsuite/gas/riscv/attribute-06.d
index 1abeb47..5c8a5c6 100644
--- a/gas/testsuite/gas/riscv/attribute-06.d
+++ b/gas/testsuite/gas/riscv/attribute-06.d
@@ -1,4 +1,4 @@
-#as: -march=rv32g2p0 -march-attr
+#as: -march=rv32g2p1 -march-attr -misa-spec=2p2
 #readelf: -A
 #source: attribute-06.s
 Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/attribute-07.d b/gas/testsuite/gas/riscv/attribute-07.d
index dfd7e6b..20ac9be 100644
--- a/gas/testsuite/gas/riscv/attribute-07.d
+++ b/gas/testsuite/gas/riscv/attribute-07.d
@@ -1,4 +1,4 @@
-#as: -march=rv64g2p0 -march-attr
+#as: -march=rv64g2p1 -march-attr -misa-spec=2p2
 #readelf: -A
 #source: attribute-07.s
 Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/attribute-08.d b/gas/testsuite/gas/riscv/attribute-08.d
index c10ac0c..7f580d3 100644
--- a/gas/testsuite/gas/riscv/attribute-08.d
+++ b/gas/testsuite/gas/riscv/attribute-08.d
@@ -1,4 +1,4 @@
-#as: -march-attr
+#as: -march-attr -misa-spec=2p2
 #readelf: -A
 #source: attribute-08.s
 Attribute Section: riscv
diff --git a/gas/testsuite/gas/riscv/attribute-09.d b/gas/testsuite/gas/riscv/attribute-09.d
new file mode 100644
index 0000000..77c7ef3
--- /dev/null
+++ b/gas/testsuite/gas/riscv/attribute-09.d
@@ -0,0 +1,6 @@
+#as: -march-attr -misa-spec=2p2 -mriscv-isa-version=i2p1a2p1v0p9
+#readelf: -A
+#source: attribute-09.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
diff --git a/gas/testsuite/gas/riscv/attribute-09.s b/gas/testsuite/gas/riscv/attribute-09.s
new file mode 100644
index 0000000..0b1b16c
--- /dev/null
+++ b/gas/testsuite/gas/riscv/attribute-09.s
@@ -0,0 +1 @@
+	.attribute arch, "rv32i1p9fv_zicsr"
diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
new file mode 100644
index 0000000..9c72035
--- /dev/null
+++ b/gas/testsuite/gas/riscv/attribute-10.d
@@ -0,0 +1,6 @@
+#as: -march-attr -march=rv32i_zicsr -misa-spec=20191213
+#readelf: -A
+#source: empty.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv32i2p1_zicsr2p0"
diff --git a/gas/testsuite/gas/riscv/attribute-11.d b/gas/testsuite/gas/riscv/attribute-11.d
new file mode 100644
index 0000000..bc7f986
--- /dev/null
+++ b/gas/testsuite/gas/riscv/attribute-11.d
@@ -0,0 +1,6 @@
+#as: -march-attr -march=rv32i_zicsr -misa-spec=20191213 -mriscv-isa-version=zicsr2p1
+#readelf: -A
+#source: empty.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv32i2p1_zicsr2p1"
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index ac6e861..f8b0de3 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -343,6 +343,16 @@ struct riscv_opcode
   unsigned long pinfo;
 };
 
+/* This structure holds version information for specific ISA.  */
+
+struct riscv_ext_version
+{
+  const char *name;
+  const char *spec_name;
+  unsigned int major_version;
+  unsigned int minor_version;
+};
+
 /* Instruction is a simple alias (e.g. "mv" for "addi").  */
 #define	INSN_ALIAS		0x00000001
 
@@ -420,5 +430,6 @@ extern const char * const riscv_fpr_names_abi[NFPR];
 
 extern const struct riscv_opcode riscv_opcodes[];
 extern const struct riscv_opcode riscv_insn_types[];
+extern const struct riscv_ext_version riscv_ext_version_table[];
 
 #endif /* _RISCV_H_ */
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index ceedcaf..7b885bf 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -884,3 +884,56 @@ const struct riscv_opcode riscv_insn_types[] =
 /* Terminate the list.  */
 {0, 0, INSN_CLASS_NONE, 0, 0, 0, 0, 0}
 };
+
+const struct riscv_ext_version riscv_ext_version_table[] =
+{
+/* name, spec name,  major,  minor.  */
+{"e",    "20191213",      1,     9},
+{"e",    "20190608",      1,     9},
+{"e",    "2p2",           1,     9},
+
+{"i",    "20191213",      2,     1},
+{"i",    "20190608",      2,     1},
+{"i",    "2p2",           2,     0},
+
+{"m",    "20191213",      2,     0},
+{"m",    "20190608",      2,     0},
+{"m",    "2p2",           2,     0},
+
+{"a",    "20191213",      2,     1},
+{"a",    "20190608",      2,     0},
+{"a",    "2p2",           2,     0},
+
+{"f",    "20191213",      2,     2},
+{"f",    "20190608",      2,     2},
+{"f",    "2p2",           2,     0},
+
+{"d",    "20191213",      2,     2},
+{"d",    "20190608",      2,     2},
+{"d",    "2p2",           2,     0},
+
+{"q",    "20191213",      2,     2},
+{"q",    "20190608",      2,     2},
+{"q",    "2p2",           2,     0},
+
+{"c",    "20191213",      2,     0},
+{"c",    "20190608",      2,     0},
+{"c",    "2p2",           2,     0},
+
+{"p",    "20191213",      0,     2},
+{"p",    "20190608",      0,     2},
+{"p",    "2p2",           0,     1},
+
+{"v",    "20191213",      0,     7},
+{"v",    "20190608",      0,     7},
+{"v",    "2p2",           0,     7},
+
+{"n",    "20190608",      1,     1},
+{"n",    "2p2",           1,     1},
+
+{"zicsr","20191213",      2,     0},
+{"zicsr","20190608",      2,     0},
+
+/* Terminate the list.  */
+{NULL, NULL, 0, 0}
+};
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
                   ` (2 preceding siblings ...)
  2020-04-18 11:07 ` [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:18   ` Nelson Chu
  2020-04-24 10:21   ` Andrew Burgess
  2020-04-18 11:07 ` [PATCH 5/7] RISC-V: Make privilege spec attributes work Nelson Chu
                   ` (4 subsequent siblings)
  8 siblings, 2 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

Support new gas option -mpriv-spec and configure option --with-priv-spec. You
can use these options to choose the privilege spec version, and then assembler
will generates the correct CSR address.  If the obselete CSR name is used, then
report the warning message when the -mcsr-check is set, and use the latest
defined address for the CSR (Since we build hash table by the DECLARE_CSR first,
and then use the DECLARE_CSR_ALIAS).  Maybe we can insert the CSR hash entries
in version's order, then we probably don't need the DECLARE_CSR_ALIAS any more.

New Assembler Options,

* -mpriv-spec=[1p9|1p9p1|1p10|1p11]
This is used to set the privileged spec’s version, and we can decide whether
the CSR is valid or not.

New Default Configure Options,

* --with-priv-spec = [1p9|1p9p1|1p10|1p11]
The syntax is same as -mpriv-spec option.  Assembler will check this setting
if -mpriv-spec option isn’t set.

	gas/
	* config/tc-riscv.c (DEFAULT_PRIV_SPEC): Default configure option.
	You can set it by new configure option --with-priv-spec.
	(enum riscv_csr_vclass default_priv_spec): You can set gas option
	-mpriv-spec or --with-priv-spec, and then assembler will call
	riscv_set_default_priv_version to set the default_priv_spec.
	(riscv_set_default_priv_version): New function.  Set the
	default_priv_spec.  Return 0 if the input privilege name isn't
	supported.  Otherwise, return 1.

	(struct riscv_csr_extra): Add new fields to store more information about
	the CSR.  We use these information to find the suitable CSR address when
	user choosing a specific privilege version.
	(enum reg_class): We now get the CSR address from csr_extra_hash rather
	than reg_names_hash.  Therefore, move RCLASS_CSR behind RCLASS_MAX.
	(riscv_init_csr_hashes): Only need to initialize one hash table
	csr_extra_hash.
	(riscv_csr_class_check): Change the return type to void.  Don't check
	the ISA dependency if -mcsr-check isn't set.
	(riscv_csr_version_check): New function.  Check and find the CSR address
	from csr_extra_hash, according to default_priv_spec.  Report warning
	for the invalid CSR if -mcsr-check is set.
	(reg_csr_lookup_internal): Updated.
	(reg_lookup_internal): Likewise.
	(md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.

	(enum options, struct option md_longopts): Add new gas option -mpriv-spec.
	(md_parse_option): Call riscv_set_default_priv_version to set
	default_priv_spec.
	(riscv_after_parse_args): If -mpriv-spec isn't set, then call
	riscv_set_default_priv_version with DEFAULT_PRIV_SPEC to set the default
	privilege verison.

	* testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
	to check the ISA dependency for CSR, so fix the version by adding
	-mpriv-spec=1p11.
	* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.  There are some
	version warnings for the test case.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
	Check whether the CSR is valid when privilege version 1.9 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
	Check whether the CSR is valid when privilege version 1.9.1 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
	Check whether the CSR is valid when privilege version 1.10 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
	Check whether the CSR is valid when privilege version 1.11 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.

	* configure.ac: Add new configure option --with-priv-spec.
	* configure: Regenerated.
	* config.in: Regenerated.

	include/
	* opcode/riscv-opc.h (DECLARE_CSR): Store two version information,
	define_version and abort_version for the CSR, which is valid in the
	current privilege spec.  The define_version means which privilege spec
	started to define the CSR, and the abort_version means which privilege
	spec started to abort the CSR.  If the CSR is valid for the newest spec,
	then the abort_version is set to CSR_CLASS_VDRAFT.
	(DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
	* opcode/riscv.h: Include "bfd.h" to define bfd_boolean type.
	(enum riscv_csr_vclass): New enum classes.  Define the current supported
	privilege versions.

	opcodes/
	* riscv-opc.c (struct priv_version_t): New structure.
	(struct priv_version_t priv_versions): Store the supported privilege
	versions' classes and their corresponding version string.
	(riscv_get_priv_version_class): New function.  Get the corresponding
	CSR version class by giving a privilege version string.
	(riscv_get_priv_version_name): New function.  Get the corresponding
	privilege version string by giving a CSR version class.

	* riscv-dis.c: Updated since DECLARE_CSR is changed.

	gdb/
	* riscv-tdep.c: Updated since DECLARE_CSR is changed.
	* riscv-tdep.h: Likewise.

	binutils/
	* dwarf.c: Updated since DECLARE_CSR is changed.
---
 binutils/dwarf.c                                   |   3 +-
 gas/config.in                                      |   3 +
 gas/config/tc-riscv.c                              | 213 +++++++--
 gas/configure                                      |  13 +
 gas/configure.ac                                   |   8 +
 gas/testsuite/gas/riscv/priv-reg-fail-fext.d       |   2 +-
 gas/testsuite/gas/riscv/priv-reg-fail-fext.l       |  25 +
 .../gas/riscv/priv-reg-fail-read-only-01.d         |   2 +-
 .../gas/riscv/priv-reg-fail-read-only-01.l         |  25 +
 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d  |   2 +-
 gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l  |  25 +
 .../gas/riscv/priv-reg-fail-version-1p10.d         |   3 +
 .../gas/riscv/priv-reg-fail-version-1p10.l         |  27 ++
 .../gas/riscv/priv-reg-fail-version-1p11.d         |   3 +
 .../gas/riscv/priv-reg-fail-version-1p11.l         |  25 +
 .../gas/riscv/priv-reg-fail-version-1p9.d          |   3 +
 .../gas/riscv/priv-reg-fail-version-1p9.l          |  30 ++
 .../gas/riscv/priv-reg-fail-version-1p9p1.d        |   3 +
 .../gas/riscv/priv-reg-fail-version-1p9p1.l        |  30 ++
 gdb/riscv-tdep.c                                   |   6 +-
 gdb/riscv-tdep.h                                   |   2 +-
 include/opcode/riscv-opc.h                         | 509 ++++++++++-----------
 include/opcode/riscv.h                             |  19 +
 opcodes/riscv-dis.c                                |   3 +-
 opcodes/riscv-opc.c                                |  55 +++
 25 files changed, 728 insertions(+), 311 deletions(-)
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l

diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index c75059b..a972c60 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -7378,7 +7378,8 @@ regname_internal_riscv (unsigned int regno)
 	 document.  */
       switch (regno)
 	{
-#define DECLARE_CSR(NAME,VALUE,CLASS) case VALUE + 4096: name = #NAME; break;
+#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
+  case VALUE + 4096: name = #NAME; break;
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
 
diff --git a/gas/config.in b/gas/config.in
index 935bd9b..093f474 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -59,6 +59,9 @@
 /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
 #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
 
+/* Define default value for -mpriv-spec */
+#undef DEFAULT_PRIV_SPEC
+
 /* Define to 1 if you want to generate RISC-V arch attribute by default. */
 #undef DEFAULT_RISCV_ATTR
 
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index bfcf2f0..6528a03 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -75,10 +75,15 @@ struct riscv_cl_insn
 #define DEFAULT_RISCV_ISA_VERSION NULL
 #endif
 
+#ifndef DEFAULT_PRIV_SPEC
+#define DEFAULT_PRIV_SPEC "1p11"
+#endif
+
 static const char default_arch[] = DEFAULT_ARCH;
 static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
 static const char *default_isa_spec = DEFAULT_ISA_SPEC;
 static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
+static enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
 
 static unsigned xlen = 0; /* width of an x-register */
 static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
@@ -536,8 +541,9 @@ enum reg_class
 {
   RCLASS_GPR,
   RCLASS_FPR,
-  RCLASS_CSR,
-  RCLASS_MAX
+  RCLASS_MAX,
+
+  RCLASS_CSR
 };
 
 static struct hash_control *reg_names_hash = NULL;
@@ -585,84 +591,197 @@ struct riscv_csr_extra
   /* Class to which this CSR belongs.  Used to decide whether or
      not this CSR is legal in the current -march context.  */
   enum riscv_csr_class csr_class;
+
+  /* CSR may have differnet numbers in the previous priv spec.  */
+  unsigned address;
+
+  /* Record the CSR is defined/valid in which versions.  */
+  enum riscv_csr_vclass define_version;
+
+  /* Record the CSR is aborted/invalid from which versions.  If it isn't
+     aborted in the current version, then it should be CSR_CLASS_VDRAFT.  */
+  enum riscv_csr_vclass abort_version;
+
+  /* The CSR may have more than one setting.  */
+  struct riscv_csr_extra *next;
 };
 
-/* Init two hashes, csr_extra_hash and reg_names_hash, for CSR.  */
+/* Set the default_priv_spec, assembler will find the suitable CSR address
+   according to default_priv_spec.  Return 0 if the input priv name isn't
+   supported.  Otherwise, return 1.  */
 
-static void
-riscv_init_csr_hashes (const char *name,
-		       unsigned address,
-		       enum riscv_csr_class class)
+static int
+riscv_set_default_priv_version (const char *s)
 {
-  struct riscv_csr_extra *entry = XNEW (struct riscv_csr_extra);
-  entry->csr_class = class;
+  enum riscv_csr_vclass class;
+  if (!riscv_get_priv_version_class (s, &class))
+    {
+      as_bad (_("Unsupported RISC-V privilege version set by "
+		"-mpriv-spec=%s."), s);
+      return 0;
+    }
+  else
+    default_priv_spec = class;
+  return 1;
+}
+
+/* Init hash table csr_extra_hash to handle CSR.  */
 
-  const char *hash_error =
-    hash_insert (csr_extra_hash, name, (void *) entry);
-  if (hash_error != NULL)
+static void
+riscv_init_csr_hash (const char *name,
+		     unsigned address,
+		     enum riscv_csr_class class,
+		     enum riscv_csr_vclass define_version,
+		     enum riscv_csr_vclass abort_version)
+{
+  struct riscv_csr_extra *entry, *pre_entry;
+  const char *hash_error = NULL;
+  bfd_boolean need_enrty = TRUE;
+
+  pre_entry = NULL;
+  entry = (struct riscv_csr_extra *) hash_find (csr_extra_hash, name);
+  while (need_enrty && entry != NULL)
     {
-      fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
-		      name, hash_error);
-      /* Probably a memory allocation problem?  Give up now.  */
-	as_fatal (_("Broken assembler.  No assembly attempted."));
+      if (entry->csr_class == class
+	  && entry->address == address
+	  && entry->define_version == define_version
+	  && entry->abort_version == abort_version)
+	need_enrty = FALSE;
+      pre_entry = entry;
+      entry = entry->next;
     }
 
-  hash_reg_name (RCLASS_CSR, name, address);
+  /* Duplicate setting for the CSR, just return and do nothing.  */
+  if (!need_enrty)
+    return;
+
+  entry = XNEW (struct riscv_csr_extra);
+  entry->csr_class = class;
+  entry->address = address;
+  entry->define_version = define_version;
+  entry->abort_version = abort_version;
+
+  /* If the CSR hasn't been inserted in the hash table, then insert it.
+     Otherwise, attach the extra information to the entry which is already
+     in the hash table.  */
+  if (pre_entry == NULL)
+    {
+      hash_error = hash_insert (csr_extra_hash, name, (void *) entry);
+      if (hash_error != NULL)
+	{
+	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
+		   name, hash_error);
+	  /* Probably a memory allocation problem?  Give up now.  */
+	  as_fatal (_("Broken assembler.  No assembly attempted."));
+	}
+    }
+  else
+    pre_entry->next = entry;
 }
 
 /* Check wether the CSR is valid according to the ISA.  */
 
-static bfd_boolean
-riscv_csr_class_check (enum riscv_csr_class csr_class)
+static void
+riscv_csr_class_check (const char *s,
+		       enum riscv_csr_class csr_class)
 {
+  bfd_boolean result = TRUE;
+
+  /* Don't check the ISA dependency when -mcsr-check isn't set.  */
+  if (!riscv_opts.csr_check)
+    return;
+
   switch (csr_class)
     {
-    case CSR_CLASS_I: return riscv_subset_supports ("i");
-    case CSR_CLASS_F: return riscv_subset_supports ("f");
+    case CSR_CLASS_I:
+      result = riscv_subset_supports ("i");
+      break;
+    case CSR_CLASS_F:
+      result = riscv_subset_supports ("f");
+      break;
     case CSR_CLASS_I_32:
-      return (xlen == 32 && riscv_subset_supports ("i"));
-
+      result = (xlen == 32 && riscv_subset_supports ("i"));
+      break;
     default:
-      return FALSE;
+      as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
     }
+  if (!result)
+    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
 }
 
-/* If the CSR is defined, then we call `riscv_csr_class_check` to do the
-   further checking.  Return FALSE if the CSR is not defined.  Otherwise,
-   return TRUE.  */
+/* Check and find the CSR address according to the privilege spec version.  */
 
-static bfd_boolean
+static void
+riscv_csr_version_check (const char *csr_name,
+			 struct riscv_csr_extra **entryP)
+{
+  struct riscv_csr_extra *entry = *entryP;
+  while (entry != NULL)
+    {
+      if (default_priv_spec >= entry->define_version
+	  && default_priv_spec < entry->abort_version)
+	{
+	  /* Find the suitable CSR according to the specific version.  */
+	  *entryP = entry;
+	  return;
+	}
+      entry = entry->next;
+    }
+
+  /* We can not find the suitable CSR address according to the privilege
+     version.  Therefore, we use the last defined value.  Report the warning
+     only when the -mcsr-check is set.  Enable the -mcsr-check is recommended,
+     otherwise, you may get the unexpected CSR address.  */
+  if (riscv_opts.csr_check)
+    {
+      const char *priv_name = riscv_get_priv_version_name (default_priv_spec);
+      if (priv_name != NULL)
+	as_warn (_("Invalid CSR `%s' for the privilege version `%s'"),
+		 csr_name, priv_name);
+    }
+}
+
+/* Once the CSR is defined, including the old privilege spec, then we call
+   riscv_csr_class_check and riscv_csr_version_check to do the further
+   checking and get the corresponding address.  Return -1 if the CSR is never
+   been defined.  Otherwise, return the address.  */
+
+static unsigned int
 reg_csr_lookup_internal (const char *s)
 {
   struct riscv_csr_extra *r =
     (struct riscv_csr_extra *) hash_find (csr_extra_hash, s);
 
   if (r == NULL)
-    return FALSE;
+    return -1;
 
-  /* We just report the warning when the CSR is invalid.  */
-  if (!riscv_csr_class_check (r->csr_class))
-    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
+  /* We just report the warning when the CSR is invalid.  "Invalid CSR" means
+     the CSR was defined, but isn't allowed for the current ISA setting or
+     the privilege version.  If the CSR is never been defined, then assembler
+     will regard it as a "Unknown CSR" and report error.  If user use number
+     to set the CSR, but over the range (> 0xfff), then assembler will report
+     "Improper CSR" error for it.  */
+  riscv_csr_class_check (s, r->csr_class);
+  riscv_csr_version_check (s, &r);
 
-  return TRUE;
+  return r->address;
 }
 
 static unsigned int
 reg_lookup_internal (const char *s, enum reg_class class)
 {
-  void *r = hash_find (reg_names_hash, s);
+  void *r;
+
+  if (class == RCLASS_CSR)
+    return reg_csr_lookup_internal (s);
 
+  r = hash_find (reg_names_hash, s);
   if (r == NULL || DECODE_REG_CLASS (r) != class)
     return -1;
 
   if (riscv_opts.rve && class == RCLASS_GPR && DECODE_REG_NUM (r) > 15)
     return -1;
 
-  if (class == RCLASS_CSR
-      && riscv_opts.csr_check
-      && !reg_csr_lookup_internal (s))
-    return -1;
-
   return DECODE_REG_NUM (r);
 }
 
@@ -946,8 +1065,10 @@ md_begin (void)
 
   /* Create and insert CSR hash tables.  */
   csr_extra_hash = hash_new ();
-#define DECLARE_CSR(name, num, class) riscv_init_csr_hashes (#name, num, class);
-#define DECLARE_CSR_ALIAS(name, num, class) DECLARE_CSR(name, num, class);
+#define DECLARE_CSR(name, num, class, define_version, abort_version) \
+  riscv_init_csr_hash (#name, num, class, define_version, abort_version);
+#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
+  DECLARE_CSR(name, num, class, define_version, abort_version);
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
 
@@ -2434,6 +2555,7 @@ enum options
   OPTION_NO_CSR_CHECK,
   OPTION_MISA_SPEC,
   OPTION_MRISCV_ISA_VERSION,
+  OPTION_MPRIV_SPEC,
   OPTION_END_OF_ENUM
 };
 
@@ -2452,6 +2574,7 @@ struct option md_longopts[] =
   {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
   {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
   {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
+  {"mpriv-spec", required_argument, NULL, OPTION_MPRIV_SPEC},
 
   {NULL, no_argument, NULL, 0}
 };
@@ -2548,6 +2671,9 @@ md_parse_option (int c, const char *arg)
       default_riscv_isa_version = arg;
       break;
 
+    case OPTION_MPRIV_SPEC:
+      return riscv_set_default_priv_version (arg);
+
     default:
       return 0;
     }
@@ -2594,6 +2720,11 @@ riscv_after_parse_args (void)
   if (riscv_subset_supports ("e"))
     riscv_set_rve (TRUE);
 
+  /* If the -mpriv-spec isn't set, then we set the default privilege version
+     according to DEFAULT_PRIV_SPEC,  */
+  if (default_priv_spec == CSR_CLASS_VNONE)
+    riscv_set_default_priv_version (DEFAULT_PRIV_SPEC);
+
   /* Infer ABI from ISA if not specified on command line.  */
   if (abi_xlen == 0)
     abi_xlen = xlen;
diff --git a/gas/configure b/gas/configure
index bce847a..0911152 100755
--- a/gas/configure
+++ b/gas/configure
@@ -13068,6 +13068,19 @@ _ACEOF
 	fi
 	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
 $as_echo "$with_riscv_isa_version" >&6; }
+
+	 # --with-priv-spec=[1p9p1|1p10|1p11].
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-priv-spec" >&5
+$as_echo_n "checking for default configuration of --with-priv-spec... " >&6; }
+	if test "x${with_priv_spec}" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_PRIV_SPEC "$with_priv_spec"
+_ACEOF
+
+	fi
+	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_priv_spec" >&5
+$as_echo "$with_priv_spec" >&6; }
 	;;
 
       rl78)
diff --git a/gas/configure.ac b/gas/configure.ac
index be4ba20..c3d3639 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -606,6 +606,14 @@ changequote([,])dnl
 			      covered by --with-isa-spec])
 	fi
 	AC_MSG_RESULT($with_riscv_isa_version)
+
+	 # --with-priv-spec=[1p9p1|1p10|1p11].
+	AC_MSG_CHECKING(for default configuration of --with-priv-spec)
+	if test "x${with_priv_spec}" != x; then
+	  AC_DEFINE_UNQUOTED(DEFAULT_PRIV_SPEC, "$with_priv_spec",
+			     [Define default value for -mpriv-spec])
+	fi
+	AC_MSG_RESULT($with_priv_spec)
 	;;
 
       rl78)
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
index da53566..0033e3c 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
@@ -1,3 +1,3 @@
-#as: -march=rv32i -mcsr-check
+#as: -march=rv32i -mcsr-check -mpriv-spec=1p11
 #source: priv-reg.s
 #warning_output: priv-reg-fail-fext.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
index 76818c8..d3b1bad 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
@@ -2,3 +2,28 @@
 .*Warning: Invalid CSR `fflags' for the current ISA
 .*Warning: Invalid CSR `frm' for the current ISA
 .*Warning: Invalid CSR `fcsr' for the current ISA
+
+.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
+.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hie' for the privilege version `1p11'
+.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
+.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
+.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
+.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `hip' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
index ae190c0..bbf83b5 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
@@ -1,3 +1,3 @@
-#as: -march=rv32if -mcsr-check
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
 #source: priv-reg-fail-read-only-01.s
 #warning_output: priv-reg-fail-read-only-01.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
index 7e52bd7..e8355f1 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
@@ -67,3 +67,28 @@
 .*Warning: Read-only CSR is written `csrw marchid,a1'
 .*Warning: Read-only CSR is written `csrw mimpid,a1'
 .*Warning: Read-only CSR is written `csrw mhartid,a1'
+
+.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
+.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hie' for the privilege version `1p11'
+.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
+.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
+.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
+.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `hip' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
index d71b261..a0b88cf 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
@@ -1,3 +1,3 @@
-#as: -march=rv64if -mcsr-check
+#as: -march=rv64if -mcsr-check -mpriv-spec=1p11
 #source: priv-reg.s
 #warning_output: priv-reg-fail-rv32-only.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
index fa5a1b4..5e96a85 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
@@ -64,3 +64,28 @@
 .*Warning: Invalid CSR `mhpmcounter29h' for the current ISA
 .*Warning: Invalid CSR `mhpmcounter30h' for the current ISA
 .*Warning: Invalid CSR `mhpmcounter31h' for the current ISA
+
+.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
+.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hie' for the privilege version `1p11'
+.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
+.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
+.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
+.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `hip' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
new file mode 100644
index 0000000..d7a788a
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
@@ -0,0 +1,3 @@
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p10
+#source: priv-reg.s
+#warning_output: priv-reg-fail-version-1p10.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
new file mode 100644
index 0000000..f532962
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
@@ -0,0 +1,27 @@
+.*Assembler messages:
+.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p10'
+.*Warning: Invalid CSR `dscratch0' for the privilege version `1p10'
+.*Warning: Invalid CSR `dscratch1' for the privilege version `1p10'
+.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p10'
+.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p10'
+.*Warning: Invalid CSR `sptbr' for the privilege version `1p10'
+.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p10'
+.*Warning: Invalid CSR `mucounteren' for the privilege version `1p10'
+.*Warning: Invalid CSR `hstatus' for the privilege version `1p10'
+.*Warning: Invalid CSR `hedeleg' for the privilege version `1p10'
+.*Warning: Invalid CSR `hideleg' for the privilege version `1p10'
+.*Warning: Invalid CSR `hie' for the privilege version `1p10'
+.*Warning: Invalid CSR `htvec' for the privilege version `1p10'
+.*Warning: Invalid CSR `hscratch' for the privilege version `1p10'
+.*Warning: Invalid CSR `hepc' for the privilege version `1p10'
+.*Warning: Invalid CSR `hcause' for the privilege version `1p10'
+.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p10'
+.*Warning: Invalid CSR `hip' for the privilege version `1p10'
+.*Warning: Invalid CSR `mbase' for the privilege version `1p10'
+.*Warning: Invalid CSR `mbound' for the privilege version `1p10'
+.*Warning: Invalid CSR `mibase' for the privilege version `1p10'
+.*Warning: Invalid CSR `mibound' for the privilege version `1p10'
+.*Warning: Invalid CSR `mdbase' for the privilege version `1p10'
+.*Warning: Invalid CSR `mdbound' for the privilege version `1p10'
+.*Warning: Invalid CSR `mscounteren' for the privilege version `1p10'
+.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p10'
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
new file mode 100644
index 0000000..2830c83
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
@@ -0,0 +1,3 @@
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
+#source: priv-reg.s
+#warning_output: priv-reg-fail-version-1p11.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
new file mode 100644
index 0000000..252f96a
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
@@ -0,0 +1,25 @@
+.*Assembler messages:
+.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
+.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
+.*Warning: Invalid CSR `hie' for the privilege version `1p11'
+.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
+.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
+.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
+.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
+.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
+.*Warning: Invalid CSR `hip' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
+.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
+.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
+.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
new file mode 100644
index 0000000..70c405f
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
@@ -0,0 +1,3 @@
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p9
+#source: priv-reg.s
+#warning_output: priv-reg-fail-version-1p9.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
new file mode 100644
index 0000000..92e1463
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
@@ -0,0 +1,30 @@
+.*Assembler messages:
+.*Warning: Invalid CSR `utval' for the privilege version `1p9'
+.*Warning: Invalid CSR `scounteren' for the privilege version `1p9'
+.*Warning: Invalid CSR `stval' for the privilege version `1p9'
+.*Warning: Invalid CSR `satp' for the privilege version `1p9'
+.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9'
+.*Warning: Invalid CSR `mtval' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9'
+.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9'
+.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9'
+.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9'
+.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9'
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
new file mode 100644
index 0000000..2bd4bbf
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
@@ -0,0 +1,3 @@
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1
+#source: priv-reg.s
+#warning_output: priv-reg-fail-version-1p9p1.l
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
new file mode 100644
index 0000000..6cde0b3
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
@@ -0,0 +1,30 @@
+.*Assembler messages:
+.*Warning: Invalid CSR `utval' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `scounteren' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `stval' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `satp' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `mtval' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9p1'
+.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9p1'
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 1bb824e..e67f661 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -240,7 +240,7 @@ static struct riscv_register_feature riscv_csr_feature =
 {
  "org.gnu.gdb.riscv.csr",
  {
-#define DECLARE_CSR(NAME,VALUE,CLASS) \
+#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
   { RISCV_ ## VALUE ## _REGNUM, { # NAME }, false },
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
@@ -498,7 +498,7 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum)
 
   if (regnum >= RISCV_FIRST_CSR_REGNUM && regnum <= RISCV_LAST_CSR_REGNUM)
     {
-#define DECLARE_CSR(NAME,VALUE,CLASS) \
+#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
       case RISCV_ ## VALUE ## _REGNUM: return # NAME;
 
       switch (regnum)
@@ -828,7 +828,7 @@ riscv_is_regnum_a_named_csr (int regnum)
 
   switch (regnum)
     {
-#define DECLARE_CSR(name, num, class) case RISCV_ ## num ## _REGNUM:
+#define DECLARE_CSR(name, num, class, define_ver, abort_ver) case RISCV_ ## num ## _REGNUM:
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
       return true;
diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
index 90bae08..e415fb4 100644
--- a/gdb/riscv-tdep.h
+++ b/gdb/riscv-tdep.h
@@ -44,7 +44,7 @@ enum
   RISCV_LAST_FP_REGNUM = 64,	/* Last Floating Point Register */
 
   RISCV_FIRST_CSR_REGNUM = 65,  /* First CSR */
-#define DECLARE_CSR(name, num, class) \
+#define DECLARE_CSR(name, num, class, define_version, abort_version) \
   RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num,
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index fe00bb6..ab11c31 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -656,7 +656,6 @@
 #define CSR_SIDELEG 0x103
 #define CSR_SIE 0x104
 #define CSR_STVEC 0x105
-/* scounteren is present int priv spec 1.10.  */
 #define CSR_SCOUNTEREN 0x106
 #define CSR_SSCRATCH 0x140
 #define CSR_SEPC 0x141
@@ -669,20 +668,17 @@
 #define CSR_MIMPID 0xf13
 #define CSR_MHARTID 0xf14
 #define CSR_MSTATUS 0x300
-/* misa is 0xf10 in 1.9, but 0x301 in 1.9.1.  */
 #define CSR_MISA 0x301
 #define CSR_MEDELEG 0x302
 #define CSR_MIDELEG 0x303
 #define CSR_MIE 0x304
 #define CSR_MTVEC 0x305
-/* mcounteren is present in priv spec 1.10.  */
 #define CSR_MCOUNTEREN 0x306
 #define CSR_MSCRATCH 0x340
 #define CSR_MEPC 0x341
 #define CSR_MCAUSE 0x342
 #define CSR_MTVAL 0x343
 #define CSR_MIP 0x344
-/* pmpcfg0 to pmpcfg3, pmpaddr0 to pmpaddr15 are present in priv spec 1.10.  */
 #define CSR_PMPCFG0 0x3a0
 #define CSR_PMPCFG1 0x3a1
 #define CSR_PMPCFG2 0x3a2
@@ -765,7 +761,6 @@
 #define CSR_MHPMCOUNTER29H 0xb9d
 #define CSR_MHPMCOUNTER30H 0xb9e
 #define CSR_MHPMCOUNTER31H 0xb9f
-/* mcountinhibit is present in priv spec 1.11.  */
 #define CSR_MCOUNTINHIBIT 0x320
 #define CSR_MHPMEVENT3 0x323
 #define CSR_MHPMEVENT4 0x324
@@ -802,10 +797,8 @@
 #define CSR_TDATA3 0x7a3
 #define CSR_DCSR 0x7b0
 #define CSR_DPC 0x7b1
-/* dscratch0 and dscratch1 are present in priv spec 1.11.  */
 #define CSR_DSCRATCH0 0x7b2
 #define CSR_DSCRATCH1 0x7b3
-/* These registers are present in priv spec 1.9.1, but are dropped in 1.10.  */
 #define CSR_HSTATUS 0x200
 #define CSR_HEDELEG 0x202
 #define CSR_HIDELEG 0x203
@@ -1124,262 +1117,256 @@ DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
 DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
 #endif
 #ifdef DECLARE_CSR
-DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I)
-DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I)
-DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I)
-DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I)
-DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I)
-DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I)
-DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I)
-DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I)
-DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F)
-DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F)
-DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F)
-DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I)
-DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I)
-DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I)
-DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I)
-DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32)
-DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32)
-DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32)
-DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32)
-DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I)
-DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I)
-DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I)
-DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I)
-DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I)
-DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I)
-DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I)
-DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I)
-DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I)
-DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I)
-DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I)
-DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I)
-DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I)
-DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I)
-DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I)
-DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I)
-DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I)
-DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I)
-DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I)
-DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I)
-DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I)
-DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I)
-DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I)
-DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I)
-DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I)
-DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I)
-DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I)
-DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I)
-DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I)
-DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32)
-DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I)
-DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32)
-DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I)
-DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I)
-DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I)
-DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I)
-DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I)
-DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32)
-DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32)
-DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32)
-DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I)
-DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I)
-DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I)
-DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I)
-DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I)
-DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I)
-DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I)
-DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I)
-DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I)
-DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I)
-/* These registers are present in priv spec 1.9.1, dropped in 1.10.  */
-DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I)
-DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I)
-DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I)
-DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I)
-DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I)
-DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I)
-DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I)
-DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I)
-DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I)
-DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I)
-DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I)
-DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I)
-DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I)
-DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I)
-DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I)
-DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I)
-DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I)
-DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I)
+DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I, CSR_CLASS_V1P9P1, CSR_CLASS_VDRAFT)
+DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
+DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
+DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
+DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
 #endif
 #ifdef DECLARE_CSR_ALIAS
-/* Ubadaddr is 0x043 in 1.9.1, but 0x043 is utval in 1.10.  */
-DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I)
-/* Sbadaddr is 0x143 in 1.9.1, but 0x143 is stval in 1.10.  */
-DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I)
-/* Sptbr is 0x180 in 1.9.1, but 0x180 is satp in 1.10.  */
-DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I)
-/* Mbadaddr is 0x343 in 1.9.1, but 0x343 is mtval in 1.10.  */
-DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I)
-/* Mucounteren is 0x320 in 1.10, but 0x320 is mcountinhibit in 1.11.  */
-DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
-/* Dscratch is 0x7b2 in 1.10, but 0x7b2 is dscratch0 in 1.11.  */
-DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I)
+DECLARE_CSR_ALIAS(misa, 0xf10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P9P1)
+DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
+DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P11)
 #endif
 #ifdef DECLARE_CAUSE
 DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index f8b0de3..c36bf69 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -24,6 +24,7 @@
 #include "riscv-opc.h"
 #include <stdlib.h>
 #include <stdint.h>
+#include "bfd.h"
 
 typedef uint64_t insn_t;
 
@@ -353,6 +354,19 @@ struct riscv_ext_version
   unsigned int minor_version;
 };
 
+/* The current supported privilege versions.  */
+
+enum riscv_csr_vclass
+{
+  CSR_CLASS_VNONE,	/* Default value */
+
+  CSR_CLASS_V1P9,       /* v1.9 */
+  CSR_CLASS_V1P9P1,     /* v1.9.1 */
+  CSR_CLASS_V1P10,      /* v1.10 */
+  CSR_CLASS_V1P11,      /* v1.11 */
+  CSR_CLASS_VDRAFT
+};
+
 /* Instruction is a simple alias (e.g. "mv" for "addi").  */
 #define	INSN_ALIAS		0x00000001
 
@@ -432,4 +446,9 @@ extern const struct riscv_opcode riscv_opcodes[];
 extern const struct riscv_opcode riscv_insn_types[];
 extern const struct riscv_ext_version riscv_ext_version_table[];
 
+extern bfd_boolean
+riscv_get_priv_version_class (const char *, enum riscv_csr_vclass *);
+extern const char *
+riscv_get_priv_version_name (enum riscv_csr_vclass);
+
 #endif /* _RISCV_H_ */
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index d7a184c..98302ff 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -326,7 +326,8 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
 	    unsigned int csr = EXTRACT_OPERAND (CSR, l);
 	    switch (csr)
 	      {
-#define DECLARE_CSR(name, num, class) case num: csr_name = #name; break;
+#define DECLARE_CSR(name, num, class, define_version, abort_version) \
+  case num: csr_name = #name; break;
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
 	      }
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 7b885bf..cfefd8e 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -937,3 +937,58 @@ const struct riscv_ext_version riscv_ext_version_table[] =
 /* Terminate the list.  */
 {NULL, NULL, 0, 0}
 };
+
+struct priv_version_t
+{
+  const char *name;
+  enum riscv_csr_vclass vclass;
+};
+
+/* List for all supported CSR versions.  */
+static const struct priv_version_t priv_versions[] =
+{
+  {"1p9", CSR_CLASS_V1P9},
+  {"1p9p1", CSR_CLASS_V1P9P1},
+  {"1p10", CSR_CLASS_V1P10},
+  {"1p11", CSR_CLASS_V1P11},
+
+/* Terminate the list.  */
+  {NULL, 0}
+};
+
+/* Get the corresponding CSR version class by giving a privilege
+   version string.  */
+
+bfd_boolean
+riscv_get_priv_version_class (const char *s,
+			      enum riscv_csr_vclass *class)
+{
+  const struct priv_version_t *version;
+
+  if (s == NULL)
+    return FALSE;
+
+  for (version = &priv_versions[0]; version->name != NULL; ++version)
+    if (strcmp (version->name, s) == 0)
+      {
+	*class = version->vclass;
+	return TRUE;
+      }
+
+  /* Can not find the supported privilege version.  */
+  return FALSE;
+}
+
+/* Get the corresponding privilege version string by giving a CSR
+   version class.  */
+
+const char *
+riscv_get_priv_version_name (enum riscv_csr_vclass class)
+{
+  const struct priv_version_t *version;
+  for (version = &priv_versions[0]; version->name != NULL; ++version)
+    if (class == version->vclass)
+      return version->name;
+  /* This shouldn't happen.  */
+  return NULL;
+}
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 5/7] RISC-V: Make privilege spec attributes work.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
                   ` (3 preceding siblings ...)
  2020-04-18 11:07 ` [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:18   ` Nelson Chu
  2020-04-18 11:07 ` [PATCH 6/7] RISC-V: Disassembler dumps the CSR according to the chosen privilege spec Nelson Chu
                   ` (3 subsequent siblings)
  8 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

There are three privilege spec attributes, Tag_RISCV_priv_spec,
Tag_RISCV_priv_spec_minor and Tag_RISCV_priv_spec_revision, are used to choose
which version of privilege spec you want.  You can also use -mpriv-spec option
to choose the priv spec, but the priority of ELF attributes is the highest.

Beside, we have to make sure all arch and priv attributes are set before any
instruction.

The Priority of these options,
* ELF priv attributes > -mpriv-spec > --with-priv-spec

	bfd/
	* elfxx-riscv.c (riscv_parsing_subset_version): Remove the static.
	(riscv_estimate_digit): Likewise.
	* elfxx-riscv.h: Updated.

	gas/
	* config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to
	explicit_attr.  Set it to TRUE if any ELF attribute is found.
	(riscv_set_default_priv_version): Try to set the default_priv_spec if
	the priv attributes are set, and their value are meaningful (!= 0p0p0).
	(md_assemble): Set the default_priv_version according to the priv
	attributes when we start to assemble instruction.

	(riscv_write_out_attrs): Rename riscv_write_out_arch_attr to
	riscv_write_out_attrs.  Update the arch and priv attributes.  If we
	don't set the corresponding ELF attributes, then try to output the
	default ones.
	(riscv_set_public_attributes): If any ELF attribute or -march-attr
	options is set (explicit_attr is TRUE), then call riscv_write_out_attrs
	to update the arch and priv attributes.
	(s_riscv_attribute): Make sure all arch and priv attributes are set
	before any instruction.

	* testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any
	ELF attribute or -march-attr is set.  If the priv attributes are not
	set, then try to update them by the default setting (-mpriv-spec or
	--with-priv-spec).
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* testsuite/gas/riscv/attribute-08.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: Likewise.
	* testsuite/gas/riscv/attribute-10.d: Likewise.
	* testsuite/gas/riscv/attribute-11.d: Likewise.
	* testsuite/gas/riscv/attribute-unknown.d: Likewise.

	* testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise.  Updated
	priv attributes according to the -mpriv-spec option.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.

	* testsuite/gas/riscv/attribute-05.d: Likewise.  Also, the priv version
	set by priv attributes must be supported.
	* testsuite/gas/riscv/attribute-05.s: Likewise.

	ld/
	* testsuite/ld-riscv-elf/attr-merge-arch-01.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise.
---
 bfd/elfxx-riscv.c                                  |   4 +-
 bfd/elfxx-riscv.h                                  |  12 ++
 gas/config/tc-riscv.c                              | 165 ++++++++++++++++++---
 gas/testsuite/gas/riscv/attribute-01.d             |   3 +
 gas/testsuite/gas/riscv/attribute-02.d             |   3 +
 gas/testsuite/gas/riscv/attribute-03.d             |   3 +
 gas/testsuite/gas/riscv/attribute-04.d             |   3 +
 gas/testsuite/gas/riscv/attribute-05.d             |   4 +-
 gas/testsuite/gas/riscv/attribute-05.s             |   4 +-
 gas/testsuite/gas/riscv/attribute-06.d             |   3 +
 gas/testsuite/gas/riscv/attribute-07.d             |   3 +
 gas/testsuite/gas/riscv/attribute-08.d             |   3 +
 gas/testsuite/gas/riscv/attribute-09.d             |   3 +
 gas/testsuite/gas/riscv/attribute-10.d             |   3 +
 gas/testsuite/gas/riscv/attribute-11.d             |   3 +
 gas/testsuite/gas/riscv/attribute-unknown.d        |   3 +
 .../gas/riscv/priv-reg-fail-version-1p10.d         |  10 +-
 .../gas/riscv/priv-reg-fail-version-1p11.d         |  10 +-
 .../gas/riscv/priv-reg-fail-version-1p9.d          |  10 +-
 .../gas/riscv/priv-reg-fail-version-1p9p1.d        |  11 +-
 ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d     |   3 +
 ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d     |   3 +
 ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d     |   3 +
 ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s |   4 +-
 ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s |   4 +-
 ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d   |   4 +-
 ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d |   3 +
 .../ld-riscv-elf/attr-merge-strict-align-01.d      |   3 +
 .../ld-riscv-elf/attr-merge-strict-align-02.d      |   3 +
 .../ld-riscv-elf/attr-merge-strict-align-03.d      |   3 +
 .../ld-riscv-elf/attr-merge-strict-align-04.d      |   3 +
 .../ld-riscv-elf/attr-merge-strict-align-05.d      |   3 +
 32 files changed, 266 insertions(+), 36 deletions(-)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 3a6aaf3..3ac66f1 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1028,7 +1028,7 @@ riscv_elf_add_sub_reloc (bfd *abfd,
      `std_ext_p`: True if parsing std extension.
      `use_default_version`: Set it to True if we need the default version.  */
 
-static const char *
+const char *
 riscv_parsing_subset_version (riscv_parse_subset_t *rps,
 			      const char *march,
 			      const char *p,
@@ -1771,7 +1771,7 @@ riscv_release_subset_list (riscv_subset_list_t *subset_list)
 
 /* Return the number of digits for the input.  */
 
-static size_t
+size_t
 riscv_estimate_digit (unsigned num)
 {
   size_t digit = 0;
diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h
index e3d5177..145ea2e 100644
--- a/bfd/elfxx-riscv.h
+++ b/bfd/elfxx-riscv.h
@@ -87,6 +87,15 @@ riscv_parse_subset (riscv_parse_subset_t *,
 		    bfd_boolean);
 
 extern const char *
+riscv_parsing_subset_version (riscv_parse_subset_t *,
+			      const char *,
+			      const char *,
+			      unsigned *,
+			      unsigned *,
+			      bfd_boolean,
+			      bfd_boolean *);
+
+extern const char *
 riscv_supported_std_ext (void);
 
 extern void
@@ -95,6 +104,9 @@ riscv_release_subset_list (riscv_subset_list_t *);
 extern char *
 riscv_arch_str (unsigned, const riscv_subset_list_t *);
 
+extern size_t
+riscv_estimate_digit (unsigned);
+
 /* ISA extension name class. E.g. "zbb" corresponds to RV_ISA_CLASS_Z,
    "xargs" corresponds to RV_ISA_CLASS_X, etc.  Order is important
    here.  */
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 6528a03..9ce9046 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -283,8 +283,8 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
 /* Indicate we are already assemble any instructions or not.  */
 static bfd_boolean start_assemble = FALSE;
 
-/* Indicate arch attribute is explictly set.  */
-static bfd_boolean explicit_arch_attr = FALSE;
+/* Indicate ELF attributes are explictly set.  */
+static bfd_boolean explicit_attr = FALSE;
 
 /* Macros for encoding relaxation state for RVC branches and far jumps.  */
 #define RELAX_BRANCH_ENCODE(uncond, rvc, length)	\
@@ -614,15 +614,67 @@ static int
 riscv_set_default_priv_version (const char *s)
 {
   enum riscv_csr_vclass class;
-  if (!riscv_get_priv_version_class (s, &class))
+  unsigned major, minor, revision;
+  obj_attribute *attr;
+  size_t buf_size;
+  char *buf;
+
+  /* Find the corresponding version class.  */
+  if (riscv_get_priv_version_class (s, &class))
+    {
+      default_priv_spec = class;
+      return 1;
+    }
+
+  if (s != NULL)
     {
       as_bad (_("Unsupported RISC-V privilege version set by "
 		"-mpriv-spec=%s."), s);
       return 0;
     }
+
+  /* Try to set the default_priv_spec according to the priv attributes.  */
+  attr = elf_known_obj_attributes_proc (stdoutput);
+  major = (unsigned) attr[Tag_RISCV_priv_spec].i;
+  minor = (unsigned) attr[Tag_RISCV_priv_spec_minor].i;
+  revision = (unsigned) attr[Tag_RISCV_priv_spec_revision].i;
+
+  /* The priv attributes setting 0p0p0 is meaningless.  We should have set
+     the default_priv_spec by md_parse_option and riscv_after_parse_args, so
+     just skip the following setting.  */
+  if (major == 0 && minor == 0 && revision == 0)
+    return 1;
+
+  buf_size = riscv_estimate_digit (major)
+	     + 1 /* 'p' */
+	     + riscv_estimate_digit (minor)
+	     + 1; /* string terminator */
+
+  if (revision != 0)
+    {
+      buf_size += 1 /* 'p' */
+		  + riscv_estimate_digit (revision);
+      buf = xmalloc (buf_size);
+      snprintf (buf, buf_size, "%dp%dp%d", major, minor, revision);
+    }
   else
-    default_priv_spec = class;
-  return 1;
+    {
+      buf = xmalloc (buf_size);
+      snprintf (buf, buf_size, "%dp%d", major, minor);
+    }
+
+  if (riscv_get_priv_version_class (buf, &class))
+    {
+      default_priv_spec = class;
+      free (buf);
+      return 1;
+    }
+
+  /* Still can not find the version class.  */
+  as_bad (_("Unsupported RISC-V privilege version set by "
+	    "priv attributes `%dp%dp%d'."), major, minor, revision);
+  free (buf);
+  return 0;
 }
 
 /* Init hash table csr_extra_hash to handle CSR.  */
@@ -2511,9 +2563,17 @@ md_assemble (char *str)
   expressionS imm_expr;
   bfd_reloc_code_real_type imm_reloc = BFD_RELOC_UNUSED;
 
-  const char *error = riscv_ip (str, &insn, &imm_expr, &imm_reloc, op_hash);
+  /* The arch and priv attributes should be set before assembling.  */
+  if (!start_assemble)
+    {
+      start_assemble = TRUE;
 
-  start_assemble = TRUE;
+      /* Set the default_priv_version according to the priv attributes.  */
+      if (!riscv_set_default_priv_version (NULL))
+	return;
+    }
+
+  const char *error = riscv_ip (str, &insn, &imm_expr, &imm_reloc, op_hash);
 
   if (error)
     {
@@ -3526,26 +3586,78 @@ s_riscv_insn (int x ATTRIBUTE_UNUSED)
   demand_empty_rest_of_line ();
 }
 
-/* Update arch attributes.  */
+/* Update arch and priv attributes.  If we don't set the corresponding ELF
+   attributes, then try to output the default ones.  */
 
 static void
-riscv_write_out_arch_attr (void)
+riscv_write_out_attrs (void)
 {
-  const char *arch_str = riscv_arch_str (xlen, &riscv_subsets);
+  riscv_parse_subset_t rps;
+  const char *arch_str, *priv_str, *end;
+  char *priv_str_t, *p;
+  unsigned int p_count;
+  unsigned major, minor, revision, empty;
 
+  /* Re-write arch attribute to normalize the arch string.  */
+  arch_str = riscv_arch_str (xlen, &riscv_subsets);
   bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, arch_str);
-
   xfree ((void *)arch_str);
+
+  /* For the file without any instruction, we don't set the default_priv_version
+     according to the priv attributes since the md_assemble isn't called.
+     Call riscv_set_default_priv_version here for the above case, although
+     it seems strange.  */
+  if (!start_assemble
+      && !riscv_set_default_priv_version (NULL))
+    return;
+
+  /* Re-write priv attributes by default_priv_spec.  */
+  priv_str = riscv_get_priv_version_name (default_priv_spec);
+  priv_str_t = xstrdup (priv_str);
+
+  /* Split the version string into two parts, the first part is major + minor,
+     and the second part is the revision if possible.  */
+  for (p = priv_str_t, p_count = 0; *p != '\0'; p++)
+    {
+      if (*p == 'p')
+	p_count++;
+      if (p_count == 2)
+	{
+	  *p++ = '\0';
+	  break;
+	}
+    }
+
+  /* Borrow riscv_parsing_subset_version to parse the priv version string.  */
+  rps.subset_list = NULL;
+  rps.error_handler = as_fatal;
+  rps.xlen = &xlen;
+  rps.get_default_version = NULL;
+
+  /* Parse the version string twice.  */
+  end = riscv_parsing_subset_version (&rps, priv_str, priv_str_t,
+				      &major, &minor, TRUE, NULL);
+  end = riscv_parsing_subset_version (&rps, priv_str, p,
+				      &revision, &empty, TRUE, NULL);
+  if (*end != '\0')
+    as_fatal (_("Failed to parse the priv version: %s"), priv_str);
+
+  /* Insert the priv attributes.  */
+  bfd_elf_add_proc_attr_int (stdoutput, Tag_RISCV_priv_spec, major);
+  bfd_elf_add_proc_attr_int (stdoutput, Tag_RISCV_priv_spec_minor, minor);
+  bfd_elf_add_proc_attr_int (stdoutput, Tag_RISCV_priv_spec_revision, revision);
+  xfree ((void *)priv_str_t);
 }
 
-/* Add the default contents for the .riscv.attributes section.  */
+/* Add the default contents for the .riscv.attributes section.  If any
+   ELF attribute or -march-attr options is set, call riscv_write_out_attrs
+   to update the arch and priv attributes.  */
 
 static void
 riscv_set_public_attributes (void)
 {
-  if (riscv_opts.arch_attr || explicit_arch_attr)
-    /* Re-write arch attribute to normalize the arch string.  */
-    riscv_write_out_arch_attr ();
+  if (riscv_opts.arch_attr || explicit_attr)
+    riscv_write_out_attrs ();
 }
 
 /* Called after all assembly has been done.  */
@@ -3599,13 +3711,14 @@ static void
 s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
 {
   int tag = obj_elf_vendor_attribute (OBJ_ATTR_PROC);
+  unsigned old_xlen;
+  obj_attribute *attr;
 
-  if (tag == Tag_RISCV_arch)
+  explicit_attr = TRUE;
+  switch (tag)
     {
-      unsigned old_xlen = xlen;
-
-      explicit_arch_attr = TRUE;
-      obj_attribute *attr;
+    case Tag_RISCV_arch:
+      old_xlen = xlen;
       attr = elf_known_obj_attributes_proc (stdoutput);
       if (!start_assemble)
 	riscv_set_arch (attr[Tag_RISCV_arch].s, FALSE);
@@ -3624,6 +3737,18 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
 
       /* We also need to update the version of ISA here.  */
       riscv_set_arch (default_riscv_isa_version, TRUE);
+      break;
+
+    case Tag_RISCV_priv_spec:
+    case Tag_RISCV_priv_spec_minor:
+    case Tag_RISCV_priv_spec_revision:
+      /* We will not set the priv versions until md_assemble.  */
+      if (start_assemble)
+	as_fatal (_(".attribute priv spec must set before any instructions"));
+      break;
+
+    default:
+      break;
     }
 }
 
diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
index 3f9e841..dedd443 100644
--- a/gas/testsuite/gas/riscv/attribute-01.d
+++ b/gas/testsuite/gas/riscv/attribute-01.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
index a58248e..5368741 100644
--- a/gas/testsuite/gas/riscv/attribute-02.d
+++ b/gas/testsuite/gas/riscv/attribute-02.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
index 04b9ab5..6d7c781 100644
--- a/gas/testsuite/gas/riscv/attribute-03.d
+++ b/gas/testsuite/gas/riscv/attribute-03.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0_xfoo0p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
index 8a3f51b..b725e2d 100644
--- a/gas/testsuite/gas/riscv/attribute-04.d
+++ b/gas/testsuite/gas/riscv/attribute-04.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
index 3309ff3..16c19e9 100644
--- a/gas/testsuite/gas/riscv/attribute-05.d
+++ b/gas/testsuite/gas/riscv/attribute-05.d
@@ -7,5 +7,5 @@ File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
   Tag_RISCV_unaligned_access: Unaligned access
   Tag_RISCV_priv_spec: 1
-  Tag_RISCV_priv_spec_minor: 2
-  Tag_RISCV_priv_spec_revision: 3
+  Tag_RISCV_priv_spec_minor: 9
+  Tag_RISCV_priv_spec_revision: 1
diff --git a/gas/testsuite/gas/riscv/attribute-05.s b/gas/testsuite/gas/riscv/attribute-05.s
index 3b3b7f6..4920309 100644
--- a/gas/testsuite/gas/riscv/attribute-05.s
+++ b/gas/testsuite/gas/riscv/attribute-05.s
@@ -1,6 +1,6 @@
 	.attribute arch, "rv32g"
 	.attribute priv_spec, 1
-	.attribute priv_spec_minor, 2
-	.attribute priv_spec_revision, 3
+	.attribute priv_spec_minor, 9
+	.attribute priv_spec_revision, 1
 	.attribute unaligned_access, 1
 	.attribute stack_align, 16
diff --git a/gas/testsuite/gas/riscv/attribute-06.d b/gas/testsuite/gas/riscv/attribute-06.d
index 5c8a5c6..b963b6e 100644
--- a/gas/testsuite/gas/riscv/attribute-06.d
+++ b/gas/testsuite/gas/riscv/attribute-06.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-07.d b/gas/testsuite/gas/riscv/attribute-07.d
index 20ac9be..f383f94 100644
--- a/gas/testsuite/gas/riscv/attribute-07.d
+++ b/gas/testsuite/gas/riscv/attribute-07.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv64i2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-08.d b/gas/testsuite/gas/riscv/attribute-08.d
index 7f580d3..1391b56 100644
--- a/gas/testsuite/gas/riscv/attribute-08.d
+++ b/gas/testsuite/gas/riscv/attribute-08.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32e1p9"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-09.d b/gas/testsuite/gas/riscv/attribute-09.d
index 77c7ef3..14f1b85 100644
--- a/gas/testsuite/gas/riscv/attribute-09.d
+++ b/gas/testsuite/gas/riscv/attribute-09.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
index 9c72035..7518197 100644
--- a/gas/testsuite/gas/riscv/attribute-10.d
+++ b/gas/testsuite/gas/riscv/attribute-10.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p1_zicsr2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-11.d b/gas/testsuite/gas/riscv/attribute-11.d
index bc7f986..c4e8b0a 100644
--- a/gas/testsuite/gas/riscv/attribute-11.d
+++ b/gas/testsuite/gas/riscv/attribute-11.d
@@ -4,3 +4,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p1_zicsr2p1"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/gas/testsuite/gas/riscv/attribute-unknown.d b/gas/testsuite/gas/riscv/attribute-unknown.d
index 667f21a..120e3de 100644
--- a/gas/testsuite/gas/riscv/attribute-unknown.d
+++ b/gas/testsuite/gas/riscv/attribute-unknown.d
@@ -4,5 +4,8 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
   Tag_unknown_255: "test"
   Tag_unknown_256: 123 \(0x7b\)
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
index d7a788a..ff7c5f8 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
@@ -1,3 +1,11 @@
-#as: -march=rv32if -mcsr-check -mpriv-spec=1p10
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p10 -march-attr
 #source: priv-reg.s
 #warning_output: priv-reg-fail-version-1p10.l
+#readelf: -A
+
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: 1
+  Tag_RISCV_priv_spec_minor: 10
+#...
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
index 2830c83..7e79c02 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
@@ -1,3 +1,11 @@
-#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p11 -march-attr
 #source: priv-reg.s
 #warning_output: priv-reg-fail-version-1p11.l
+#readelf: -A
+
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: 1
+  Tag_RISCV_priv_spec_minor: 11
+#...
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
index 70c405f..372505f 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
@@ -1,3 +1,11 @@
-#as: -march=rv32if -mcsr-check -mpriv-spec=1p9
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p9 -march-attr
 #source: priv-reg.s
 #warning_output: priv-reg-fail-version-1p9.l
+#readelf: -A
+
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: 1
+  Tag_RISCV_priv_spec_minor: 9
+#...
diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
index 2bd4bbf..dc204b0 100644
--- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
+++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
@@ -1,3 +1,12 @@
-#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1
+#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1 -march-attr
 #source: priv-reg.s
 #warning_output: priv-reg-fail-version-1p9p1.l
+#readelf: -A
+
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: 1
+  Tag_RISCV_priv_spec_minor: 9
+  Tag_RISCV_priv_spec_revision: 1
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
index 5baaba4..032f964 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
@@ -7,3 +7,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
index a7d79a1..54a7621 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
@@ -7,3 +7,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
index d46dee8..67f0437 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
@@ -7,3 +7,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv32i2p0_m2p0_xbar2p0_xfoo2p0"
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s
index 1ad9500..0b7ffea 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s
@@ -1,3 +1,3 @@
 	.attribute priv_spec, 1
-	.attribute priv_spec_minor, 2
-	.attribute priv_spec_revision, 3
+	.attribute priv_spec_minor, 9
+	.attribute priv_spec_revision, 1
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s
index 1ad9500..0b7ffea 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s
@@ -1,3 +1,3 @@
 	.attribute priv_spec, 1
-	.attribute priv_spec_minor, 2
-	.attribute priv_spec_revision, 3
+	.attribute priv_spec_minor, 9
+	.attribute priv_spec_revision, 1
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d
index dc4c4e0..0aa6fe0 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d
@@ -8,5 +8,5 @@ Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
   Tag_RISCV_priv_spec: 1
-  Tag_RISCV_priv_spec_minor: 2
-  Tag_RISCV_priv_spec_revision: 3
+  Tag_RISCV_priv_spec_minor: 9
+  Tag_RISCV_priv_spec_revision: 1
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d b/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d
index 7a5bc81..5585fac 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d
@@ -8,3 +8,6 @@ Attribute Section: riscv
 File Attributes
   Tag_RISCV_stack_align: 16-bytes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d
index 1039930..91011a2 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d
@@ -8,3 +8,6 @@ Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
   Tag_RISCV_unaligned_access: Unaligned access
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d
index 12ca1c4..5bdea27 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d
@@ -8,3 +8,6 @@ Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
   Tag_RISCV_unaligned_access: Unaligned access
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d
index e41351d..ac886fb 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d
@@ -8,3 +8,6 @@ Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
   Tag_RISCV_unaligned_access: Unaligned access
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d
index ac2a766..dd45f76 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d
@@ -7,3 +7,6 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d
index 608c05e..ef0c154 100644
--- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d
+++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d
@@ -8,3 +8,6 @@ Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: [a-zA-Z0-9_\"].*
   Tag_RISCV_unaligned_access: Unaligned access
+  Tag_RISCV_priv_spec: [0-9_\"].*
+  Tag_RISCV_priv_spec_minor: [0-9_\"].*
+#...
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 6/7] RISC-V: Disassembler dumps the CSR according to the chosen privilege spec.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
                   ` (4 preceding siblings ...)
  2020-04-18 11:07 ` [PATCH 5/7] RISC-V: Make privilege spec attributes work Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:18   ` Nelson Chu
  2020-04-18 11:07 ` [PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options Nelson Chu
                   ` (2 subsequent siblings)
  8 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

Add new disassembler option -Mpriv-spec=[1p9|1p9p1|1p10|1p11] to dump the CSR
correctly.  Report error message if the chosen priv version isn't supported.
Dump the CSR address direclty if it is invalid for the chosen spec.

	gas/
	* config/tc-riscv.c: Remove the static for default_priv_spec, and move
	it to opcodes/riscv-opc.c.

	* testsuite/gas/riscv/priv-reg.d: Removed.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: New test case.  Dump the
	CSR according to the priv spec 1p9.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case.  Dump the
	CSR according to the priv spec 1p9p1.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: New test case.  Dump the
	CSR according to the priv spec 1p10.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: New test case.  Dump the
	CSR according to the priv spec 1p11.

	include/
	* opcode/riscv.h: Updated.

	opcodes/
	* riscv-opc.c: Updated.
	* riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
	according to the chosen version.  Build a hash table riscv_csr_hash to
	store the valid CSR for the chosen pirv verison.  Dump the direct
	CSR address rather than it's name if it is invalid.
	(parse_riscv_dis_option_without_args): New function.  Parse the options
	without arguments.
	(parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
	parse the options without arguments first, and then handle the options
	with arguments.  Add the new option -Mpriv-spec, which has argument.
---
 gas/config/tc-riscv.c                            |   1 -
 gas/testsuite/gas/riscv/priv-reg-version-1p10.d  | 257 +++++++++++++++++++++++
 gas/testsuite/gas/riscv/priv-reg-version-1p11.d  | 257 +++++++++++++++++++++++
 gas/testsuite/gas/riscv/priv-reg-version-1p9.d   | 257 +++++++++++++++++++++++
 gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d | 257 +++++++++++++++++++++++
 gas/testsuite/gas/riscv/priv-reg.d               | 256 ----------------------
 include/opcode/riscv.h                           |   2 +
 opcodes/riscv-dis.c                              |  67 +++++-
 opcodes/riscv-opc.c                              |   2 +
 9 files changed, 1092 insertions(+), 264 deletions(-)
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p10.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p11.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p9.d
 create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
 delete mode 100644 gas/testsuite/gas/riscv/priv-reg.d

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 9ce9046..81bdfa8 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -83,7 +83,6 @@ static const char default_arch[] = DEFAULT_ARCH;
 static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
 static const char *default_isa_spec = DEFAULT_ISA_SPEC;
 static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
-static enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
 
 static unsigned xlen = 0; /* width of an x-register */
 static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
new file mode 100644
index 0000000..3c369f4
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
@@ -0,0 +1,257 @@
+#as: -march=rv32if -mpriv-spec=1p10
+#source: priv-reg.s
+#objdump: -dr -Mpriv-spec=1p10
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+frflags[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+frrm[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00302573[ 	]+frcsr[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0202573[ 	]+rdinstret[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0302573[ 	]+csrr[ 	]+a0,hpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+c0402573[ 	]+csrr[ 	]+a0,hpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+c0502573[ 	]+csrr[ 	]+a0,hpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+c0602573[ 	]+csrr[ 	]+a0,hpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+c0702573[ 	]+csrr[ 	]+a0,hpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+c0802573[ 	]+csrr[ 	]+a0,hpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+c0902573[ 	]+csrr[ 	]+a0,hpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+c0a02573[ 	]+csrr[ 	]+a0,hpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+c0b02573[ 	]+csrr[ 	]+a0,hpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+c0c02573[ 	]+csrr[ 	]+a0,hpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+c0d02573[ 	]+csrr[ 	]+a0,hpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+c0e02573[ 	]+csrr[ 	]+a0,hpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+c0f02573[ 	]+csrr[ 	]+a0,hpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+c1002573[ 	]+csrr[ 	]+a0,hpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+c1102573[ 	]+csrr[ 	]+a0,hpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+c1202573[ 	]+csrr[ 	]+a0,hpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+c1302573[ 	]+csrr[ 	]+a0,hpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+c1402573[ 	]+csrr[ 	]+a0,hpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+c1502573[ 	]+csrr[ 	]+a0,hpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+c1602573[ 	]+csrr[ 	]+a0,hpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+c1702573[ 	]+csrr[ 	]+a0,hpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+c1802573[ 	]+csrr[ 	]+a0,hpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+c1902573[ 	]+csrr[ 	]+a0,hpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+c1a02573[ 	]+csrr[ 	]+a0,hpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+c1b02573[ 	]+csrr[ 	]+a0,hpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+c1c02573[ 	]+csrr[ 	]+a0,hpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+c1d02573[ 	]+csrr[ 	]+a0,hpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+c1e02573[ 	]+csrr[ 	]+a0,hpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+c1f02573[ 	]+csrr[ 	]+a0,hpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+c8002573[ 	]+rdcycleh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8102573[ 	]+rdtimeh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8202573[ 	]+rdinstreth[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8302573[ 	]+csrr[ 	]+a0,hpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+c8402573[ 	]+csrr[ 	]+a0,hpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+c8502573[ 	]+csrr[ 	]+a0,hpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+c8602573[ 	]+csrr[ 	]+a0,hpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+c8702573[ 	]+csrr[ 	]+a0,hpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+c8802573[ 	]+csrr[ 	]+a0,hpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+c8902573[ 	]+csrr[ 	]+a0,hpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+c8a02573[ 	]+csrr[ 	]+a0,hpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+c8b02573[ 	]+csrr[ 	]+a0,hpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+c8c02573[ 	]+csrr[ 	]+a0,hpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+c8d02573[ 	]+csrr[ 	]+a0,hpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+c8e02573[ 	]+csrr[ 	]+a0,hpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+c8f02573[ 	]+csrr[ 	]+a0,hpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+c9002573[ 	]+csrr[ 	]+a0,hpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+c9102573[ 	]+csrr[ 	]+a0,hpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+c9202573[ 	]+csrr[ 	]+a0,hpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+c9302573[ 	]+csrr[ 	]+a0,hpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+c9402573[ 	]+csrr[ 	]+a0,hpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+c9502573[ 	]+csrr[ 	]+a0,hpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+c9602573[ 	]+csrr[ 	]+a0,hpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+c9702573[ 	]+csrr[ 	]+a0,hpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+c9802573[ 	]+csrr[ 	]+a0,hpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+c9902573[ 	]+csrr[ 	]+a0,hpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+c9a02573[ 	]+csrr[ 	]+a0,hpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+c9b02573[ 	]+csrr[ 	]+a0,hpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+c9c02573[ 	]+csrr[ 	]+a0,hpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+c9d02573[ 	]+csrr[ 	]+a0,hpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+c9e02573[ 	]+csrr[ 	]+a0,hpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+c9f02573[ 	]+csrr[ 	]+a0,hpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
+[ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
+[ 	]+[0-9a-f]+:[ 	]+10602573[ 	]+csrr[ 	]+a0,scounteren
+[ 	]+[0-9a-f]+:[ 	]+14002573[ 	]+csrr[ 	]+a0,sscratch
+[ 	]+[0-9a-f]+:[ 	]+14102573[ 	]+csrr[ 	]+a0,sepc
+[ 	]+[0-9a-f]+:[ 	]+14202573[ 	]+csrr[ 	]+a0,scause
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
+[ 	]+[0-9a-f]+:[ 	]+14402573[ 	]+csrr[ 	]+a0,sip
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
+[ 	]+[0-9a-f]+:[ 	]+f1102573[ 	]+csrr[ 	]+a0,mvendorid
+[ 	]+[0-9a-f]+:[ 	]+f1202573[ 	]+csrr[ 	]+a0,marchid
+[ 	]+[0-9a-f]+:[ 	]+f1302573[ 	]+csrr[ 	]+a0,mimpid
+[ 	]+[0-9a-f]+:[ 	]+f1402573[ 	]+csrr[ 	]+a0,mhartid
+[ 	]+[0-9a-f]+:[ 	]+30002573[ 	]+csrr[ 	]+a0,mstatus
+[ 	]+[0-9a-f]+:[ 	]+30102573[ 	]+csrr[ 	]+a0,misa
+[ 	]+[0-9a-f]+:[ 	]+30202573[ 	]+csrr[ 	]+a0,medeleg
+[ 	]+[0-9a-f]+:[ 	]+30302573[ 	]+csrr[ 	]+a0,mideleg
+[ 	]+[0-9a-f]+:[ 	]+30402573[ 	]+csrr[ 	]+a0,mie
+[ 	]+[0-9a-f]+:[ 	]+30502573[ 	]+csrr[ 	]+a0,mtvec
+[ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,mcounteren
+[ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
+[ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
+[ 	]+[0-9a-f]+:[ 	]+34202573[ 	]+csrr[ 	]+a0,mcause
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mtval
+[ 	]+[0-9a-f]+:[ 	]+34402573[ 	]+csrr[ 	]+a0,mip
+[ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,pmpcfg0
+[ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,pmpcfg1
+[ 	]+[0-9a-f]+:[ 	]+3a202573[ 	]+csrr[ 	]+a0,pmpcfg2
+[ 	]+[0-9a-f]+:[ 	]+3a302573[ 	]+csrr[ 	]+a0,pmpcfg3
+[ 	]+[0-9a-f]+:[ 	]+3b002573[ 	]+csrr[ 	]+a0,pmpaddr0
+[ 	]+[0-9a-f]+:[ 	]+3b102573[ 	]+csrr[ 	]+a0,pmpaddr1
+[ 	]+[0-9a-f]+:[ 	]+3b202573[ 	]+csrr[ 	]+a0,pmpaddr2
+[ 	]+[0-9a-f]+:[ 	]+3b302573[ 	]+csrr[ 	]+a0,pmpaddr3
+[ 	]+[0-9a-f]+:[ 	]+3b402573[ 	]+csrr[ 	]+a0,pmpaddr4
+[ 	]+[0-9a-f]+:[ 	]+3b502573[ 	]+csrr[ 	]+a0,pmpaddr5
+[ 	]+[0-9a-f]+:[ 	]+3b602573[ 	]+csrr[ 	]+a0,pmpaddr6
+[ 	]+[0-9a-f]+:[ 	]+3b702573[ 	]+csrr[ 	]+a0,pmpaddr7
+[ 	]+[0-9a-f]+:[ 	]+3b802573[ 	]+csrr[ 	]+a0,pmpaddr8
+[ 	]+[0-9a-f]+:[ 	]+3b902573[ 	]+csrr[ 	]+a0,pmpaddr9
+[ 	]+[0-9a-f]+:[ 	]+3ba02573[ 	]+csrr[ 	]+a0,pmpaddr10
+[ 	]+[0-9a-f]+:[ 	]+3bb02573[ 	]+csrr[ 	]+a0,pmpaddr11
+[ 	]+[0-9a-f]+:[ 	]+3bc02573[ 	]+csrr[ 	]+a0,pmpaddr12
+[ 	]+[0-9a-f]+:[ 	]+3bd02573[ 	]+csrr[ 	]+a0,pmpaddr13
+[ 	]+[0-9a-f]+:[ 	]+3be02573[ 	]+csrr[ 	]+a0,pmpaddr14
+[ 	]+[0-9a-f]+:[ 	]+3bf02573[ 	]+csrr[ 	]+a0,pmpaddr15
+[ 	]+[0-9a-f]+:[ 	]+b0002573[ 	]+csrr[ 	]+a0,mcycle
+[ 	]+[0-9a-f]+:[ 	]+b0202573[ 	]+csrr[ 	]+a0,minstret
+[ 	]+[0-9a-f]+:[ 	]+b0302573[ 	]+csrr[ 	]+a0,mhpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+b0402573[ 	]+csrr[ 	]+a0,mhpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+b0502573[ 	]+csrr[ 	]+a0,mhpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+b0602573[ 	]+csrr[ 	]+a0,mhpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+b0702573[ 	]+csrr[ 	]+a0,mhpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+b0802573[ 	]+csrr[ 	]+a0,mhpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+b0902573[ 	]+csrr[ 	]+a0,mhpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+b0a02573[ 	]+csrr[ 	]+a0,mhpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+b0b02573[ 	]+csrr[ 	]+a0,mhpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+b0c02573[ 	]+csrr[ 	]+a0,mhpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+b0d02573[ 	]+csrr[ 	]+a0,mhpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+b0e02573[ 	]+csrr[ 	]+a0,mhpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+b0f02573[ 	]+csrr[ 	]+a0,mhpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+b1002573[ 	]+csrr[ 	]+a0,mhpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+b1102573[ 	]+csrr[ 	]+a0,mhpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+b1202573[ 	]+csrr[ 	]+a0,mhpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+b1302573[ 	]+csrr[ 	]+a0,mhpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+b1402573[ 	]+csrr[ 	]+a0,mhpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+b1502573[ 	]+csrr[ 	]+a0,mhpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+b1602573[ 	]+csrr[ 	]+a0,mhpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+b1702573[ 	]+csrr[ 	]+a0,mhpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+b1802573[ 	]+csrr[ 	]+a0,mhpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+b1902573[ 	]+csrr[ 	]+a0,mhpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+b1a02573[ 	]+csrr[ 	]+a0,mhpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+b1b02573[ 	]+csrr[ 	]+a0,mhpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+b1c02573[ 	]+csrr[ 	]+a0,mhpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+b1d02573[ 	]+csrr[ 	]+a0,mhpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+b1e02573[ 	]+csrr[ 	]+a0,mhpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+b1f02573[ 	]+csrr[ 	]+a0,mhpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+b8002573[ 	]+csrr[ 	]+a0,mcycleh
+[ 	]+[0-9a-f]+:[ 	]+b8202573[ 	]+csrr[ 	]+a0,minstreth
+[ 	]+[0-9a-f]+:[ 	]+b8302573[ 	]+csrr[ 	]+a0,mhpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+b8402573[ 	]+csrr[ 	]+a0,mhpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+b8502573[ 	]+csrr[ 	]+a0,mhpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+b8602573[ 	]+csrr[ 	]+a0,mhpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+b8702573[ 	]+csrr[ 	]+a0,mhpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+b8802573[ 	]+csrr[ 	]+a0,mhpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+b8902573[ 	]+csrr[ 	]+a0,mhpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+b8a02573[ 	]+csrr[ 	]+a0,mhpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+b8b02573[ 	]+csrr[ 	]+a0,mhpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+b8c02573[ 	]+csrr[ 	]+a0,mhpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+b8d02573[ 	]+csrr[ 	]+a0,mhpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+b8e02573[ 	]+csrr[ 	]+a0,mhpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+b8f02573[ 	]+csrr[ 	]+a0,mhpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+b9002573[ 	]+csrr[ 	]+a0,mhpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+b9102573[ 	]+csrr[ 	]+a0,mhpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+b9202573[ 	]+csrr[ 	]+a0,mhpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+b9302573[ 	]+csrr[ 	]+a0,mhpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+b9402573[ 	]+csrr[ 	]+a0,mhpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+b9502573[ 	]+csrr[ 	]+a0,mhpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+b9602573[ 	]+csrr[ 	]+a0,mhpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+b9702573[ 	]+csrr[ 	]+a0,mhpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+b9802573[ 	]+csrr[ 	]+a0,mhpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+b9902573[ 	]+csrr[ 	]+a0,mhpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+b9a02573[ 	]+csrr[ 	]+a0,mhpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+b9b02573[ 	]+csrr[ 	]+a0,mhpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+b9c02573[ 	]+csrr[ 	]+a0,mhpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+b9d02573[ 	]+csrr[ 	]+a0,mhpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+b9e02573[ 	]+csrr[ 	]+a0,mhpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+b9f02573[ 	]+csrr[ 	]+a0,mhpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,0x320
+[ 	]+[0-9a-f]+:[ 	]+32302573[ 	]+csrr[ 	]+a0,mhpmevent3
+[ 	]+[0-9a-f]+:[ 	]+32402573[ 	]+csrr[ 	]+a0,mhpmevent4
+[ 	]+[0-9a-f]+:[ 	]+32502573[ 	]+csrr[ 	]+a0,mhpmevent5
+[ 	]+[0-9a-f]+:[ 	]+32602573[ 	]+csrr[ 	]+a0,mhpmevent6
+[ 	]+[0-9a-f]+:[ 	]+32702573[ 	]+csrr[ 	]+a0,mhpmevent7
+[ 	]+[0-9a-f]+:[ 	]+32802573[ 	]+csrr[ 	]+a0,mhpmevent8
+[ 	]+[0-9a-f]+:[ 	]+32902573[ 	]+csrr[ 	]+a0,mhpmevent9
+[ 	]+[0-9a-f]+:[ 	]+32a02573[ 	]+csrr[ 	]+a0,mhpmevent10
+[ 	]+[0-9a-f]+:[ 	]+32b02573[ 	]+csrr[ 	]+a0,mhpmevent11
+[ 	]+[0-9a-f]+:[ 	]+32c02573[ 	]+csrr[ 	]+a0,mhpmevent12
+[ 	]+[0-9a-f]+:[ 	]+32d02573[ 	]+csrr[ 	]+a0,mhpmevent13
+[ 	]+[0-9a-f]+:[ 	]+32e02573[ 	]+csrr[ 	]+a0,mhpmevent14
+[ 	]+[0-9a-f]+:[ 	]+32f02573[ 	]+csrr[ 	]+a0,mhpmevent15
+[ 	]+[0-9a-f]+:[ 	]+33002573[ 	]+csrr[ 	]+a0,mhpmevent16
+[ 	]+[0-9a-f]+:[ 	]+33102573[ 	]+csrr[ 	]+a0,mhpmevent17
+[ 	]+[0-9a-f]+:[ 	]+33202573[ 	]+csrr[ 	]+a0,mhpmevent18
+[ 	]+[0-9a-f]+:[ 	]+33302573[ 	]+csrr[ 	]+a0,mhpmevent19
+[ 	]+[0-9a-f]+:[ 	]+33402573[ 	]+csrr[ 	]+a0,mhpmevent20
+[ 	]+[0-9a-f]+:[ 	]+33502573[ 	]+csrr[ 	]+a0,mhpmevent21
+[ 	]+[0-9a-f]+:[ 	]+33602573[ 	]+csrr[ 	]+a0,mhpmevent22
+[ 	]+[0-9a-f]+:[ 	]+33702573[ 	]+csrr[ 	]+a0,mhpmevent23
+[ 	]+[0-9a-f]+:[ 	]+33802573[ 	]+csrr[ 	]+a0,mhpmevent24
+[ 	]+[0-9a-f]+:[ 	]+33902573[ 	]+csrr[ 	]+a0,mhpmevent25
+[ 	]+[0-9a-f]+:[ 	]+33a02573[ 	]+csrr[ 	]+a0,mhpmevent26
+[ 	]+[0-9a-f]+:[ 	]+33b02573[ 	]+csrr[ 	]+a0,mhpmevent27
+[ 	]+[0-9a-f]+:[ 	]+33c02573[ 	]+csrr[ 	]+a0,mhpmevent28
+[ 	]+[0-9a-f]+:[ 	]+33d02573[ 	]+csrr[ 	]+a0,mhpmevent29
+[ 	]+[0-9a-f]+:[ 	]+33e02573[ 	]+csrr[ 	]+a0,mhpmevent30
+[ 	]+[0-9a-f]+:[ 	]+33f02573[ 	]+csrr[ 	]+a0,mhpmevent31
+[ 	]+[0-9a-f]+:[ 	]+7a002573[ 	]+csrr[ 	]+a0,tselect
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a202573[ 	]+csrr[ 	]+a0,tdata2
+[ 	]+[0-9a-f]+:[ 	]+7a302573[ 	]+csrr[ 	]+a0,tdata3
+[ 	]+[0-9a-f]+:[ 	]+7b002573[ 	]+csrr[ 	]+a0,dcsr
+[ 	]+[0-9a-f]+:[ 	]+7b102573[ 	]+csrr[ 	]+a0,dpc
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch
+[ 	]+[0-9a-f]+:[ 	]+7b302573[ 	]+csrr[ 	]+a0,0x7b3
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mtval
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,0x320
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch
+[ 	]+[0-9a-f]+:[ 	]+20002573[ 	]+csrr[ 	]+a0,0x200
+[ 	]+[0-9a-f]+:[ 	]+20202573[ 	]+csrr[ 	]+a0,0x202
+[ 	]+[0-9a-f]+:[ 	]+20302573[ 	]+csrr[ 	]+a0,0x203
+[ 	]+[0-9a-f]+:[ 	]+20402573[ 	]+csrr[ 	]+a0,0x204
+[ 	]+[0-9a-f]+:[ 	]+20502573[ 	]+csrr[ 	]+a0,0x205
+[ 	]+[0-9a-f]+:[ 	]+24002573[ 	]+csrr[ 	]+a0,0x240
+[ 	]+[0-9a-f]+:[ 	]+24102573[ 	]+csrr[ 	]+a0,0x241
+[ 	]+[0-9a-f]+:[ 	]+24202573[ 	]+csrr[ 	]+a0,0x242
+[ 	]+[0-9a-f]+:[ 	]+24302573[ 	]+csrr[ 	]+a0,0x243
+[ 	]+[0-9a-f]+:[ 	]+24402573[ 	]+csrr[ 	]+a0,0x244
+[ 	]+[0-9a-f]+:[ 	]+38002573[ 	]+csrr[ 	]+a0,0x380
+[ 	]+[0-9a-f]+:[ 	]+38102573[ 	]+csrr[ 	]+a0,0x381
+[ 	]+[0-9a-f]+:[ 	]+38202573[ 	]+csrr[ 	]+a0,0x382
+[ 	]+[0-9a-f]+:[ 	]+38302573[ 	]+csrr[ 	]+a0,0x383
+[ 	]+[0-9a-f]+:[ 	]+38402573[ 	]+csrr[ 	]+a0,0x384
+[ 	]+[0-9a-f]+:[ 	]+38502573[ 	]+csrr[ 	]+a0,0x385
+[ 	]+[0-9a-f]+:[ 	]+32102573[ 	]+csrr[ 	]+a0,0x321
+[ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,0x322
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
new file mode 100644
index 0000000..1196c80
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
@@ -0,0 +1,257 @@
+#as: -march=rv32if -mpriv-spec=1p11
+#source: priv-reg.s
+#objdump: -dr -Mpriv-spec=1p11
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+frflags[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+frrm[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00302573[ 	]+frcsr[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0202573[ 	]+rdinstret[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0302573[ 	]+csrr[ 	]+a0,hpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+c0402573[ 	]+csrr[ 	]+a0,hpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+c0502573[ 	]+csrr[ 	]+a0,hpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+c0602573[ 	]+csrr[ 	]+a0,hpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+c0702573[ 	]+csrr[ 	]+a0,hpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+c0802573[ 	]+csrr[ 	]+a0,hpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+c0902573[ 	]+csrr[ 	]+a0,hpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+c0a02573[ 	]+csrr[ 	]+a0,hpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+c0b02573[ 	]+csrr[ 	]+a0,hpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+c0c02573[ 	]+csrr[ 	]+a0,hpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+c0d02573[ 	]+csrr[ 	]+a0,hpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+c0e02573[ 	]+csrr[ 	]+a0,hpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+c0f02573[ 	]+csrr[ 	]+a0,hpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+c1002573[ 	]+csrr[ 	]+a0,hpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+c1102573[ 	]+csrr[ 	]+a0,hpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+c1202573[ 	]+csrr[ 	]+a0,hpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+c1302573[ 	]+csrr[ 	]+a0,hpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+c1402573[ 	]+csrr[ 	]+a0,hpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+c1502573[ 	]+csrr[ 	]+a0,hpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+c1602573[ 	]+csrr[ 	]+a0,hpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+c1702573[ 	]+csrr[ 	]+a0,hpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+c1802573[ 	]+csrr[ 	]+a0,hpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+c1902573[ 	]+csrr[ 	]+a0,hpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+c1a02573[ 	]+csrr[ 	]+a0,hpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+c1b02573[ 	]+csrr[ 	]+a0,hpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+c1c02573[ 	]+csrr[ 	]+a0,hpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+c1d02573[ 	]+csrr[ 	]+a0,hpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+c1e02573[ 	]+csrr[ 	]+a0,hpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+c1f02573[ 	]+csrr[ 	]+a0,hpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+c8002573[ 	]+rdcycleh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8102573[ 	]+rdtimeh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8202573[ 	]+rdinstreth[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8302573[ 	]+csrr[ 	]+a0,hpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+c8402573[ 	]+csrr[ 	]+a0,hpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+c8502573[ 	]+csrr[ 	]+a0,hpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+c8602573[ 	]+csrr[ 	]+a0,hpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+c8702573[ 	]+csrr[ 	]+a0,hpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+c8802573[ 	]+csrr[ 	]+a0,hpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+c8902573[ 	]+csrr[ 	]+a0,hpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+c8a02573[ 	]+csrr[ 	]+a0,hpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+c8b02573[ 	]+csrr[ 	]+a0,hpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+c8c02573[ 	]+csrr[ 	]+a0,hpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+c8d02573[ 	]+csrr[ 	]+a0,hpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+c8e02573[ 	]+csrr[ 	]+a0,hpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+c8f02573[ 	]+csrr[ 	]+a0,hpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+c9002573[ 	]+csrr[ 	]+a0,hpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+c9102573[ 	]+csrr[ 	]+a0,hpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+c9202573[ 	]+csrr[ 	]+a0,hpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+c9302573[ 	]+csrr[ 	]+a0,hpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+c9402573[ 	]+csrr[ 	]+a0,hpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+c9502573[ 	]+csrr[ 	]+a0,hpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+c9602573[ 	]+csrr[ 	]+a0,hpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+c9702573[ 	]+csrr[ 	]+a0,hpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+c9802573[ 	]+csrr[ 	]+a0,hpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+c9902573[ 	]+csrr[ 	]+a0,hpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+c9a02573[ 	]+csrr[ 	]+a0,hpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+c9b02573[ 	]+csrr[ 	]+a0,hpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+c9c02573[ 	]+csrr[ 	]+a0,hpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+c9d02573[ 	]+csrr[ 	]+a0,hpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+c9e02573[ 	]+csrr[ 	]+a0,hpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+c9f02573[ 	]+csrr[ 	]+a0,hpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
+[ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
+[ 	]+[0-9a-f]+:[ 	]+10602573[ 	]+csrr[ 	]+a0,scounteren
+[ 	]+[0-9a-f]+:[ 	]+14002573[ 	]+csrr[ 	]+a0,sscratch
+[ 	]+[0-9a-f]+:[ 	]+14102573[ 	]+csrr[ 	]+a0,sepc
+[ 	]+[0-9a-f]+:[ 	]+14202573[ 	]+csrr[ 	]+a0,scause
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
+[ 	]+[0-9a-f]+:[ 	]+14402573[ 	]+csrr[ 	]+a0,sip
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
+[ 	]+[0-9a-f]+:[ 	]+f1102573[ 	]+csrr[ 	]+a0,mvendorid
+[ 	]+[0-9a-f]+:[ 	]+f1202573[ 	]+csrr[ 	]+a0,marchid
+[ 	]+[0-9a-f]+:[ 	]+f1302573[ 	]+csrr[ 	]+a0,mimpid
+[ 	]+[0-9a-f]+:[ 	]+f1402573[ 	]+csrr[ 	]+a0,mhartid
+[ 	]+[0-9a-f]+:[ 	]+30002573[ 	]+csrr[ 	]+a0,mstatus
+[ 	]+[0-9a-f]+:[ 	]+30102573[ 	]+csrr[ 	]+a0,misa
+[ 	]+[0-9a-f]+:[ 	]+30202573[ 	]+csrr[ 	]+a0,medeleg
+[ 	]+[0-9a-f]+:[ 	]+30302573[ 	]+csrr[ 	]+a0,mideleg
+[ 	]+[0-9a-f]+:[ 	]+30402573[ 	]+csrr[ 	]+a0,mie
+[ 	]+[0-9a-f]+:[ 	]+30502573[ 	]+csrr[ 	]+a0,mtvec
+[ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,mcounteren
+[ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
+[ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
+[ 	]+[0-9a-f]+:[ 	]+34202573[ 	]+csrr[ 	]+a0,mcause
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mtval
+[ 	]+[0-9a-f]+:[ 	]+34402573[ 	]+csrr[ 	]+a0,mip
+[ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,pmpcfg0
+[ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,pmpcfg1
+[ 	]+[0-9a-f]+:[ 	]+3a202573[ 	]+csrr[ 	]+a0,pmpcfg2
+[ 	]+[0-9a-f]+:[ 	]+3a302573[ 	]+csrr[ 	]+a0,pmpcfg3
+[ 	]+[0-9a-f]+:[ 	]+3b002573[ 	]+csrr[ 	]+a0,pmpaddr0
+[ 	]+[0-9a-f]+:[ 	]+3b102573[ 	]+csrr[ 	]+a0,pmpaddr1
+[ 	]+[0-9a-f]+:[ 	]+3b202573[ 	]+csrr[ 	]+a0,pmpaddr2
+[ 	]+[0-9a-f]+:[ 	]+3b302573[ 	]+csrr[ 	]+a0,pmpaddr3
+[ 	]+[0-9a-f]+:[ 	]+3b402573[ 	]+csrr[ 	]+a0,pmpaddr4
+[ 	]+[0-9a-f]+:[ 	]+3b502573[ 	]+csrr[ 	]+a0,pmpaddr5
+[ 	]+[0-9a-f]+:[ 	]+3b602573[ 	]+csrr[ 	]+a0,pmpaddr6
+[ 	]+[0-9a-f]+:[ 	]+3b702573[ 	]+csrr[ 	]+a0,pmpaddr7
+[ 	]+[0-9a-f]+:[ 	]+3b802573[ 	]+csrr[ 	]+a0,pmpaddr8
+[ 	]+[0-9a-f]+:[ 	]+3b902573[ 	]+csrr[ 	]+a0,pmpaddr9
+[ 	]+[0-9a-f]+:[ 	]+3ba02573[ 	]+csrr[ 	]+a0,pmpaddr10
+[ 	]+[0-9a-f]+:[ 	]+3bb02573[ 	]+csrr[ 	]+a0,pmpaddr11
+[ 	]+[0-9a-f]+:[ 	]+3bc02573[ 	]+csrr[ 	]+a0,pmpaddr12
+[ 	]+[0-9a-f]+:[ 	]+3bd02573[ 	]+csrr[ 	]+a0,pmpaddr13
+[ 	]+[0-9a-f]+:[ 	]+3be02573[ 	]+csrr[ 	]+a0,pmpaddr14
+[ 	]+[0-9a-f]+:[ 	]+3bf02573[ 	]+csrr[ 	]+a0,pmpaddr15
+[ 	]+[0-9a-f]+:[ 	]+b0002573[ 	]+csrr[ 	]+a0,mcycle
+[ 	]+[0-9a-f]+:[ 	]+b0202573[ 	]+csrr[ 	]+a0,minstret
+[ 	]+[0-9a-f]+:[ 	]+b0302573[ 	]+csrr[ 	]+a0,mhpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+b0402573[ 	]+csrr[ 	]+a0,mhpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+b0502573[ 	]+csrr[ 	]+a0,mhpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+b0602573[ 	]+csrr[ 	]+a0,mhpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+b0702573[ 	]+csrr[ 	]+a0,mhpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+b0802573[ 	]+csrr[ 	]+a0,mhpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+b0902573[ 	]+csrr[ 	]+a0,mhpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+b0a02573[ 	]+csrr[ 	]+a0,mhpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+b0b02573[ 	]+csrr[ 	]+a0,mhpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+b0c02573[ 	]+csrr[ 	]+a0,mhpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+b0d02573[ 	]+csrr[ 	]+a0,mhpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+b0e02573[ 	]+csrr[ 	]+a0,mhpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+b0f02573[ 	]+csrr[ 	]+a0,mhpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+b1002573[ 	]+csrr[ 	]+a0,mhpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+b1102573[ 	]+csrr[ 	]+a0,mhpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+b1202573[ 	]+csrr[ 	]+a0,mhpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+b1302573[ 	]+csrr[ 	]+a0,mhpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+b1402573[ 	]+csrr[ 	]+a0,mhpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+b1502573[ 	]+csrr[ 	]+a0,mhpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+b1602573[ 	]+csrr[ 	]+a0,mhpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+b1702573[ 	]+csrr[ 	]+a0,mhpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+b1802573[ 	]+csrr[ 	]+a0,mhpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+b1902573[ 	]+csrr[ 	]+a0,mhpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+b1a02573[ 	]+csrr[ 	]+a0,mhpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+b1b02573[ 	]+csrr[ 	]+a0,mhpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+b1c02573[ 	]+csrr[ 	]+a0,mhpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+b1d02573[ 	]+csrr[ 	]+a0,mhpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+b1e02573[ 	]+csrr[ 	]+a0,mhpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+b1f02573[ 	]+csrr[ 	]+a0,mhpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+b8002573[ 	]+csrr[ 	]+a0,mcycleh
+[ 	]+[0-9a-f]+:[ 	]+b8202573[ 	]+csrr[ 	]+a0,minstreth
+[ 	]+[0-9a-f]+:[ 	]+b8302573[ 	]+csrr[ 	]+a0,mhpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+b8402573[ 	]+csrr[ 	]+a0,mhpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+b8502573[ 	]+csrr[ 	]+a0,mhpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+b8602573[ 	]+csrr[ 	]+a0,mhpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+b8702573[ 	]+csrr[ 	]+a0,mhpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+b8802573[ 	]+csrr[ 	]+a0,mhpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+b8902573[ 	]+csrr[ 	]+a0,mhpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+b8a02573[ 	]+csrr[ 	]+a0,mhpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+b8b02573[ 	]+csrr[ 	]+a0,mhpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+b8c02573[ 	]+csrr[ 	]+a0,mhpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+b8d02573[ 	]+csrr[ 	]+a0,mhpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+b8e02573[ 	]+csrr[ 	]+a0,mhpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+b8f02573[ 	]+csrr[ 	]+a0,mhpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+b9002573[ 	]+csrr[ 	]+a0,mhpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+b9102573[ 	]+csrr[ 	]+a0,mhpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+b9202573[ 	]+csrr[ 	]+a0,mhpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+b9302573[ 	]+csrr[ 	]+a0,mhpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+b9402573[ 	]+csrr[ 	]+a0,mhpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+b9502573[ 	]+csrr[ 	]+a0,mhpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+b9602573[ 	]+csrr[ 	]+a0,mhpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+b9702573[ 	]+csrr[ 	]+a0,mhpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+b9802573[ 	]+csrr[ 	]+a0,mhpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+b9902573[ 	]+csrr[ 	]+a0,mhpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+b9a02573[ 	]+csrr[ 	]+a0,mhpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+b9b02573[ 	]+csrr[ 	]+a0,mhpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+b9c02573[ 	]+csrr[ 	]+a0,mhpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+b9d02573[ 	]+csrr[ 	]+a0,mhpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+b9e02573[ 	]+csrr[ 	]+a0,mhpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+b9f02573[ 	]+csrr[ 	]+a0,mhpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mcountinhibit
+[ 	]+[0-9a-f]+:[ 	]+32302573[ 	]+csrr[ 	]+a0,mhpmevent3
+[ 	]+[0-9a-f]+:[ 	]+32402573[ 	]+csrr[ 	]+a0,mhpmevent4
+[ 	]+[0-9a-f]+:[ 	]+32502573[ 	]+csrr[ 	]+a0,mhpmevent5
+[ 	]+[0-9a-f]+:[ 	]+32602573[ 	]+csrr[ 	]+a0,mhpmevent6
+[ 	]+[0-9a-f]+:[ 	]+32702573[ 	]+csrr[ 	]+a0,mhpmevent7
+[ 	]+[0-9a-f]+:[ 	]+32802573[ 	]+csrr[ 	]+a0,mhpmevent8
+[ 	]+[0-9a-f]+:[ 	]+32902573[ 	]+csrr[ 	]+a0,mhpmevent9
+[ 	]+[0-9a-f]+:[ 	]+32a02573[ 	]+csrr[ 	]+a0,mhpmevent10
+[ 	]+[0-9a-f]+:[ 	]+32b02573[ 	]+csrr[ 	]+a0,mhpmevent11
+[ 	]+[0-9a-f]+:[ 	]+32c02573[ 	]+csrr[ 	]+a0,mhpmevent12
+[ 	]+[0-9a-f]+:[ 	]+32d02573[ 	]+csrr[ 	]+a0,mhpmevent13
+[ 	]+[0-9a-f]+:[ 	]+32e02573[ 	]+csrr[ 	]+a0,mhpmevent14
+[ 	]+[0-9a-f]+:[ 	]+32f02573[ 	]+csrr[ 	]+a0,mhpmevent15
+[ 	]+[0-9a-f]+:[ 	]+33002573[ 	]+csrr[ 	]+a0,mhpmevent16
+[ 	]+[0-9a-f]+:[ 	]+33102573[ 	]+csrr[ 	]+a0,mhpmevent17
+[ 	]+[0-9a-f]+:[ 	]+33202573[ 	]+csrr[ 	]+a0,mhpmevent18
+[ 	]+[0-9a-f]+:[ 	]+33302573[ 	]+csrr[ 	]+a0,mhpmevent19
+[ 	]+[0-9a-f]+:[ 	]+33402573[ 	]+csrr[ 	]+a0,mhpmevent20
+[ 	]+[0-9a-f]+:[ 	]+33502573[ 	]+csrr[ 	]+a0,mhpmevent21
+[ 	]+[0-9a-f]+:[ 	]+33602573[ 	]+csrr[ 	]+a0,mhpmevent22
+[ 	]+[0-9a-f]+:[ 	]+33702573[ 	]+csrr[ 	]+a0,mhpmevent23
+[ 	]+[0-9a-f]+:[ 	]+33802573[ 	]+csrr[ 	]+a0,mhpmevent24
+[ 	]+[0-9a-f]+:[ 	]+33902573[ 	]+csrr[ 	]+a0,mhpmevent25
+[ 	]+[0-9a-f]+:[ 	]+33a02573[ 	]+csrr[ 	]+a0,mhpmevent26
+[ 	]+[0-9a-f]+:[ 	]+33b02573[ 	]+csrr[ 	]+a0,mhpmevent27
+[ 	]+[0-9a-f]+:[ 	]+33c02573[ 	]+csrr[ 	]+a0,mhpmevent28
+[ 	]+[0-9a-f]+:[ 	]+33d02573[ 	]+csrr[ 	]+a0,mhpmevent29
+[ 	]+[0-9a-f]+:[ 	]+33e02573[ 	]+csrr[ 	]+a0,mhpmevent30
+[ 	]+[0-9a-f]+:[ 	]+33f02573[ 	]+csrr[ 	]+a0,mhpmevent31
+[ 	]+[0-9a-f]+:[ 	]+7a002573[ 	]+csrr[ 	]+a0,tselect
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a202573[ 	]+csrr[ 	]+a0,tdata2
+[ 	]+[0-9a-f]+:[ 	]+7a302573[ 	]+csrr[ 	]+a0,tdata3
+[ 	]+[0-9a-f]+:[ 	]+7b002573[ 	]+csrr[ 	]+a0,dcsr
+[ 	]+[0-9a-f]+:[ 	]+7b102573[ 	]+csrr[ 	]+a0,dpc
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch0
+[ 	]+[0-9a-f]+:[ 	]+7b302573[ 	]+csrr[ 	]+a0,dscratch1
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mtval
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mcountinhibit
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch0
+[ 	]+[0-9a-f]+:[ 	]+20002573[ 	]+csrr[ 	]+a0,0x200
+[ 	]+[0-9a-f]+:[ 	]+20202573[ 	]+csrr[ 	]+a0,0x202
+[ 	]+[0-9a-f]+:[ 	]+20302573[ 	]+csrr[ 	]+a0,0x203
+[ 	]+[0-9a-f]+:[ 	]+20402573[ 	]+csrr[ 	]+a0,0x204
+[ 	]+[0-9a-f]+:[ 	]+20502573[ 	]+csrr[ 	]+a0,0x205
+[ 	]+[0-9a-f]+:[ 	]+24002573[ 	]+csrr[ 	]+a0,0x240
+[ 	]+[0-9a-f]+:[ 	]+24102573[ 	]+csrr[ 	]+a0,0x241
+[ 	]+[0-9a-f]+:[ 	]+24202573[ 	]+csrr[ 	]+a0,0x242
+[ 	]+[0-9a-f]+:[ 	]+24302573[ 	]+csrr[ 	]+a0,0x243
+[ 	]+[0-9a-f]+:[ 	]+24402573[ 	]+csrr[ 	]+a0,0x244
+[ 	]+[0-9a-f]+:[ 	]+38002573[ 	]+csrr[ 	]+a0,0x380
+[ 	]+[0-9a-f]+:[ 	]+38102573[ 	]+csrr[ 	]+a0,0x381
+[ 	]+[0-9a-f]+:[ 	]+38202573[ 	]+csrr[ 	]+a0,0x382
+[ 	]+[0-9a-f]+:[ 	]+38302573[ 	]+csrr[ 	]+a0,0x383
+[ 	]+[0-9a-f]+:[ 	]+38402573[ 	]+csrr[ 	]+a0,0x384
+[ 	]+[0-9a-f]+:[ 	]+38502573[ 	]+csrr[ 	]+a0,0x385
+[ 	]+[0-9a-f]+:[ 	]+32102573[ 	]+csrr[ 	]+a0,0x321
+[ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,0x322
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-version-1p9.d
new file mode 100644
index 0000000..1b5a5a7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-version-1p9.d
@@ -0,0 +1,257 @@
+#as: -march=rv32if -mpriv-spec=1p9
+#source: priv-reg.s
+#objdump: -dr -Mpriv-spec=1p9
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+frflags[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+frrm[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00302573[ 	]+frcsr[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0202573[ 	]+rdinstret[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0302573[ 	]+csrr[ 	]+a0,hpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+c0402573[ 	]+csrr[ 	]+a0,hpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+c0502573[ 	]+csrr[ 	]+a0,hpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+c0602573[ 	]+csrr[ 	]+a0,hpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+c0702573[ 	]+csrr[ 	]+a0,hpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+c0802573[ 	]+csrr[ 	]+a0,hpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+c0902573[ 	]+csrr[ 	]+a0,hpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+c0a02573[ 	]+csrr[ 	]+a0,hpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+c0b02573[ 	]+csrr[ 	]+a0,hpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+c0c02573[ 	]+csrr[ 	]+a0,hpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+c0d02573[ 	]+csrr[ 	]+a0,hpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+c0e02573[ 	]+csrr[ 	]+a0,hpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+c0f02573[ 	]+csrr[ 	]+a0,hpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+c1002573[ 	]+csrr[ 	]+a0,hpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+c1102573[ 	]+csrr[ 	]+a0,hpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+c1202573[ 	]+csrr[ 	]+a0,hpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+c1302573[ 	]+csrr[ 	]+a0,hpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+c1402573[ 	]+csrr[ 	]+a0,hpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+c1502573[ 	]+csrr[ 	]+a0,hpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+c1602573[ 	]+csrr[ 	]+a0,hpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+c1702573[ 	]+csrr[ 	]+a0,hpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+c1802573[ 	]+csrr[ 	]+a0,hpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+c1902573[ 	]+csrr[ 	]+a0,hpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+c1a02573[ 	]+csrr[ 	]+a0,hpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+c1b02573[ 	]+csrr[ 	]+a0,hpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+c1c02573[ 	]+csrr[ 	]+a0,hpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+c1d02573[ 	]+csrr[ 	]+a0,hpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+c1e02573[ 	]+csrr[ 	]+a0,hpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+c1f02573[ 	]+csrr[ 	]+a0,hpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+c8002573[ 	]+rdcycleh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8102573[ 	]+rdtimeh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8202573[ 	]+rdinstreth[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8302573[ 	]+csrr[ 	]+a0,hpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+c8402573[ 	]+csrr[ 	]+a0,hpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+c8502573[ 	]+csrr[ 	]+a0,hpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+c8602573[ 	]+csrr[ 	]+a0,hpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+c8702573[ 	]+csrr[ 	]+a0,hpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+c8802573[ 	]+csrr[ 	]+a0,hpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+c8902573[ 	]+csrr[ 	]+a0,hpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+c8a02573[ 	]+csrr[ 	]+a0,hpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+c8b02573[ 	]+csrr[ 	]+a0,hpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+c8c02573[ 	]+csrr[ 	]+a0,hpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+c8d02573[ 	]+csrr[ 	]+a0,hpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+c8e02573[ 	]+csrr[ 	]+a0,hpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+c8f02573[ 	]+csrr[ 	]+a0,hpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+c9002573[ 	]+csrr[ 	]+a0,hpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+c9102573[ 	]+csrr[ 	]+a0,hpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+c9202573[ 	]+csrr[ 	]+a0,hpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+c9302573[ 	]+csrr[ 	]+a0,hpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+c9402573[ 	]+csrr[ 	]+a0,hpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+c9502573[ 	]+csrr[ 	]+a0,hpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+c9602573[ 	]+csrr[ 	]+a0,hpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+c9702573[ 	]+csrr[ 	]+a0,hpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+c9802573[ 	]+csrr[ 	]+a0,hpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+c9902573[ 	]+csrr[ 	]+a0,hpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+c9a02573[ 	]+csrr[ 	]+a0,hpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+c9b02573[ 	]+csrr[ 	]+a0,hpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+c9c02573[ 	]+csrr[ 	]+a0,hpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+c9d02573[ 	]+csrr[ 	]+a0,hpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+c9e02573[ 	]+csrr[ 	]+a0,hpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+c9f02573[ 	]+csrr[ 	]+a0,hpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
+[ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
+[ 	]+[0-9a-f]+:[ 	]+10602573[ 	]+csrr[ 	]+a0,0x106
+[ 	]+[0-9a-f]+:[ 	]+14002573[ 	]+csrr[ 	]+a0,sscratch
+[ 	]+[0-9a-f]+:[ 	]+14102573[ 	]+csrr[ 	]+a0,sepc
+[ 	]+[0-9a-f]+:[ 	]+14202573[ 	]+csrr[ 	]+a0,scause
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,sbadaddr
+[ 	]+[0-9a-f]+:[ 	]+14402573[ 	]+csrr[ 	]+a0,sip
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,sptbr
+[ 	]+[0-9a-f]+:[ 	]+f1102573[ 	]+csrr[ 	]+a0,mvendorid
+[ 	]+[0-9a-f]+:[ 	]+f1202573[ 	]+csrr[ 	]+a0,marchid
+[ 	]+[0-9a-f]+:[ 	]+f1302573[ 	]+csrr[ 	]+a0,mimpid
+[ 	]+[0-9a-f]+:[ 	]+f1402573[ 	]+csrr[ 	]+a0,mhartid
+[ 	]+[0-9a-f]+:[ 	]+30002573[ 	]+csrr[ 	]+a0,mstatus
+[ 	]+[0-9a-f]+:[ 	]+f1002573[ 	]+csrr[ 	]+a0,misa
+[ 	]+[0-9a-f]+:[ 	]+30202573[ 	]+csrr[ 	]+a0,medeleg
+[ 	]+[0-9a-f]+:[ 	]+30302573[ 	]+csrr[ 	]+a0,mideleg
+[ 	]+[0-9a-f]+:[ 	]+30402573[ 	]+csrr[ 	]+a0,mie
+[ 	]+[0-9a-f]+:[ 	]+30502573[ 	]+csrr[ 	]+a0,mtvec
+[ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,0x306
+[ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
+[ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
+[ 	]+[0-9a-f]+:[ 	]+34202573[ 	]+csrr[ 	]+a0,mcause
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mbadaddr
+[ 	]+[0-9a-f]+:[ 	]+34402573[ 	]+csrr[ 	]+a0,mip
+[ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,0x3a0
+[ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,0x3a1
+[ 	]+[0-9a-f]+:[ 	]+3a202573[ 	]+csrr[ 	]+a0,0x3a2
+[ 	]+[0-9a-f]+:[ 	]+3a302573[ 	]+csrr[ 	]+a0,0x3a3
+[ 	]+[0-9a-f]+:[ 	]+3b002573[ 	]+csrr[ 	]+a0,0x3b0
+[ 	]+[0-9a-f]+:[ 	]+3b102573[ 	]+csrr[ 	]+a0,0x3b1
+[ 	]+[0-9a-f]+:[ 	]+3b202573[ 	]+csrr[ 	]+a0,0x3b2
+[ 	]+[0-9a-f]+:[ 	]+3b302573[ 	]+csrr[ 	]+a0,0x3b3
+[ 	]+[0-9a-f]+:[ 	]+3b402573[ 	]+csrr[ 	]+a0,0x3b4
+[ 	]+[0-9a-f]+:[ 	]+3b502573[ 	]+csrr[ 	]+a0,0x3b5
+[ 	]+[0-9a-f]+:[ 	]+3b602573[ 	]+csrr[ 	]+a0,0x3b6
+[ 	]+[0-9a-f]+:[ 	]+3b702573[ 	]+csrr[ 	]+a0,0x3b7
+[ 	]+[0-9a-f]+:[ 	]+3b802573[ 	]+csrr[ 	]+a0,0x3b8
+[ 	]+[0-9a-f]+:[ 	]+3b902573[ 	]+csrr[ 	]+a0,0x3b9
+[ 	]+[0-9a-f]+:[ 	]+3ba02573[ 	]+csrr[ 	]+a0,0x3ba
+[ 	]+[0-9a-f]+:[ 	]+3bb02573[ 	]+csrr[ 	]+a0,0x3bb
+[ 	]+[0-9a-f]+:[ 	]+3bc02573[ 	]+csrr[ 	]+a0,0x3bc
+[ 	]+[0-9a-f]+:[ 	]+3bd02573[ 	]+csrr[ 	]+a0,0x3bd
+[ 	]+[0-9a-f]+:[ 	]+3be02573[ 	]+csrr[ 	]+a0,0x3be
+[ 	]+[0-9a-f]+:[ 	]+3bf02573[ 	]+csrr[ 	]+a0,0x3bf
+[ 	]+[0-9a-f]+:[ 	]+b0002573[ 	]+csrr[ 	]+a0,mcycle
+[ 	]+[0-9a-f]+:[ 	]+b0202573[ 	]+csrr[ 	]+a0,minstret
+[ 	]+[0-9a-f]+:[ 	]+b0302573[ 	]+csrr[ 	]+a0,mhpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+b0402573[ 	]+csrr[ 	]+a0,mhpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+b0502573[ 	]+csrr[ 	]+a0,mhpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+b0602573[ 	]+csrr[ 	]+a0,mhpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+b0702573[ 	]+csrr[ 	]+a0,mhpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+b0802573[ 	]+csrr[ 	]+a0,mhpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+b0902573[ 	]+csrr[ 	]+a0,mhpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+b0a02573[ 	]+csrr[ 	]+a0,mhpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+b0b02573[ 	]+csrr[ 	]+a0,mhpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+b0c02573[ 	]+csrr[ 	]+a0,mhpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+b0d02573[ 	]+csrr[ 	]+a0,mhpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+b0e02573[ 	]+csrr[ 	]+a0,mhpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+b0f02573[ 	]+csrr[ 	]+a0,mhpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+b1002573[ 	]+csrr[ 	]+a0,mhpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+b1102573[ 	]+csrr[ 	]+a0,mhpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+b1202573[ 	]+csrr[ 	]+a0,mhpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+b1302573[ 	]+csrr[ 	]+a0,mhpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+b1402573[ 	]+csrr[ 	]+a0,mhpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+b1502573[ 	]+csrr[ 	]+a0,mhpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+b1602573[ 	]+csrr[ 	]+a0,mhpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+b1702573[ 	]+csrr[ 	]+a0,mhpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+b1802573[ 	]+csrr[ 	]+a0,mhpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+b1902573[ 	]+csrr[ 	]+a0,mhpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+b1a02573[ 	]+csrr[ 	]+a0,mhpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+b1b02573[ 	]+csrr[ 	]+a0,mhpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+b1c02573[ 	]+csrr[ 	]+a0,mhpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+b1d02573[ 	]+csrr[ 	]+a0,mhpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+b1e02573[ 	]+csrr[ 	]+a0,mhpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+b1f02573[ 	]+csrr[ 	]+a0,mhpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+b8002573[ 	]+csrr[ 	]+a0,mcycleh
+[ 	]+[0-9a-f]+:[ 	]+b8202573[ 	]+csrr[ 	]+a0,minstreth
+[ 	]+[0-9a-f]+:[ 	]+b8302573[ 	]+csrr[ 	]+a0,mhpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+b8402573[ 	]+csrr[ 	]+a0,mhpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+b8502573[ 	]+csrr[ 	]+a0,mhpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+b8602573[ 	]+csrr[ 	]+a0,mhpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+b8702573[ 	]+csrr[ 	]+a0,mhpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+b8802573[ 	]+csrr[ 	]+a0,mhpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+b8902573[ 	]+csrr[ 	]+a0,mhpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+b8a02573[ 	]+csrr[ 	]+a0,mhpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+b8b02573[ 	]+csrr[ 	]+a0,mhpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+b8c02573[ 	]+csrr[ 	]+a0,mhpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+b8d02573[ 	]+csrr[ 	]+a0,mhpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+b8e02573[ 	]+csrr[ 	]+a0,mhpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+b8f02573[ 	]+csrr[ 	]+a0,mhpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+b9002573[ 	]+csrr[ 	]+a0,mhpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+b9102573[ 	]+csrr[ 	]+a0,mhpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+b9202573[ 	]+csrr[ 	]+a0,mhpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+b9302573[ 	]+csrr[ 	]+a0,mhpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+b9402573[ 	]+csrr[ 	]+a0,mhpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+b9502573[ 	]+csrr[ 	]+a0,mhpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+b9602573[ 	]+csrr[ 	]+a0,mhpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+b9702573[ 	]+csrr[ 	]+a0,mhpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+b9802573[ 	]+csrr[ 	]+a0,mhpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+b9902573[ 	]+csrr[ 	]+a0,mhpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+b9a02573[ 	]+csrr[ 	]+a0,mhpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+b9b02573[ 	]+csrr[ 	]+a0,mhpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+b9c02573[ 	]+csrr[ 	]+a0,mhpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+b9d02573[ 	]+csrr[ 	]+a0,mhpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+b9e02573[ 	]+csrr[ 	]+a0,mhpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+b9f02573[ 	]+csrr[ 	]+a0,mhpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mucounteren
+[ 	]+[0-9a-f]+:[ 	]+32302573[ 	]+csrr[ 	]+a0,mhpmevent3
+[ 	]+[0-9a-f]+:[ 	]+32402573[ 	]+csrr[ 	]+a0,mhpmevent4
+[ 	]+[0-9a-f]+:[ 	]+32502573[ 	]+csrr[ 	]+a0,mhpmevent5
+[ 	]+[0-9a-f]+:[ 	]+32602573[ 	]+csrr[ 	]+a0,mhpmevent6
+[ 	]+[0-9a-f]+:[ 	]+32702573[ 	]+csrr[ 	]+a0,mhpmevent7
+[ 	]+[0-9a-f]+:[ 	]+32802573[ 	]+csrr[ 	]+a0,mhpmevent8
+[ 	]+[0-9a-f]+:[ 	]+32902573[ 	]+csrr[ 	]+a0,mhpmevent9
+[ 	]+[0-9a-f]+:[ 	]+32a02573[ 	]+csrr[ 	]+a0,mhpmevent10
+[ 	]+[0-9a-f]+:[ 	]+32b02573[ 	]+csrr[ 	]+a0,mhpmevent11
+[ 	]+[0-9a-f]+:[ 	]+32c02573[ 	]+csrr[ 	]+a0,mhpmevent12
+[ 	]+[0-9a-f]+:[ 	]+32d02573[ 	]+csrr[ 	]+a0,mhpmevent13
+[ 	]+[0-9a-f]+:[ 	]+32e02573[ 	]+csrr[ 	]+a0,mhpmevent14
+[ 	]+[0-9a-f]+:[ 	]+32f02573[ 	]+csrr[ 	]+a0,mhpmevent15
+[ 	]+[0-9a-f]+:[ 	]+33002573[ 	]+csrr[ 	]+a0,mhpmevent16
+[ 	]+[0-9a-f]+:[ 	]+33102573[ 	]+csrr[ 	]+a0,mhpmevent17
+[ 	]+[0-9a-f]+:[ 	]+33202573[ 	]+csrr[ 	]+a0,mhpmevent18
+[ 	]+[0-9a-f]+:[ 	]+33302573[ 	]+csrr[ 	]+a0,mhpmevent19
+[ 	]+[0-9a-f]+:[ 	]+33402573[ 	]+csrr[ 	]+a0,mhpmevent20
+[ 	]+[0-9a-f]+:[ 	]+33502573[ 	]+csrr[ 	]+a0,mhpmevent21
+[ 	]+[0-9a-f]+:[ 	]+33602573[ 	]+csrr[ 	]+a0,mhpmevent22
+[ 	]+[0-9a-f]+:[ 	]+33702573[ 	]+csrr[ 	]+a0,mhpmevent23
+[ 	]+[0-9a-f]+:[ 	]+33802573[ 	]+csrr[ 	]+a0,mhpmevent24
+[ 	]+[0-9a-f]+:[ 	]+33902573[ 	]+csrr[ 	]+a0,mhpmevent25
+[ 	]+[0-9a-f]+:[ 	]+33a02573[ 	]+csrr[ 	]+a0,mhpmevent26
+[ 	]+[0-9a-f]+:[ 	]+33b02573[ 	]+csrr[ 	]+a0,mhpmevent27
+[ 	]+[0-9a-f]+:[ 	]+33c02573[ 	]+csrr[ 	]+a0,mhpmevent28
+[ 	]+[0-9a-f]+:[ 	]+33d02573[ 	]+csrr[ 	]+a0,mhpmevent29
+[ 	]+[0-9a-f]+:[ 	]+33e02573[ 	]+csrr[ 	]+a0,mhpmevent30
+[ 	]+[0-9a-f]+:[ 	]+33f02573[ 	]+csrr[ 	]+a0,mhpmevent31
+[ 	]+[0-9a-f]+:[ 	]+7a002573[ 	]+csrr[ 	]+a0,tselect
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a202573[ 	]+csrr[ 	]+a0,tdata2
+[ 	]+[0-9a-f]+:[ 	]+7a302573[ 	]+csrr[ 	]+a0,tdata3
+[ 	]+[0-9a-f]+:[ 	]+7b002573[ 	]+csrr[ 	]+a0,dcsr
+[ 	]+[0-9a-f]+:[ 	]+7b102573[ 	]+csrr[ 	]+a0,dpc
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch
+[ 	]+[0-9a-f]+:[ 	]+7b302573[ 	]+csrr[ 	]+a0,0x7b3
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,sbadaddr
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,sptbr
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mbadaddr
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mucounteren
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch
+[ 	]+[0-9a-f]+:[ 	]+20002573[ 	]+csrr[ 	]+a0,hstatus
+[ 	]+[0-9a-f]+:[ 	]+20202573[ 	]+csrr[ 	]+a0,hedeleg
+[ 	]+[0-9a-f]+:[ 	]+20302573[ 	]+csrr[ 	]+a0,hideleg
+[ 	]+[0-9a-f]+:[ 	]+20402573[ 	]+csrr[ 	]+a0,hie
+[ 	]+[0-9a-f]+:[ 	]+20502573[ 	]+csrr[ 	]+a0,htvec
+[ 	]+[0-9a-f]+:[ 	]+24002573[ 	]+csrr[ 	]+a0,hscratch
+[ 	]+[0-9a-f]+:[ 	]+24102573[ 	]+csrr[ 	]+a0,hepc
+[ 	]+[0-9a-f]+:[ 	]+24202573[ 	]+csrr[ 	]+a0,hcause
+[ 	]+[0-9a-f]+:[ 	]+24302573[ 	]+csrr[ 	]+a0,hbadaddr
+[ 	]+[0-9a-f]+:[ 	]+24402573[ 	]+csrr[ 	]+a0,hip
+[ 	]+[0-9a-f]+:[ 	]+38002573[ 	]+csrr[ 	]+a0,mbase
+[ 	]+[0-9a-f]+:[ 	]+38102573[ 	]+csrr[ 	]+a0,mbound
+[ 	]+[0-9a-f]+:[ 	]+38202573[ 	]+csrr[ 	]+a0,mibase
+[ 	]+[0-9a-f]+:[ 	]+38302573[ 	]+csrr[ 	]+a0,mibound
+[ 	]+[0-9a-f]+:[ 	]+38402573[ 	]+csrr[ 	]+a0,mdbase
+[ 	]+[0-9a-f]+:[ 	]+38502573[ 	]+csrr[ 	]+a0,mdbound
+[ 	]+[0-9a-f]+:[ 	]+32102573[ 	]+csrr[ 	]+a0,mscounteren
+[ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,mhcounteren
diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
new file mode 100644
index 0000000..5affc54
--- /dev/null
+++ b/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
@@ -0,0 +1,257 @@
+#as: -march=rv32if -mpriv-spec=1p9p1
+#source: priv-reg.s
+#objdump: -dr -Mpriv-spec=1p9p1
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+frflags[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+frrm[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+00302573[ 	]+frcsr[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0202573[ 	]+rdinstret[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c0302573[ 	]+csrr[ 	]+a0,hpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+c0402573[ 	]+csrr[ 	]+a0,hpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+c0502573[ 	]+csrr[ 	]+a0,hpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+c0602573[ 	]+csrr[ 	]+a0,hpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+c0702573[ 	]+csrr[ 	]+a0,hpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+c0802573[ 	]+csrr[ 	]+a0,hpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+c0902573[ 	]+csrr[ 	]+a0,hpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+c0a02573[ 	]+csrr[ 	]+a0,hpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+c0b02573[ 	]+csrr[ 	]+a0,hpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+c0c02573[ 	]+csrr[ 	]+a0,hpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+c0d02573[ 	]+csrr[ 	]+a0,hpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+c0e02573[ 	]+csrr[ 	]+a0,hpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+c0f02573[ 	]+csrr[ 	]+a0,hpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+c1002573[ 	]+csrr[ 	]+a0,hpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+c1102573[ 	]+csrr[ 	]+a0,hpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+c1202573[ 	]+csrr[ 	]+a0,hpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+c1302573[ 	]+csrr[ 	]+a0,hpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+c1402573[ 	]+csrr[ 	]+a0,hpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+c1502573[ 	]+csrr[ 	]+a0,hpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+c1602573[ 	]+csrr[ 	]+a0,hpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+c1702573[ 	]+csrr[ 	]+a0,hpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+c1802573[ 	]+csrr[ 	]+a0,hpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+c1902573[ 	]+csrr[ 	]+a0,hpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+c1a02573[ 	]+csrr[ 	]+a0,hpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+c1b02573[ 	]+csrr[ 	]+a0,hpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+c1c02573[ 	]+csrr[ 	]+a0,hpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+c1d02573[ 	]+csrr[ 	]+a0,hpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+c1e02573[ 	]+csrr[ 	]+a0,hpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+c1f02573[ 	]+csrr[ 	]+a0,hpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+c8002573[ 	]+rdcycleh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8102573[ 	]+rdtimeh[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8202573[ 	]+rdinstreth[ 	]+a0
+[ 	]+[0-9a-f]+:[ 	]+c8302573[ 	]+csrr[ 	]+a0,hpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+c8402573[ 	]+csrr[ 	]+a0,hpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+c8502573[ 	]+csrr[ 	]+a0,hpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+c8602573[ 	]+csrr[ 	]+a0,hpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+c8702573[ 	]+csrr[ 	]+a0,hpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+c8802573[ 	]+csrr[ 	]+a0,hpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+c8902573[ 	]+csrr[ 	]+a0,hpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+c8a02573[ 	]+csrr[ 	]+a0,hpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+c8b02573[ 	]+csrr[ 	]+a0,hpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+c8c02573[ 	]+csrr[ 	]+a0,hpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+c8d02573[ 	]+csrr[ 	]+a0,hpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+c8e02573[ 	]+csrr[ 	]+a0,hpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+c8f02573[ 	]+csrr[ 	]+a0,hpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+c9002573[ 	]+csrr[ 	]+a0,hpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+c9102573[ 	]+csrr[ 	]+a0,hpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+c9202573[ 	]+csrr[ 	]+a0,hpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+c9302573[ 	]+csrr[ 	]+a0,hpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+c9402573[ 	]+csrr[ 	]+a0,hpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+c9502573[ 	]+csrr[ 	]+a0,hpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+c9602573[ 	]+csrr[ 	]+a0,hpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+c9702573[ 	]+csrr[ 	]+a0,hpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+c9802573[ 	]+csrr[ 	]+a0,hpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+c9902573[ 	]+csrr[ 	]+a0,hpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+c9a02573[ 	]+csrr[ 	]+a0,hpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+c9b02573[ 	]+csrr[ 	]+a0,hpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+c9c02573[ 	]+csrr[ 	]+a0,hpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+c9d02573[ 	]+csrr[ 	]+a0,hpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+c9e02573[ 	]+csrr[ 	]+a0,hpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+c9f02573[ 	]+csrr[ 	]+a0,hpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
+[ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
+[ 	]+[0-9a-f]+:[ 	]+10602573[ 	]+csrr[ 	]+a0,0x106
+[ 	]+[0-9a-f]+:[ 	]+14002573[ 	]+csrr[ 	]+a0,sscratch
+[ 	]+[0-9a-f]+:[ 	]+14102573[ 	]+csrr[ 	]+a0,sepc
+[ 	]+[0-9a-f]+:[ 	]+14202573[ 	]+csrr[ 	]+a0,scause
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,sbadaddr
+[ 	]+[0-9a-f]+:[ 	]+14402573[ 	]+csrr[ 	]+a0,sip
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,sptbr
+[ 	]+[0-9a-f]+:[ 	]+f1102573[ 	]+csrr[ 	]+a0,mvendorid
+[ 	]+[0-9a-f]+:[ 	]+f1202573[ 	]+csrr[ 	]+a0,marchid
+[ 	]+[0-9a-f]+:[ 	]+f1302573[ 	]+csrr[ 	]+a0,mimpid
+[ 	]+[0-9a-f]+:[ 	]+f1402573[ 	]+csrr[ 	]+a0,mhartid
+[ 	]+[0-9a-f]+:[ 	]+30002573[ 	]+csrr[ 	]+a0,mstatus
+[ 	]+[0-9a-f]+:[ 	]+30102573[ 	]+csrr[ 	]+a0,misa
+[ 	]+[0-9a-f]+:[ 	]+30202573[ 	]+csrr[ 	]+a0,medeleg
+[ 	]+[0-9a-f]+:[ 	]+30302573[ 	]+csrr[ 	]+a0,mideleg
+[ 	]+[0-9a-f]+:[ 	]+30402573[ 	]+csrr[ 	]+a0,mie
+[ 	]+[0-9a-f]+:[ 	]+30502573[ 	]+csrr[ 	]+a0,mtvec
+[ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,0x306
+[ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
+[ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
+[ 	]+[0-9a-f]+:[ 	]+34202573[ 	]+csrr[ 	]+a0,mcause
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mbadaddr
+[ 	]+[0-9a-f]+:[ 	]+34402573[ 	]+csrr[ 	]+a0,mip
+[ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,0x3a0
+[ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,0x3a1
+[ 	]+[0-9a-f]+:[ 	]+3a202573[ 	]+csrr[ 	]+a0,0x3a2
+[ 	]+[0-9a-f]+:[ 	]+3a302573[ 	]+csrr[ 	]+a0,0x3a3
+[ 	]+[0-9a-f]+:[ 	]+3b002573[ 	]+csrr[ 	]+a0,0x3b0
+[ 	]+[0-9a-f]+:[ 	]+3b102573[ 	]+csrr[ 	]+a0,0x3b1
+[ 	]+[0-9a-f]+:[ 	]+3b202573[ 	]+csrr[ 	]+a0,0x3b2
+[ 	]+[0-9a-f]+:[ 	]+3b302573[ 	]+csrr[ 	]+a0,0x3b3
+[ 	]+[0-9a-f]+:[ 	]+3b402573[ 	]+csrr[ 	]+a0,0x3b4
+[ 	]+[0-9a-f]+:[ 	]+3b502573[ 	]+csrr[ 	]+a0,0x3b5
+[ 	]+[0-9a-f]+:[ 	]+3b602573[ 	]+csrr[ 	]+a0,0x3b6
+[ 	]+[0-9a-f]+:[ 	]+3b702573[ 	]+csrr[ 	]+a0,0x3b7
+[ 	]+[0-9a-f]+:[ 	]+3b802573[ 	]+csrr[ 	]+a0,0x3b8
+[ 	]+[0-9a-f]+:[ 	]+3b902573[ 	]+csrr[ 	]+a0,0x3b9
+[ 	]+[0-9a-f]+:[ 	]+3ba02573[ 	]+csrr[ 	]+a0,0x3ba
+[ 	]+[0-9a-f]+:[ 	]+3bb02573[ 	]+csrr[ 	]+a0,0x3bb
+[ 	]+[0-9a-f]+:[ 	]+3bc02573[ 	]+csrr[ 	]+a0,0x3bc
+[ 	]+[0-9a-f]+:[ 	]+3bd02573[ 	]+csrr[ 	]+a0,0x3bd
+[ 	]+[0-9a-f]+:[ 	]+3be02573[ 	]+csrr[ 	]+a0,0x3be
+[ 	]+[0-9a-f]+:[ 	]+3bf02573[ 	]+csrr[ 	]+a0,0x3bf
+[ 	]+[0-9a-f]+:[ 	]+b0002573[ 	]+csrr[ 	]+a0,mcycle
+[ 	]+[0-9a-f]+:[ 	]+b0202573[ 	]+csrr[ 	]+a0,minstret
+[ 	]+[0-9a-f]+:[ 	]+b0302573[ 	]+csrr[ 	]+a0,mhpmcounter3
+[ 	]+[0-9a-f]+:[ 	]+b0402573[ 	]+csrr[ 	]+a0,mhpmcounter4
+[ 	]+[0-9a-f]+:[ 	]+b0502573[ 	]+csrr[ 	]+a0,mhpmcounter5
+[ 	]+[0-9a-f]+:[ 	]+b0602573[ 	]+csrr[ 	]+a0,mhpmcounter6
+[ 	]+[0-9a-f]+:[ 	]+b0702573[ 	]+csrr[ 	]+a0,mhpmcounter7
+[ 	]+[0-9a-f]+:[ 	]+b0802573[ 	]+csrr[ 	]+a0,mhpmcounter8
+[ 	]+[0-9a-f]+:[ 	]+b0902573[ 	]+csrr[ 	]+a0,mhpmcounter9
+[ 	]+[0-9a-f]+:[ 	]+b0a02573[ 	]+csrr[ 	]+a0,mhpmcounter10
+[ 	]+[0-9a-f]+:[ 	]+b0b02573[ 	]+csrr[ 	]+a0,mhpmcounter11
+[ 	]+[0-9a-f]+:[ 	]+b0c02573[ 	]+csrr[ 	]+a0,mhpmcounter12
+[ 	]+[0-9a-f]+:[ 	]+b0d02573[ 	]+csrr[ 	]+a0,mhpmcounter13
+[ 	]+[0-9a-f]+:[ 	]+b0e02573[ 	]+csrr[ 	]+a0,mhpmcounter14
+[ 	]+[0-9a-f]+:[ 	]+b0f02573[ 	]+csrr[ 	]+a0,mhpmcounter15
+[ 	]+[0-9a-f]+:[ 	]+b1002573[ 	]+csrr[ 	]+a0,mhpmcounter16
+[ 	]+[0-9a-f]+:[ 	]+b1102573[ 	]+csrr[ 	]+a0,mhpmcounter17
+[ 	]+[0-9a-f]+:[ 	]+b1202573[ 	]+csrr[ 	]+a0,mhpmcounter18
+[ 	]+[0-9a-f]+:[ 	]+b1302573[ 	]+csrr[ 	]+a0,mhpmcounter19
+[ 	]+[0-9a-f]+:[ 	]+b1402573[ 	]+csrr[ 	]+a0,mhpmcounter20
+[ 	]+[0-9a-f]+:[ 	]+b1502573[ 	]+csrr[ 	]+a0,mhpmcounter21
+[ 	]+[0-9a-f]+:[ 	]+b1602573[ 	]+csrr[ 	]+a0,mhpmcounter22
+[ 	]+[0-9a-f]+:[ 	]+b1702573[ 	]+csrr[ 	]+a0,mhpmcounter23
+[ 	]+[0-9a-f]+:[ 	]+b1802573[ 	]+csrr[ 	]+a0,mhpmcounter24
+[ 	]+[0-9a-f]+:[ 	]+b1902573[ 	]+csrr[ 	]+a0,mhpmcounter25
+[ 	]+[0-9a-f]+:[ 	]+b1a02573[ 	]+csrr[ 	]+a0,mhpmcounter26
+[ 	]+[0-9a-f]+:[ 	]+b1b02573[ 	]+csrr[ 	]+a0,mhpmcounter27
+[ 	]+[0-9a-f]+:[ 	]+b1c02573[ 	]+csrr[ 	]+a0,mhpmcounter28
+[ 	]+[0-9a-f]+:[ 	]+b1d02573[ 	]+csrr[ 	]+a0,mhpmcounter29
+[ 	]+[0-9a-f]+:[ 	]+b1e02573[ 	]+csrr[ 	]+a0,mhpmcounter30
+[ 	]+[0-9a-f]+:[ 	]+b1f02573[ 	]+csrr[ 	]+a0,mhpmcounter31
+[ 	]+[0-9a-f]+:[ 	]+b8002573[ 	]+csrr[ 	]+a0,mcycleh
+[ 	]+[0-9a-f]+:[ 	]+b8202573[ 	]+csrr[ 	]+a0,minstreth
+[ 	]+[0-9a-f]+:[ 	]+b8302573[ 	]+csrr[ 	]+a0,mhpmcounter3h
+[ 	]+[0-9a-f]+:[ 	]+b8402573[ 	]+csrr[ 	]+a0,mhpmcounter4h
+[ 	]+[0-9a-f]+:[ 	]+b8502573[ 	]+csrr[ 	]+a0,mhpmcounter5h
+[ 	]+[0-9a-f]+:[ 	]+b8602573[ 	]+csrr[ 	]+a0,mhpmcounter6h
+[ 	]+[0-9a-f]+:[ 	]+b8702573[ 	]+csrr[ 	]+a0,mhpmcounter7h
+[ 	]+[0-9a-f]+:[ 	]+b8802573[ 	]+csrr[ 	]+a0,mhpmcounter8h
+[ 	]+[0-9a-f]+:[ 	]+b8902573[ 	]+csrr[ 	]+a0,mhpmcounter9h
+[ 	]+[0-9a-f]+:[ 	]+b8a02573[ 	]+csrr[ 	]+a0,mhpmcounter10h
+[ 	]+[0-9a-f]+:[ 	]+b8b02573[ 	]+csrr[ 	]+a0,mhpmcounter11h
+[ 	]+[0-9a-f]+:[ 	]+b8c02573[ 	]+csrr[ 	]+a0,mhpmcounter12h
+[ 	]+[0-9a-f]+:[ 	]+b8d02573[ 	]+csrr[ 	]+a0,mhpmcounter13h
+[ 	]+[0-9a-f]+:[ 	]+b8e02573[ 	]+csrr[ 	]+a0,mhpmcounter14h
+[ 	]+[0-9a-f]+:[ 	]+b8f02573[ 	]+csrr[ 	]+a0,mhpmcounter15h
+[ 	]+[0-9a-f]+:[ 	]+b9002573[ 	]+csrr[ 	]+a0,mhpmcounter16h
+[ 	]+[0-9a-f]+:[ 	]+b9102573[ 	]+csrr[ 	]+a0,mhpmcounter17h
+[ 	]+[0-9a-f]+:[ 	]+b9202573[ 	]+csrr[ 	]+a0,mhpmcounter18h
+[ 	]+[0-9a-f]+:[ 	]+b9302573[ 	]+csrr[ 	]+a0,mhpmcounter19h
+[ 	]+[0-9a-f]+:[ 	]+b9402573[ 	]+csrr[ 	]+a0,mhpmcounter20h
+[ 	]+[0-9a-f]+:[ 	]+b9502573[ 	]+csrr[ 	]+a0,mhpmcounter21h
+[ 	]+[0-9a-f]+:[ 	]+b9602573[ 	]+csrr[ 	]+a0,mhpmcounter22h
+[ 	]+[0-9a-f]+:[ 	]+b9702573[ 	]+csrr[ 	]+a0,mhpmcounter23h
+[ 	]+[0-9a-f]+:[ 	]+b9802573[ 	]+csrr[ 	]+a0,mhpmcounter24h
+[ 	]+[0-9a-f]+:[ 	]+b9902573[ 	]+csrr[ 	]+a0,mhpmcounter25h
+[ 	]+[0-9a-f]+:[ 	]+b9a02573[ 	]+csrr[ 	]+a0,mhpmcounter26h
+[ 	]+[0-9a-f]+:[ 	]+b9b02573[ 	]+csrr[ 	]+a0,mhpmcounter27h
+[ 	]+[0-9a-f]+:[ 	]+b9c02573[ 	]+csrr[ 	]+a0,mhpmcounter28h
+[ 	]+[0-9a-f]+:[ 	]+b9d02573[ 	]+csrr[ 	]+a0,mhpmcounter29h
+[ 	]+[0-9a-f]+:[ 	]+b9e02573[ 	]+csrr[ 	]+a0,mhpmcounter30h
+[ 	]+[0-9a-f]+:[ 	]+b9f02573[ 	]+csrr[ 	]+a0,mhpmcounter31h
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mucounteren
+[ 	]+[0-9a-f]+:[ 	]+32302573[ 	]+csrr[ 	]+a0,mhpmevent3
+[ 	]+[0-9a-f]+:[ 	]+32402573[ 	]+csrr[ 	]+a0,mhpmevent4
+[ 	]+[0-9a-f]+:[ 	]+32502573[ 	]+csrr[ 	]+a0,mhpmevent5
+[ 	]+[0-9a-f]+:[ 	]+32602573[ 	]+csrr[ 	]+a0,mhpmevent6
+[ 	]+[0-9a-f]+:[ 	]+32702573[ 	]+csrr[ 	]+a0,mhpmevent7
+[ 	]+[0-9a-f]+:[ 	]+32802573[ 	]+csrr[ 	]+a0,mhpmevent8
+[ 	]+[0-9a-f]+:[ 	]+32902573[ 	]+csrr[ 	]+a0,mhpmevent9
+[ 	]+[0-9a-f]+:[ 	]+32a02573[ 	]+csrr[ 	]+a0,mhpmevent10
+[ 	]+[0-9a-f]+:[ 	]+32b02573[ 	]+csrr[ 	]+a0,mhpmevent11
+[ 	]+[0-9a-f]+:[ 	]+32c02573[ 	]+csrr[ 	]+a0,mhpmevent12
+[ 	]+[0-9a-f]+:[ 	]+32d02573[ 	]+csrr[ 	]+a0,mhpmevent13
+[ 	]+[0-9a-f]+:[ 	]+32e02573[ 	]+csrr[ 	]+a0,mhpmevent14
+[ 	]+[0-9a-f]+:[ 	]+32f02573[ 	]+csrr[ 	]+a0,mhpmevent15
+[ 	]+[0-9a-f]+:[ 	]+33002573[ 	]+csrr[ 	]+a0,mhpmevent16
+[ 	]+[0-9a-f]+:[ 	]+33102573[ 	]+csrr[ 	]+a0,mhpmevent17
+[ 	]+[0-9a-f]+:[ 	]+33202573[ 	]+csrr[ 	]+a0,mhpmevent18
+[ 	]+[0-9a-f]+:[ 	]+33302573[ 	]+csrr[ 	]+a0,mhpmevent19
+[ 	]+[0-9a-f]+:[ 	]+33402573[ 	]+csrr[ 	]+a0,mhpmevent20
+[ 	]+[0-9a-f]+:[ 	]+33502573[ 	]+csrr[ 	]+a0,mhpmevent21
+[ 	]+[0-9a-f]+:[ 	]+33602573[ 	]+csrr[ 	]+a0,mhpmevent22
+[ 	]+[0-9a-f]+:[ 	]+33702573[ 	]+csrr[ 	]+a0,mhpmevent23
+[ 	]+[0-9a-f]+:[ 	]+33802573[ 	]+csrr[ 	]+a0,mhpmevent24
+[ 	]+[0-9a-f]+:[ 	]+33902573[ 	]+csrr[ 	]+a0,mhpmevent25
+[ 	]+[0-9a-f]+:[ 	]+33a02573[ 	]+csrr[ 	]+a0,mhpmevent26
+[ 	]+[0-9a-f]+:[ 	]+33b02573[ 	]+csrr[ 	]+a0,mhpmevent27
+[ 	]+[0-9a-f]+:[ 	]+33c02573[ 	]+csrr[ 	]+a0,mhpmevent28
+[ 	]+[0-9a-f]+:[ 	]+33d02573[ 	]+csrr[ 	]+a0,mhpmevent29
+[ 	]+[0-9a-f]+:[ 	]+33e02573[ 	]+csrr[ 	]+a0,mhpmevent30
+[ 	]+[0-9a-f]+:[ 	]+33f02573[ 	]+csrr[ 	]+a0,mhpmevent31
+[ 	]+[0-9a-f]+:[ 	]+7a002573[ 	]+csrr[ 	]+a0,tselect
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a202573[ 	]+csrr[ 	]+a0,tdata2
+[ 	]+[0-9a-f]+:[ 	]+7a302573[ 	]+csrr[ 	]+a0,tdata3
+[ 	]+[0-9a-f]+:[ 	]+7b002573[ 	]+csrr[ 	]+a0,dcsr
+[ 	]+[0-9a-f]+:[ 	]+7b102573[ 	]+csrr[ 	]+a0,dpc
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch
+[ 	]+[0-9a-f]+:[ 	]+7b302573[ 	]+csrr[ 	]+a0,0x7b3
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
+[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,sbadaddr
+[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,sptbr
+[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mbadaddr
+[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mucounteren
+[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch
+[ 	]+[0-9a-f]+:[ 	]+20002573[ 	]+csrr[ 	]+a0,hstatus
+[ 	]+[0-9a-f]+:[ 	]+20202573[ 	]+csrr[ 	]+a0,hedeleg
+[ 	]+[0-9a-f]+:[ 	]+20302573[ 	]+csrr[ 	]+a0,hideleg
+[ 	]+[0-9a-f]+:[ 	]+20402573[ 	]+csrr[ 	]+a0,hie
+[ 	]+[0-9a-f]+:[ 	]+20502573[ 	]+csrr[ 	]+a0,htvec
+[ 	]+[0-9a-f]+:[ 	]+24002573[ 	]+csrr[ 	]+a0,hscratch
+[ 	]+[0-9a-f]+:[ 	]+24102573[ 	]+csrr[ 	]+a0,hepc
+[ 	]+[0-9a-f]+:[ 	]+24202573[ 	]+csrr[ 	]+a0,hcause
+[ 	]+[0-9a-f]+:[ 	]+24302573[ 	]+csrr[ 	]+a0,hbadaddr
+[ 	]+[0-9a-f]+:[ 	]+24402573[ 	]+csrr[ 	]+a0,hip
+[ 	]+[0-9a-f]+:[ 	]+38002573[ 	]+csrr[ 	]+a0,mbase
+[ 	]+[0-9a-f]+:[ 	]+38102573[ 	]+csrr[ 	]+a0,mbound
+[ 	]+[0-9a-f]+:[ 	]+38202573[ 	]+csrr[ 	]+a0,mibase
+[ 	]+[0-9a-f]+:[ 	]+38302573[ 	]+csrr[ 	]+a0,mibound
+[ 	]+[0-9a-f]+:[ 	]+38402573[ 	]+csrr[ 	]+a0,mdbase
+[ 	]+[0-9a-f]+:[ 	]+38502573[ 	]+csrr[ 	]+a0,mdbound
+[ 	]+[0-9a-f]+:[ 	]+32102573[ 	]+csrr[ 	]+a0,mscounteren
+[ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,mhcounteren
diff --git a/gas/testsuite/gas/riscv/priv-reg.d b/gas/testsuite/gas/riscv/priv-reg.d
deleted file mode 100644
index 8fc41d2..0000000
--- a/gas/testsuite/gas/riscv/priv-reg.d
+++ /dev/null
@@ -1,256 +0,0 @@
-#as: -march=rv32if
-#objdump: -dr
-
-.*:[ 	]+file format .*
-
-
-Disassembly of section .text:
-
-0+000 <.text>:
-[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
-[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
-[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
-[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
-[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
-[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
-[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
-[ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+frflags[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+frrm[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+00302573[ 	]+frcsr[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c0202573[ 	]+rdinstret[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c0302573[ 	]+csrr[ 	]+a0,hpmcounter3
-[ 	]+[0-9a-f]+:[ 	]+c0402573[ 	]+csrr[ 	]+a0,hpmcounter4
-[ 	]+[0-9a-f]+:[ 	]+c0502573[ 	]+csrr[ 	]+a0,hpmcounter5
-[ 	]+[0-9a-f]+:[ 	]+c0602573[ 	]+csrr[ 	]+a0,hpmcounter6
-[ 	]+[0-9a-f]+:[ 	]+c0702573[ 	]+csrr[ 	]+a0,hpmcounter7
-[ 	]+[0-9a-f]+:[ 	]+c0802573[ 	]+csrr[ 	]+a0,hpmcounter8
-[ 	]+[0-9a-f]+:[ 	]+c0902573[ 	]+csrr[ 	]+a0,hpmcounter9
-[ 	]+[0-9a-f]+:[ 	]+c0a02573[ 	]+csrr[ 	]+a0,hpmcounter10
-[ 	]+[0-9a-f]+:[ 	]+c0b02573[ 	]+csrr[ 	]+a0,hpmcounter11
-[ 	]+[0-9a-f]+:[ 	]+c0c02573[ 	]+csrr[ 	]+a0,hpmcounter12
-[ 	]+[0-9a-f]+:[ 	]+c0d02573[ 	]+csrr[ 	]+a0,hpmcounter13
-[ 	]+[0-9a-f]+:[ 	]+c0e02573[ 	]+csrr[ 	]+a0,hpmcounter14
-[ 	]+[0-9a-f]+:[ 	]+c0f02573[ 	]+csrr[ 	]+a0,hpmcounter15
-[ 	]+[0-9a-f]+:[ 	]+c1002573[ 	]+csrr[ 	]+a0,hpmcounter16
-[ 	]+[0-9a-f]+:[ 	]+c1102573[ 	]+csrr[ 	]+a0,hpmcounter17
-[ 	]+[0-9a-f]+:[ 	]+c1202573[ 	]+csrr[ 	]+a0,hpmcounter18
-[ 	]+[0-9a-f]+:[ 	]+c1302573[ 	]+csrr[ 	]+a0,hpmcounter19
-[ 	]+[0-9a-f]+:[ 	]+c1402573[ 	]+csrr[ 	]+a0,hpmcounter20
-[ 	]+[0-9a-f]+:[ 	]+c1502573[ 	]+csrr[ 	]+a0,hpmcounter21
-[ 	]+[0-9a-f]+:[ 	]+c1602573[ 	]+csrr[ 	]+a0,hpmcounter22
-[ 	]+[0-9a-f]+:[ 	]+c1702573[ 	]+csrr[ 	]+a0,hpmcounter23
-[ 	]+[0-9a-f]+:[ 	]+c1802573[ 	]+csrr[ 	]+a0,hpmcounter24
-[ 	]+[0-9a-f]+:[ 	]+c1902573[ 	]+csrr[ 	]+a0,hpmcounter25
-[ 	]+[0-9a-f]+:[ 	]+c1a02573[ 	]+csrr[ 	]+a0,hpmcounter26
-[ 	]+[0-9a-f]+:[ 	]+c1b02573[ 	]+csrr[ 	]+a0,hpmcounter27
-[ 	]+[0-9a-f]+:[ 	]+c1c02573[ 	]+csrr[ 	]+a0,hpmcounter28
-[ 	]+[0-9a-f]+:[ 	]+c1d02573[ 	]+csrr[ 	]+a0,hpmcounter29
-[ 	]+[0-9a-f]+:[ 	]+c1e02573[ 	]+csrr[ 	]+a0,hpmcounter30
-[ 	]+[0-9a-f]+:[ 	]+c1f02573[ 	]+csrr[ 	]+a0,hpmcounter31
-[ 	]+[0-9a-f]+:[ 	]+c8002573[ 	]+rdcycleh[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c8102573[ 	]+rdtimeh[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c8202573[ 	]+rdinstreth[ 	]+a0
-[ 	]+[0-9a-f]+:[ 	]+c8302573[ 	]+csrr[ 	]+a0,hpmcounter3h
-[ 	]+[0-9a-f]+:[ 	]+c8402573[ 	]+csrr[ 	]+a0,hpmcounter4h
-[ 	]+[0-9a-f]+:[ 	]+c8502573[ 	]+csrr[ 	]+a0,hpmcounter5h
-[ 	]+[0-9a-f]+:[ 	]+c8602573[ 	]+csrr[ 	]+a0,hpmcounter6h
-[ 	]+[0-9a-f]+:[ 	]+c8702573[ 	]+csrr[ 	]+a0,hpmcounter7h
-[ 	]+[0-9a-f]+:[ 	]+c8802573[ 	]+csrr[ 	]+a0,hpmcounter8h
-[ 	]+[0-9a-f]+:[ 	]+c8902573[ 	]+csrr[ 	]+a0,hpmcounter9h
-[ 	]+[0-9a-f]+:[ 	]+c8a02573[ 	]+csrr[ 	]+a0,hpmcounter10h
-[ 	]+[0-9a-f]+:[ 	]+c8b02573[ 	]+csrr[ 	]+a0,hpmcounter11h
-[ 	]+[0-9a-f]+:[ 	]+c8c02573[ 	]+csrr[ 	]+a0,hpmcounter12h
-[ 	]+[0-9a-f]+:[ 	]+c8d02573[ 	]+csrr[ 	]+a0,hpmcounter13h
-[ 	]+[0-9a-f]+:[ 	]+c8e02573[ 	]+csrr[ 	]+a0,hpmcounter14h
-[ 	]+[0-9a-f]+:[ 	]+c8f02573[ 	]+csrr[ 	]+a0,hpmcounter15h
-[ 	]+[0-9a-f]+:[ 	]+c9002573[ 	]+csrr[ 	]+a0,hpmcounter16h
-[ 	]+[0-9a-f]+:[ 	]+c9102573[ 	]+csrr[ 	]+a0,hpmcounter17h
-[ 	]+[0-9a-f]+:[ 	]+c9202573[ 	]+csrr[ 	]+a0,hpmcounter18h
-[ 	]+[0-9a-f]+:[ 	]+c9302573[ 	]+csrr[ 	]+a0,hpmcounter19h
-[ 	]+[0-9a-f]+:[ 	]+c9402573[ 	]+csrr[ 	]+a0,hpmcounter20h
-[ 	]+[0-9a-f]+:[ 	]+c9502573[ 	]+csrr[ 	]+a0,hpmcounter21h
-[ 	]+[0-9a-f]+:[ 	]+c9602573[ 	]+csrr[ 	]+a0,hpmcounter22h
-[ 	]+[0-9a-f]+:[ 	]+c9702573[ 	]+csrr[ 	]+a0,hpmcounter23h
-[ 	]+[0-9a-f]+:[ 	]+c9802573[ 	]+csrr[ 	]+a0,hpmcounter24h
-[ 	]+[0-9a-f]+:[ 	]+c9902573[ 	]+csrr[ 	]+a0,hpmcounter25h
-[ 	]+[0-9a-f]+:[ 	]+c9a02573[ 	]+csrr[ 	]+a0,hpmcounter26h
-[ 	]+[0-9a-f]+:[ 	]+c9b02573[ 	]+csrr[ 	]+a0,hpmcounter27h
-[ 	]+[0-9a-f]+:[ 	]+c9c02573[ 	]+csrr[ 	]+a0,hpmcounter28h
-[ 	]+[0-9a-f]+:[ 	]+c9d02573[ 	]+csrr[ 	]+a0,hpmcounter29h
-[ 	]+[0-9a-f]+:[ 	]+c9e02573[ 	]+csrr[ 	]+a0,hpmcounter30h
-[ 	]+[0-9a-f]+:[ 	]+c9f02573[ 	]+csrr[ 	]+a0,hpmcounter31h
-[ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
-[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
-[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
-[ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
-[ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
-[ 	]+[0-9a-f]+:[ 	]+10602573[ 	]+csrr[ 	]+a0,scounteren
-[ 	]+[0-9a-f]+:[ 	]+14002573[ 	]+csrr[ 	]+a0,sscratch
-[ 	]+[0-9a-f]+:[ 	]+14102573[ 	]+csrr[ 	]+a0,sepc
-[ 	]+[0-9a-f]+:[ 	]+14202573[ 	]+csrr[ 	]+a0,scause
-[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
-[ 	]+[0-9a-f]+:[ 	]+14402573[ 	]+csrr[ 	]+a0,sip
-[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
-[ 	]+[0-9a-f]+:[ 	]+f1102573[ 	]+csrr[ 	]+a0,mvendorid
-[ 	]+[0-9a-f]+:[ 	]+f1202573[ 	]+csrr[ 	]+a0,marchid
-[ 	]+[0-9a-f]+:[ 	]+f1302573[ 	]+csrr[ 	]+a0,mimpid
-[ 	]+[0-9a-f]+:[ 	]+f1402573[ 	]+csrr[ 	]+a0,mhartid
-[ 	]+[0-9a-f]+:[ 	]+30002573[ 	]+csrr[ 	]+a0,mstatus
-[ 	]+[0-9a-f]+:[ 	]+30102573[ 	]+csrr[ 	]+a0,misa
-[ 	]+[0-9a-f]+:[ 	]+30202573[ 	]+csrr[ 	]+a0,medeleg
-[ 	]+[0-9a-f]+:[ 	]+30302573[ 	]+csrr[ 	]+a0,mideleg
-[ 	]+[0-9a-f]+:[ 	]+30402573[ 	]+csrr[ 	]+a0,mie
-[ 	]+[0-9a-f]+:[ 	]+30502573[ 	]+csrr[ 	]+a0,mtvec
-[ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,mcounteren
-[ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
-[ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
-[ 	]+[0-9a-f]+:[ 	]+34202573[ 	]+csrr[ 	]+a0,mcause
-[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mtval
-[ 	]+[0-9a-f]+:[ 	]+34402573[ 	]+csrr[ 	]+a0,mip
-[ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,pmpcfg0
-[ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,pmpcfg1
-[ 	]+[0-9a-f]+:[ 	]+3a202573[ 	]+csrr[ 	]+a0,pmpcfg2
-[ 	]+[0-9a-f]+:[ 	]+3a302573[ 	]+csrr[ 	]+a0,pmpcfg3
-[ 	]+[0-9a-f]+:[ 	]+3b002573[ 	]+csrr[ 	]+a0,pmpaddr0
-[ 	]+[0-9a-f]+:[ 	]+3b102573[ 	]+csrr[ 	]+a0,pmpaddr1
-[ 	]+[0-9a-f]+:[ 	]+3b202573[ 	]+csrr[ 	]+a0,pmpaddr2
-[ 	]+[0-9a-f]+:[ 	]+3b302573[ 	]+csrr[ 	]+a0,pmpaddr3
-[ 	]+[0-9a-f]+:[ 	]+3b402573[ 	]+csrr[ 	]+a0,pmpaddr4
-[ 	]+[0-9a-f]+:[ 	]+3b502573[ 	]+csrr[ 	]+a0,pmpaddr5
-[ 	]+[0-9a-f]+:[ 	]+3b602573[ 	]+csrr[ 	]+a0,pmpaddr6
-[ 	]+[0-9a-f]+:[ 	]+3b702573[ 	]+csrr[ 	]+a0,pmpaddr7
-[ 	]+[0-9a-f]+:[ 	]+3b802573[ 	]+csrr[ 	]+a0,pmpaddr8
-[ 	]+[0-9a-f]+:[ 	]+3b902573[ 	]+csrr[ 	]+a0,pmpaddr9
-[ 	]+[0-9a-f]+:[ 	]+3ba02573[ 	]+csrr[ 	]+a0,pmpaddr10
-[ 	]+[0-9a-f]+:[ 	]+3bb02573[ 	]+csrr[ 	]+a0,pmpaddr11
-[ 	]+[0-9a-f]+:[ 	]+3bc02573[ 	]+csrr[ 	]+a0,pmpaddr12
-[ 	]+[0-9a-f]+:[ 	]+3bd02573[ 	]+csrr[ 	]+a0,pmpaddr13
-[ 	]+[0-9a-f]+:[ 	]+3be02573[ 	]+csrr[ 	]+a0,pmpaddr14
-[ 	]+[0-9a-f]+:[ 	]+3bf02573[ 	]+csrr[ 	]+a0,pmpaddr15
-[ 	]+[0-9a-f]+:[ 	]+b0002573[ 	]+csrr[ 	]+a0,mcycle
-[ 	]+[0-9a-f]+:[ 	]+b0202573[ 	]+csrr[ 	]+a0,minstret
-[ 	]+[0-9a-f]+:[ 	]+b0302573[ 	]+csrr[ 	]+a0,mhpmcounter3
-[ 	]+[0-9a-f]+:[ 	]+b0402573[ 	]+csrr[ 	]+a0,mhpmcounter4
-[ 	]+[0-9a-f]+:[ 	]+b0502573[ 	]+csrr[ 	]+a0,mhpmcounter5
-[ 	]+[0-9a-f]+:[ 	]+b0602573[ 	]+csrr[ 	]+a0,mhpmcounter6
-[ 	]+[0-9a-f]+:[ 	]+b0702573[ 	]+csrr[ 	]+a0,mhpmcounter7
-[ 	]+[0-9a-f]+:[ 	]+b0802573[ 	]+csrr[ 	]+a0,mhpmcounter8
-[ 	]+[0-9a-f]+:[ 	]+b0902573[ 	]+csrr[ 	]+a0,mhpmcounter9
-[ 	]+[0-9a-f]+:[ 	]+b0a02573[ 	]+csrr[ 	]+a0,mhpmcounter10
-[ 	]+[0-9a-f]+:[ 	]+b0b02573[ 	]+csrr[ 	]+a0,mhpmcounter11
-[ 	]+[0-9a-f]+:[ 	]+b0c02573[ 	]+csrr[ 	]+a0,mhpmcounter12
-[ 	]+[0-9a-f]+:[ 	]+b0d02573[ 	]+csrr[ 	]+a0,mhpmcounter13
-[ 	]+[0-9a-f]+:[ 	]+b0e02573[ 	]+csrr[ 	]+a0,mhpmcounter14
-[ 	]+[0-9a-f]+:[ 	]+b0f02573[ 	]+csrr[ 	]+a0,mhpmcounter15
-[ 	]+[0-9a-f]+:[ 	]+b1002573[ 	]+csrr[ 	]+a0,mhpmcounter16
-[ 	]+[0-9a-f]+:[ 	]+b1102573[ 	]+csrr[ 	]+a0,mhpmcounter17
-[ 	]+[0-9a-f]+:[ 	]+b1202573[ 	]+csrr[ 	]+a0,mhpmcounter18
-[ 	]+[0-9a-f]+:[ 	]+b1302573[ 	]+csrr[ 	]+a0,mhpmcounter19
-[ 	]+[0-9a-f]+:[ 	]+b1402573[ 	]+csrr[ 	]+a0,mhpmcounter20
-[ 	]+[0-9a-f]+:[ 	]+b1502573[ 	]+csrr[ 	]+a0,mhpmcounter21
-[ 	]+[0-9a-f]+:[ 	]+b1602573[ 	]+csrr[ 	]+a0,mhpmcounter22
-[ 	]+[0-9a-f]+:[ 	]+b1702573[ 	]+csrr[ 	]+a0,mhpmcounter23
-[ 	]+[0-9a-f]+:[ 	]+b1802573[ 	]+csrr[ 	]+a0,mhpmcounter24
-[ 	]+[0-9a-f]+:[ 	]+b1902573[ 	]+csrr[ 	]+a0,mhpmcounter25
-[ 	]+[0-9a-f]+:[ 	]+b1a02573[ 	]+csrr[ 	]+a0,mhpmcounter26
-[ 	]+[0-9a-f]+:[ 	]+b1b02573[ 	]+csrr[ 	]+a0,mhpmcounter27
-[ 	]+[0-9a-f]+:[ 	]+b1c02573[ 	]+csrr[ 	]+a0,mhpmcounter28
-[ 	]+[0-9a-f]+:[ 	]+b1d02573[ 	]+csrr[ 	]+a0,mhpmcounter29
-[ 	]+[0-9a-f]+:[ 	]+b1e02573[ 	]+csrr[ 	]+a0,mhpmcounter30
-[ 	]+[0-9a-f]+:[ 	]+b1f02573[ 	]+csrr[ 	]+a0,mhpmcounter31
-[ 	]+[0-9a-f]+:[ 	]+b8002573[ 	]+csrr[ 	]+a0,mcycleh
-[ 	]+[0-9a-f]+:[ 	]+b8202573[ 	]+csrr[ 	]+a0,minstreth
-[ 	]+[0-9a-f]+:[ 	]+b8302573[ 	]+csrr[ 	]+a0,mhpmcounter3h
-[ 	]+[0-9a-f]+:[ 	]+b8402573[ 	]+csrr[ 	]+a0,mhpmcounter4h
-[ 	]+[0-9a-f]+:[ 	]+b8502573[ 	]+csrr[ 	]+a0,mhpmcounter5h
-[ 	]+[0-9a-f]+:[ 	]+b8602573[ 	]+csrr[ 	]+a0,mhpmcounter6h
-[ 	]+[0-9a-f]+:[ 	]+b8702573[ 	]+csrr[ 	]+a0,mhpmcounter7h
-[ 	]+[0-9a-f]+:[ 	]+b8802573[ 	]+csrr[ 	]+a0,mhpmcounter8h
-[ 	]+[0-9a-f]+:[ 	]+b8902573[ 	]+csrr[ 	]+a0,mhpmcounter9h
-[ 	]+[0-9a-f]+:[ 	]+b8a02573[ 	]+csrr[ 	]+a0,mhpmcounter10h
-[ 	]+[0-9a-f]+:[ 	]+b8b02573[ 	]+csrr[ 	]+a0,mhpmcounter11h
-[ 	]+[0-9a-f]+:[ 	]+b8c02573[ 	]+csrr[ 	]+a0,mhpmcounter12h
-[ 	]+[0-9a-f]+:[ 	]+b8d02573[ 	]+csrr[ 	]+a0,mhpmcounter13h
-[ 	]+[0-9a-f]+:[ 	]+b8e02573[ 	]+csrr[ 	]+a0,mhpmcounter14h
-[ 	]+[0-9a-f]+:[ 	]+b8f02573[ 	]+csrr[ 	]+a0,mhpmcounter15h
-[ 	]+[0-9a-f]+:[ 	]+b9002573[ 	]+csrr[ 	]+a0,mhpmcounter16h
-[ 	]+[0-9a-f]+:[ 	]+b9102573[ 	]+csrr[ 	]+a0,mhpmcounter17h
-[ 	]+[0-9a-f]+:[ 	]+b9202573[ 	]+csrr[ 	]+a0,mhpmcounter18h
-[ 	]+[0-9a-f]+:[ 	]+b9302573[ 	]+csrr[ 	]+a0,mhpmcounter19h
-[ 	]+[0-9a-f]+:[ 	]+b9402573[ 	]+csrr[ 	]+a0,mhpmcounter20h
-[ 	]+[0-9a-f]+:[ 	]+b9502573[ 	]+csrr[ 	]+a0,mhpmcounter21h
-[ 	]+[0-9a-f]+:[ 	]+b9602573[ 	]+csrr[ 	]+a0,mhpmcounter22h
-[ 	]+[0-9a-f]+:[ 	]+b9702573[ 	]+csrr[ 	]+a0,mhpmcounter23h
-[ 	]+[0-9a-f]+:[ 	]+b9802573[ 	]+csrr[ 	]+a0,mhpmcounter24h
-[ 	]+[0-9a-f]+:[ 	]+b9902573[ 	]+csrr[ 	]+a0,mhpmcounter25h
-[ 	]+[0-9a-f]+:[ 	]+b9a02573[ 	]+csrr[ 	]+a0,mhpmcounter26h
-[ 	]+[0-9a-f]+:[ 	]+b9b02573[ 	]+csrr[ 	]+a0,mhpmcounter27h
-[ 	]+[0-9a-f]+:[ 	]+b9c02573[ 	]+csrr[ 	]+a0,mhpmcounter28h
-[ 	]+[0-9a-f]+:[ 	]+b9d02573[ 	]+csrr[ 	]+a0,mhpmcounter29h
-[ 	]+[0-9a-f]+:[ 	]+b9e02573[ 	]+csrr[ 	]+a0,mhpmcounter30h
-[ 	]+[0-9a-f]+:[ 	]+b9f02573[ 	]+csrr[ 	]+a0,mhpmcounter31h
-[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mcountinhibit
-[ 	]+[0-9a-f]+:[ 	]+32302573[ 	]+csrr[ 	]+a0,mhpmevent3
-[ 	]+[0-9a-f]+:[ 	]+32402573[ 	]+csrr[ 	]+a0,mhpmevent4
-[ 	]+[0-9a-f]+:[ 	]+32502573[ 	]+csrr[ 	]+a0,mhpmevent5
-[ 	]+[0-9a-f]+:[ 	]+32602573[ 	]+csrr[ 	]+a0,mhpmevent6
-[ 	]+[0-9a-f]+:[ 	]+32702573[ 	]+csrr[ 	]+a0,mhpmevent7
-[ 	]+[0-9a-f]+:[ 	]+32802573[ 	]+csrr[ 	]+a0,mhpmevent8
-[ 	]+[0-9a-f]+:[ 	]+32902573[ 	]+csrr[ 	]+a0,mhpmevent9
-[ 	]+[0-9a-f]+:[ 	]+32a02573[ 	]+csrr[ 	]+a0,mhpmevent10
-[ 	]+[0-9a-f]+:[ 	]+32b02573[ 	]+csrr[ 	]+a0,mhpmevent11
-[ 	]+[0-9a-f]+:[ 	]+32c02573[ 	]+csrr[ 	]+a0,mhpmevent12
-[ 	]+[0-9a-f]+:[ 	]+32d02573[ 	]+csrr[ 	]+a0,mhpmevent13
-[ 	]+[0-9a-f]+:[ 	]+32e02573[ 	]+csrr[ 	]+a0,mhpmevent14
-[ 	]+[0-9a-f]+:[ 	]+32f02573[ 	]+csrr[ 	]+a0,mhpmevent15
-[ 	]+[0-9a-f]+:[ 	]+33002573[ 	]+csrr[ 	]+a0,mhpmevent16
-[ 	]+[0-9a-f]+:[ 	]+33102573[ 	]+csrr[ 	]+a0,mhpmevent17
-[ 	]+[0-9a-f]+:[ 	]+33202573[ 	]+csrr[ 	]+a0,mhpmevent18
-[ 	]+[0-9a-f]+:[ 	]+33302573[ 	]+csrr[ 	]+a0,mhpmevent19
-[ 	]+[0-9a-f]+:[ 	]+33402573[ 	]+csrr[ 	]+a0,mhpmevent20
-[ 	]+[0-9a-f]+:[ 	]+33502573[ 	]+csrr[ 	]+a0,mhpmevent21
-[ 	]+[0-9a-f]+:[ 	]+33602573[ 	]+csrr[ 	]+a0,mhpmevent22
-[ 	]+[0-9a-f]+:[ 	]+33702573[ 	]+csrr[ 	]+a0,mhpmevent23
-[ 	]+[0-9a-f]+:[ 	]+33802573[ 	]+csrr[ 	]+a0,mhpmevent24
-[ 	]+[0-9a-f]+:[ 	]+33902573[ 	]+csrr[ 	]+a0,mhpmevent25
-[ 	]+[0-9a-f]+:[ 	]+33a02573[ 	]+csrr[ 	]+a0,mhpmevent26
-[ 	]+[0-9a-f]+:[ 	]+33b02573[ 	]+csrr[ 	]+a0,mhpmevent27
-[ 	]+[0-9a-f]+:[ 	]+33c02573[ 	]+csrr[ 	]+a0,mhpmevent28
-[ 	]+[0-9a-f]+:[ 	]+33d02573[ 	]+csrr[ 	]+a0,mhpmevent29
-[ 	]+[0-9a-f]+:[ 	]+33e02573[ 	]+csrr[ 	]+a0,mhpmevent30
-[ 	]+[0-9a-f]+:[ 	]+33f02573[ 	]+csrr[ 	]+a0,mhpmevent31
-[ 	]+[0-9a-f]+:[ 	]+7a002573[ 	]+csrr[ 	]+a0,tselect
-[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
-[ 	]+[0-9a-f]+:[ 	]+7a202573[ 	]+csrr[ 	]+a0,tdata2
-[ 	]+[0-9a-f]+:[ 	]+7a302573[ 	]+csrr[ 	]+a0,tdata3
-[ 	]+[0-9a-f]+:[ 	]+7b002573[ 	]+csrr[ 	]+a0,dcsr
-[ 	]+[0-9a-f]+:[ 	]+7b102573[ 	]+csrr[ 	]+a0,dpc
-[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch0
-[ 	]+[0-9a-f]+:[ 	]+7b302573[ 	]+csrr[ 	]+a0,dscratch1
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
-[ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
-[ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
-[ 	]+[0-9a-f]+:[ 	]+34302573[ 	]+csrr[ 	]+a0,mtval
-[ 	]+[0-9a-f]+:[ 	]+32002573[ 	]+csrr[ 	]+a0,mcountinhibit
-[ 	]+[0-9a-f]+:[ 	]+7b202573[ 	]+csrr[ 	]+a0,dscratch0
-[ 	]+[0-9a-f]+:[ 	]+20002573[ 	]+csrr[ 	]+a0,hstatus
-[ 	]+[0-9a-f]+:[ 	]+20202573[ 	]+csrr[ 	]+a0,hedeleg
-[ 	]+[0-9a-f]+:[ 	]+20302573[ 	]+csrr[ 	]+a0,hideleg
-[ 	]+[0-9a-f]+:[ 	]+20402573[ 	]+csrr[ 	]+a0,hie
-[ 	]+[0-9a-f]+:[ 	]+20502573[ 	]+csrr[ 	]+a0,htvec
-[ 	]+[0-9a-f]+:[ 	]+24002573[ 	]+csrr[ 	]+a0,hscratch
-[ 	]+[0-9a-f]+:[ 	]+24102573[ 	]+csrr[ 	]+a0,hepc
-[ 	]+[0-9a-f]+:[ 	]+24202573[ 	]+csrr[ 	]+a0,hcause
-[ 	]+[0-9a-f]+:[ 	]+24302573[ 	]+csrr[ 	]+a0,hbadaddr
-[ 	]+[0-9a-f]+:[ 	]+24402573[ 	]+csrr[ 	]+a0,hip
-[ 	]+[0-9a-f]+:[ 	]+38002573[ 	]+csrr[ 	]+a0,mbase
-[ 	]+[0-9a-f]+:[ 	]+38102573[ 	]+csrr[ 	]+a0,mbound
-[ 	]+[0-9a-f]+:[ 	]+38202573[ 	]+csrr[ 	]+a0,mibase
-[ 	]+[0-9a-f]+:[ 	]+38302573[ 	]+csrr[ 	]+a0,mibound
-[ 	]+[0-9a-f]+:[ 	]+38402573[ 	]+csrr[ 	]+a0,mdbase
-[ 	]+[0-9a-f]+:[ 	]+38502573[ 	]+csrr[ 	]+a0,mdbound
-[ 	]+[0-9a-f]+:[ 	]+32102573[ 	]+csrr[ 	]+a0,mscounteren
-[ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,mhcounteren
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index c36bf69..0f263ab 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -446,6 +446,8 @@ extern const struct riscv_opcode riscv_opcodes[];
 extern const struct riscv_opcode riscv_insn_types[];
 extern const struct riscv_ext_version riscv_ext_version_table[];
 
+extern enum riscv_csr_vclass default_priv_spec;
+
 extern bfd_boolean
 riscv_get_priv_version_class (const char *, enum riscv_csr_vclass *);
 extern const char *
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 98302ff..38ae8ac 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -52,8 +52,8 @@ set_default_riscv_dis_options (void)
   no_aliases = 0;
 }
 
-static void
-parse_riscv_dis_option (const char *option)
+static bfd_boolean
+parse_riscv_dis_option_without_args (const char *option)
 {
   if (strcmp (option, "no-aliases") == 0)
     no_aliases = 1;
@@ -63,6 +63,44 @@ parse_riscv_dis_option (const char *option)
       riscv_fpr_names = riscv_fpr_names_numeric;
     }
   else
+    return FALSE;
+  return TRUE;
+}
+
+static void
+parse_riscv_dis_option (const char *option)
+{
+  char *equal, *value;
+
+  if (parse_riscv_dis_option_without_args (option))
+    return;
+
+  equal = strchr (option, '=');
+  if (equal == NULL)
+    {
+      /* The option without '=' should be defined above.  */
+      opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
+      return;
+    }
+  if (equal == option
+      || *(equal + 1) == '\0')
+    {
+      /* Invalid options with '=', no option name before '=',
+        and no value after '='.  */
+      opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
+			     option);
+      return;
+    }
+
+  *equal = '\0';
+  value = equal + 1;
+  if (strcmp (option, "priv-spec") == 0)
+    {
+      if (!riscv_get_priv_version_class (value, &default_priv_spec))
+	opcodes_error_handler (_("unsupported privilege version set by %s=%s"),
+			       option, value);
+    }
+  else
     {
       /* xgettext:c-format */
       opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
@@ -322,17 +360,32 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
 
 	case 'E':
 	  {
-	    const char* csr_name = NULL;
+	    static const char *riscv_csr_hash[4096];	/* Total 2^12 CSR */
+	    static bfd_boolean init_csr = FALSE;
 	    unsigned int csr = EXTRACT_OPERAND (CSR, l);
-	    switch (csr)
+
+	    if (!init_csr)
 	      {
+		unsigned int i;
+		for (i = 0; i < 4096; i++)
+		  riscv_csr_hash[i] = NULL;
+
+		/* Set to the newest privilege version.  */
+		if (default_priv_spec == CSR_CLASS_VNONE)
+		  default_priv_spec = CSR_CLASS_VDRAFT - 1;
+
 #define DECLARE_CSR(name, num, class, define_version, abort_version) \
-  case num: csr_name = #name; break;
+  if (default_priv_spec >= define_version \
+      && default_priv_spec < abort_version) \
+    riscv_csr_hash[num] = #name;
+#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
+  DECLARE_CSR(name, num, class, define_version, abort_version)
 #include "opcode/riscv-opc.h"
 #undef DECLARE_CSR
 	      }
-	    if (csr_name)
-	      print (info->stream, "%s", csr_name);
+
+	    if (riscv_csr_hash[csr] != NULL)
+	      print (info->stream, "%s", riscv_csr_hash[csr]);
 	    else
 	      print (info->stream, "0x%x", csr);
 	    break;
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index cfefd8e..ad568bb 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -938,6 +938,8 @@ const struct riscv_ext_version riscv_ext_version_table[] =
 {NULL, NULL, 0, 0}
 };
 
+enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
+
 struct priv_version_t
 {
   const char *name;
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options.
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
                   ` (5 preceding siblings ...)
  2020-04-18 11:07 ` [PATCH 6/7] RISC-V: Disassembler dumps the CSR according to the chosen privilege spec Nelson Chu
@ 2020-04-18 11:07 ` Nelson Chu
  2020-04-18 11:19   ` Nelson Chu
  2020-04-18 11:17 ` [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
  2020-04-30 16:10 ` Kito Cheng
  8 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:07 UTC (permalink / raw)
  To: binutils, gdb-patches
  Cc: andrew.burgess, andrew, asb, kito.cheng, maxim.blinov, jimw

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y\b\b, Size: 4953 bytes --]

	gas/
	* config/tc-riscv.c (md_show_usage): Add descriptions about
	the new GAS options.
	* doc/c-riscv.texi: Likewise.

	opcodes/
	* riscv-dis.c (print_riscv_disassembler_options): Add description
	about the new OBJDUMP option.
---
 gas/config/tc-riscv.c | 19 +++++++++++--------
 gas/doc/c-riscv.texi  | 35 +++++++++++++++++++++++++++++++++++
 opcodes/riscv-dis.c   |  9 ++++++---
 3 files changed, 52 insertions(+), 11 deletions(-)

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 81bdfa8..95f787f 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -3490,14 +3490,17 @@ md_show_usage (FILE *stream)
 {
   fprintf (stream, _("\
 RISC-V options:\n\
-  -fpic          generate position-independent code\n\
-  -fno-pic       don't generate position-independent code (default)\n\
-  -march=ISA     set the RISC-V architecture\n\
-  -mabi=ABI      set the RISC-V ABI\n\
-  -mrelax        enable relax (default)\n\
-  -mno-relax     disable relax\n\
-  -march-attr    generate RISC-V arch attribute\n\
-  -mno-arch-attr don't generate RISC-V arch attribute\n\
+  -fpic                       generate position-independent code\n\
+  -fno-pic                    don't generate position-independent code (default)\n\
+  -march=ISA                  set the RISC-V architecture\n\
+  -misa-spec=ISAspec          set the RISC-V ISA spec (2p0, 2p1, 2p2, 20190608, 20191213)\n\
+  -mriscv-isa-version=ISAver  update the default version of RISC-V architecture\n\
+  -mpriv-spec=PRIVspec        set the RISC-V privilege spec (1p9, 1p9p1, 1p10, 1p11)\n\
+  -mabi=ABI                   set the RISC-V ABI\n\
+  -mrelax                     enable relax (default)\n\
+  -mno-relax                  disable relax\n\
+  -march-attr                 generate RISC-V arch attribute\n\
+  -mno-arch-attr              don't generate RISC-V arch attribute\n\
 "));
 }
 
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index 488cf56..559c87a 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -42,6 +42,41 @@ Don't generate position-independent code (default)
 @cindex @samp{-march=ISA} option, RISC-V
 @item -march=ISA
 Select the base isa, as specified by ISA.  For example -march=rv32ima.
+If this option and the architecture attributes aren’t set, then assembler
+will check the default configure setting --with-arch=ISA.
+
+@cindex @samp{-misa-spec=ISAspec} option, RISC-V
+@item -misa-spec=ISAspec
+Select the default isa spec version.  If the version of ISA isn't set
+by -march, then assembler helps to set the version according to
+the default chosen spec.  If this option isn't set, then assembler will
+check the default configure setting --with-isa-spec=ISAspec.
+
+@cindex @samp{-mriscv-isa-version=ISAver} option, RISC-V
+@item -mriscv-isa-version=ISAver
+The syntax of ISAver is same as the ISA set by -march, but must set with
+versions, and without the rv32 or rv64 prefix.  For example
+-mriscv-isa-version=i2p0m2p0a2p0.  There are two reasons that you may need
+this option,
+
+Some versions of extensions defined in the ISA spec are not matched to the
+toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
+ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
+have to use this option to choose the correct version for V-ext.
+
+The other reason is that you want to update the version for the specific
+standard extensions if the version are not set in the ELF architecture
+attributes or -march option.
+
+If this option isn't set, then assembler will check the default configure
+setting --with-riscv-isa-version=ISAver.
+
+@cindex @samp{-mpriv-spec=PRIVspec} option, RISC-V
+@item -mpriv-spec=PRIVspec
+Select the privileged spec version.  We can decide whether the CSR is valid or
+not according to the chosen spec.  If this option and the privilege attributes
+aren't set, then assembler will check the default configure setting
+--with-priv-spec=PRIVspec.
 
 @cindex @samp{-mabi=ABI} option, RISC-V
 @item -mabi=ABI
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 38ae8ac..b558282 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -601,11 +601,14 @@ The following RISC-V-specific disassembler options are supported for use\n\
 with the -M switch (multiple options should be separated by commas):\n"));
 
   fprintf (stream, _("\n\
-  numeric       Print numeric register names, rather than ABI names.\n"));
+  numeric         Print numeric register names, rather than ABI names.\n"));
 
   fprintf (stream, _("\n\
-  no-aliases    Disassemble only into canonical instructions, rather\n\
-                than into pseudoinstructions.\n"));
+  no-aliases      Disassemble only into canonical instructions, rather\n\
+                  than into pseudoinstructions.\n"));
+
+  fprintf (stream, _("\n\
+  priv-spec=PRIV  Print the CSR according to the chosen privilege spec.\n"));
 
   fprintf (stream, _("\n"));
 }
-- 
2.7.4


^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
                   ` (6 preceding siblings ...)
  2020-04-18 11:07 ` [PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options Nelson Chu
@ 2020-04-18 11:17 ` Nelson Chu
  2020-04-23 20:59   ` Palmer Dabbelt
  2020-04-30 16:10 ` Kito Cheng
  8 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:17 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

Sorry for not sending these patches to Palmer :)
CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> Hi binutils and gdb,
>
> I know every RISCV contirbutors all do the best to maintain the compatibility
> between different spec versions.  But the specs are changed frequently, and
> sometimes it is very hard to keep the compatibility if we don't have a good
> way to deal with versioning problems.  Since different ISA specs define
> different instructions, and different privilege specs define different CSR,
> both of them need the version checking and controling mechanism.
>
> For the ISA versions, you can set them by the RISCV ELF architecture attribute
> and assembler option -march, but you have to set them one by one for each
> extension.  It seems not so friendly for user, so Kito Cheng proposed a good
> solution to resolve the problem.  That is, support the new assembler options and
> default configure options to reduce the burdens when setting ISA versions.
> The original idea and discussion are come from the following link,
>
> https://groups.google.com/a/groups.riscv.org/forum/#!msg/sw-dev/aZhMG7NIVTk/PTZEaTWiAwAJ)
>
> === New Assembler Options ===
>
> * -misa-spec = [2p0|2p1|2p2|20190608|20191213]
> You can simply choose the ISA spec by this option, and then assembler will set
> the version for the standard extensions if you don’t set in the ELF arch
> attributes or -march option.
>
> * -mriscv-isa-version = <ISA-string>
> The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
> prefix.  There are two reasons that you may need this option,
>
> 1. Some versions of extensions defined in the ISA spec are not matched to the
> toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
> ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
> have to use this option to choose the correct version for V-ext.
>
> 2. You want to update the version for the specific standard extensions if the
> version are not set in the ELF arch attributes and -march option.
>
> === New Default Configure Options ===
>
> * --with-arch = <ISA-string>
> The syntax of <ISA-string> is same as -march option.  Assembler will check this
> if -march option and ELF arch attributes aren’t set.
>
> * --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
> The syntax is same as -misa-spec option.  Assembler will check this if
> -misa-spec option isn’t set.
>
> * --with-riscv-isa-version = <ISA-string>
> The syntax of <ISA-string> is same as -mriscv-isa-version option.  Assembler
> will check this if -mriscv-isa-version option isn’t set.
>
> === The Priority of these options ===
>
> * ELF arch attributes > Assembler options > Default configure options
> * For GAS options, -march > -mriscv-isa-version > -misa-spec
> * For configure options, --with-arch > --with-riscv-isa-version > --with-isa-spec
>
> === Example ===
>
> $ cat test.s
> .attribute arch, "rv32i1p9fv_zicsr"
>
> $ riscv32-unknown-elf-as -march-attr -misa-spec=2p2 -mriscv-isa-version=i2p1a2p1v0p9 test.s -o test.o
>
> $ riscv32-unknown-elf-readelf -A test.o
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
> ...
>
> The above example covers most cases.
>
> * For i-ext, we already set the version 1p9 in elf attribute, so -misa-spec and
> -mriscv-isa-version don't update the version to 2p0 and 2p1.
>
> * For f-ext, we don't set the version to it, so use the default version 2p0
> according to the ISA spec 2p2.
>
> * For v-ext, the default version is 0p7 according to ISA spec 2p2, but we use
> -mriscv-isa-version to update it to 0p9.
>
> * For a-ext, it isn't enabled by -march or elf attribute, so we don't update it's
> version even if -mriscv-isa-version is set.
>
> * As for the zicsr extension, it is defined in the lastest ISA spec rather than 2p2,
> so set it's version to 0p0.
>
>
> As for the privilege version, I get the related request in the following link,
> https://github.com/riscv/riscv-binutils-gdb/issues/202
>
> We also support new assembler options to choose the spec you want, and then
> assembler will generate the correct CSR address according to the chosen spec.
> If the obselete CSR name is used, then report the warning message when the
> -mcsr-check is set, and use the latest defined address for the CSR.  Of course,
> you can also choose the spec by setting the orginal RISCV ELF priv attributes.
> Beside, the disassembler can show the CSR according to the chosen privilege spec
> by the new disassmebler option.  However, the CSR address is showed directly if
> it is invalid for the chosen spec.
>
> === New Assembler Option ===
>
> * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
> This is used to set the privileged spec’s version, and we can decide whether
> the CSR is valid or not.
>
> === New Default Configure Option ===
>
> * --with-priv-spec = [1p9|1p9p1|1p10|1p11]
> The syntax is same as -mpriv-spec option.  Assembler will check this setting
> if -mpriv-spec option isn’t set.
>
> === New Disassmebler Option ===
>
> * -Mpriv-spec=[1p9|1p9p1|1p10|1p11]
> The syntax is same as -mpriv-spec option.  The disassembler can show the CSR
> correctly according to the chosen privilege spec.
>
>
> Notes,
>
> 1. I'm not sure if GDB needs the above version checking, but I think the current
> modifications won't change the behavior of GDB.  We still use the DECLARE_CSR
> to generate the gdb/features/riscv/[32|64]bit-csr.xml, that means we only generate
> the CSR which are valid in the latest privilege spec.  Also, the objdump shows
> the CSR according to the latest privilege spec by default.
>
> 2. The default ISA spec is set to 2p2 rather than the lastest version.  The reason
> is that compiler generates the ISA string with fixed 2p0 verisons only for the
> RISCV ELF architecture attributes, but not for the -march option.  Therefore, we
> should update the compiler or linker to resolve this problem in the futrue patches.
>
> 3. How to extend the default versions and new ISA spec?
> You only need to update the riscv_ext_version_table which is defined in the
> opcodes/riscv-opc.c.
>
> const struct riscv_ext_version riscv_ext_version_table[] =
> {
> /* name, spec name,  major,  minor.  */
> {"e",    "20191213",      1,     9},
> {"e",    "20190608",      1,     9},
> {"e",    "2p2",           1,     9},
>
> {"i",    "20191213",      2,     1},
> {"i",    "20190608",      2,     1},
> {"i",    "2p2",           2,     0},
> ...
> };
>
> 4. How to extend new privilege spec and new CSR?
>
> * include/opcode/riscv.h
> enum riscv_csr_vclass
> {
>   CSR_CLASS_VNONE,     /* Default value */
>
>   CSR_CLASS_V1P9,       /* v1.9 */
>   CSR_CLASS_V1P9P1,     /* v1.9.1 */
>   CSR_CLASS_V1P10,      /* v1.10 */
>   CSR_CLASS_V1P11,      /* v1.11 */
>   CSR_CLASS_VDRAFT
> };
>
> * opcodes/riscv-opc.c
>
> static const struct priv_version_t priv_versions[] =
> {
>   {"1p9", CSR_CLASS_V1P9},
>   {"1p9p1", CSR_CLASS_V1P9P1},
>   {"1p10", CSR_CLASS_V1P10},
>   {"1p11", CSR_CLASS_V1P11},
>
> /* Terminate the list.  */
>   {NULL, 0}
> };
>
> * include/opcode/riscv-opc.h
>
> Format, DECLARE_CSR      (NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)
>         DECLARE_CSR_ALIAS(NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)
>
> NAME:       CSR name.
> VALUE:      CSR address
> CLASS:      ISA dependency
> DEFINE_VER: First defined in which privilege spec.
> ABORT_VER:  Aborted in which privilege spec.  If the CSR is still valid in
>             the lastest version, then it should be CSR_CLASS_VDRAFT.
>
> If the CSR is aborted in the latest spec, or has not only one information, then
> use DECLARE_CSR_ALIAS.  Otherwise, use DECLARE_CSR.
>
> For example,
> DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
>
>
> Thanks
> Nelson
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/7] RISC-V: Remove the redundant gas test file.
  2020-04-18 11:07 ` [PATCH 1/7] RISC-V: Remove the redundant gas test file Nelson Chu
@ 2020-04-18 11:17   ` Nelson Chu
  2020-04-18 11:20     ` Nelson Chu
  0 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:17 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
>         gas/
>         * testsuite/gas/riscv/march-fail-s-with-version: Removed.
> ---
>  gas/testsuite/gas/riscv/march-fail-s-with-version | 2 --
>  1 file changed, 2 deletions(-)
>  delete mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version
>
> diff --git a/gas/testsuite/gas/riscv/march-fail-s-with-version b/gas/testsuite/gas/riscv/march-fail-s-with-version
> deleted file mode 100644
> index a514d4a..0000000
> --- a/gas/testsuite/gas/riscv/march-fail-s-with-version
> +++ /dev/null
> @@ -1,2 +0,0 @@
> -Assembler messages:
> -.*: Invalid or unknown s ISA extension: 'sfoo'
> \ No newline at end of file
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 2/7] RISC-V: Forgot to update the priv-reg-fail-read-only-01 test case.
  2020-04-18 11:07 ` [PATCH 2/7] RISC-V: Forgot to update the priv-reg-fail-read-only-01 test case Nelson Chu
@ 2020-04-18 11:17   ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:17 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> priv-reg and priv-reg-fail-read-only-01 should be updated at the same time.
> The fromer checks all CSR by csrr instructions, and the later uses csrw to
> check whether the CSR is read only or not.
>
>         gas/
>         * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated.
> ---
>  .../gas/riscv/priv-reg-fail-read-only-01.s         | 114 ++++++++++-----------
>  1 file changed, 57 insertions(+), 57 deletions(-)
>
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
> index 501a52e..3646c80 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.s
> @@ -1,7 +1,8 @@
>         .macro csr val
>         csrw \val, a1
>         .endm
> -# 1.9.1 registers
> +
> +       # Supported the current priv spec 1.11.
>         csr ustatus
>         csr uie
>         csr utvec
> @@ -9,7 +10,7 @@
>         csr uscratch
>         csr uepc
>         csr ucause
> -       csr ubadaddr
> +       csr utval               # Added in 1.10
>         csr uip
>
>         csr fflags
> @@ -86,26 +87,15 @@
>         csr sideleg
>         csr sie
>         csr stvec
> +       csr scounteren          # Added in 1.10
>
>         csr sscratch
>         csr sepc
>         csr scause
> -       csr sbadaddr
> +       csr stval               # Added in 1.10
>         csr sip
>
> -       csr sptbr
> -
> -       csr hstatus
> -       csr hedeleg
> -       csr hideleg
> -       csr hie
> -       csr htvec
> -
> -       csr hscratch
> -       csr hepc
> -       csr hcause
> -       csr hbadaddr
> -       csr hip
> +       csr satp                # Added in 1.10
>
>         csr mvendorid
>         csr marchid
> @@ -113,24 +103,39 @@
>         csr mhartid
>
>         csr mstatus
> -       csr misa
> +       csr misa                # 0xf10 in 1.9, but changed to 0x301 since 1.9.1.
>         csr medeleg
>         csr mideleg
>         csr mie
>         csr mtvec
> +       csr mcounteren          # Added in 1.10
>
>         csr mscratch
>         csr mepc
>         csr mcause
> -       csr mbadaddr
> +       csr mtval               # Added in 1.10
>         csr mip
>
> -       csr mbase
> -       csr mbound
> -       csr mibase
> -       csr mibound
> -       csr mdbase
> -       csr mdbound
> +       csr pmpcfg0             # Added in 1.10
> +       csr pmpcfg1             # Added in 1.10
> +       csr pmpcfg2             # Added in 1.10
> +       csr pmpcfg3             # Added in 1.10
> +       csr pmpaddr0            # Added in 1.10
> +       csr pmpaddr1            # Added in 1.10
> +       csr pmpaddr2            # Added in 1.10
> +       csr pmpaddr3            # Added in 1.10
> +       csr pmpaddr4            # Added in 1.10
> +       csr pmpaddr5            # Added in 1.10
> +       csr pmpaddr6            # Added in 1.10
> +       csr pmpaddr7            # Added in 1.10
> +       csr pmpaddr8            # Added in 1.10
> +       csr pmpaddr9            # Added in 1.10
> +       csr pmpaddr10           # Added in 1.10
> +       csr pmpaddr11           # Added in 1.10
> +       csr pmpaddr12           # Added in 1.10
> +       csr pmpaddr13           # Added in 1.10
> +       csr pmpaddr14           # Added in 1.10
> +       csr pmpaddr15           # Added in 1.10
>
>         csr mcycle
>         csr minstret
> @@ -195,10 +200,7 @@
>         csr mhpmcounter30h
>         csr mhpmcounter31h
>
> -       csr mucounteren
> -       csr mscounteren
> -       csr mhcounteren
> -
> +       csr mcountinhibit       # Added in 1.11
>         csr mhpmevent3
>         csr mhpmevent4
>         csr mhpmevent5
> @@ -236,34 +238,32 @@
>
>         csr dcsr
>         csr dpc
> -       csr dscratch
> -# 1.10 registers
> -       csr utval
> -
> -       csr scounteren
> -       csr stval
> -       csr satp
> +       csr dscratch0           # Added in 1.11
> +       csr dscratch1           # Added in 1.11
>
> -       csr mcounteren
> -       csr mtval
> +       # Supported in previous priv spec, but dropped now.
> +       csr ubadaddr            # 0x043 in 1.9.1, but the value is utval since 1.10
> +       csr sbadaddr            # 0x143 in 1.9.1, but the value is stval since 1.10
> +       csr sptbr               # 0x180 in 1.9.1, but the value is satp since 1.10
> +       csr mbadaddr            # 0x343 in 1.9.1, but the value is mtval since 1.10
> +       csr mucounteren         # 0x320 in 1.9.1, dropped in 1.10, but the value is mcountinhibit since 1.11
> +       csr dscratch            # 0x7b2 in 1.10,  but the value is dscratch0 since 1.11
>
> -       csr pmpcfg0
> -       csr pmpcfg1
> -       csr pmpcfg2
> -       csr pmpcfg3
> -       csr pmpaddr0
> -       csr pmpaddr1
> -       csr pmpaddr2
> -       csr pmpaddr3
> -       csr pmpaddr4
> -       csr pmpaddr5
> -       csr pmpaddr6
> -       csr pmpaddr7
> -       csr pmpaddr8
> -       csr pmpaddr9
> -       csr pmpaddr10
> -       csr pmpaddr11
> -       csr pmpaddr12
> -       csr pmpaddr13
> -       csr pmpaddr14
> -       csr pmpaddr15
> +       csr hstatus             # 0x200, dropped in 1.10
> +       csr hedeleg             # 0x202, dropped in 1.10
> +       csr hideleg             # 0x203, dropped in 1.10
> +       csr hie                 # 0x204, dropped in 1.10
> +       csr htvec               # 0x205, dropped in 1.10
> +       csr hscratch            # 0x240, dropped in 1.10
> +       csr hepc                # 0x241, dropped in 1.10
> +       csr hcause              # 0x242, dropped in 1.10
> +       csr hbadaddr            # 0x243, dropped in 1.10
> +       csr hip                 # 0x244, dropped in 1.10
> +       csr mbase               # 0x380, dropped in 1.10
> +       csr mbound              # 0x381, dropped in 1.10
> +       csr mibase              # 0x382, dropped in 1.10
> +       csr mibound             # 0x383, dropped in 1.10
> +       csr mdbase              # 0x384, dropped in 1.10
> +       csr mdbound             # 0x385, dropped in 1.10
> +       csr mscounteren         # 0x321, dropped in 1.10
> +       csr mhcounteren         # 0x322, dropped in 1.10
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions.
  2020-04-18 11:07 ` [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions Nelson Chu
@ 2020-04-18 11:18   ` Nelson Chu
  2020-04-23 22:58   ` Palmer Dabbelt
  1 sibling, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:18 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> For now, we can only use the GAS option -march and ELF arch attribute to set
> the versions for ISA extensions.  It seems not so friendly for user.
> Therefore, we support new GAS options and configure options to make it easiler
> for user.
>
> New Assembler Options,
>
> * -misa-spec = [2p0|2p1|2p2|20190608|20191213]
> You can simply choose the ISA spec by this option, and then assembler will set
> the version for the standard extensions if you don’t set in the ELF arch
> attributes or -march option.
>
> * -mriscv-isa-version = <ISA-string>
> The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
> prefix.  There are two reasons that you may need this option,
>
> 1. Some versions of extensions defined in the ISA spec are not matched to the
> toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
> ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
> have to use this option to choose the correct version for V-ext.
>
> 2. You want to update the version for the specific standard extensions if the
> version are not set in the ELF arch attributes and -march option.
>
> New Default Configure Options,
>
> * --with-arch = <ISA-string>
> The syntax of <ISA-string> is same as -march option.  Assembler will check this
> if -march option and ELF arch attributes aren’t set.
>
> * --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
> The syntax is same as -misa-spec option.  Assembler will check this if
> -misa-spec option isn’t set.
>
> * --with-riscv-isa-version = <ISA-string>
> The syntax of <ISA-string> is same as -mriscv-isa-version option.  Assembler
> will check this if -mriscv-isa-version option isn’t set.
>
> The Priority of these options,
>
> * ELF arch attributes > Assembler options > Default configure options
> * For GAS options, -march > -mriscv-isa-version > -misa-spec
> * For configure options, --with-arch > --with-riscv-isa-version > --with-isa-spec
>
>         gas/
>         * config/tc-riscv.c (DEFAULT_ARCH_WITH_EXT, DEFAULT_ISA_SPEC,
>         DEFAULT_RISCV_ISA_VERSION): Default configure option settings.
>         You can set them by new configure options --with-arch,
>         --with-isa-spec and --with-riscv-isa-version.
>
>         (default_arch_with_ext, default_isa_spec, default_riscv_isa_version):
>         const char strings which are used to set the ISA extensions. You can
>         use gas options -march (or ELF build attributes), and new gas options
>         -misa-spec and -mriscv-isa-version to set them, respectively.  If the
>         gas options and attributes are not set, then assembler will check the
>         default configure option settings.
>
>         (ext_version_hash): The hash table used to handle the extensions
>         with versions.
>         (init_ext_version_hash): Initialize the ext_version_hash according
>         to riscv_ext_version_table.
>
>         (riscv_get_default_ext_version): The callback function of
>         riscv_parse_subset_t.  According to the choosed ISA spec,
>         get the default version for the specific extension.
>
>         (riscv_set_arch): Add new bfd_boolean parameter update_version.
>         The update_version is TRUE means we just want to update the version
>         according to default_riscv_isa_version, so don't call the
>         riscv_release_subset_list to reset the subset list.  Pass two new
>         arguments to riscv_parse_subset, one is update_version mentioned above,
>         the other is the default_isa_spec.  We use the default_isa_spec to
>         choose the default version for the extensions.
>
>         (enum options, struct option md_longopts): Add new gas options,
>         -misa-spec and -mriscv-isa-version.
>         (md_parse_option): Handle the above new gas options.
>         (riscv_after_parse_args): Call init_ext_version_hash to initialize the
>         ext_version_hash, and then always call riscv_set_arch twice to set and
>         update the architecture with versions according to default_arch_with_ext
>         and default_riscv_isa_version.
>         (s_riscv_attribute): Same as riscv_after_parse_args, we need to call
>         riscv_set_arch twice.
>
>         * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2p2.  Set 0p0
>         as default version for x extensions.
>         * testsuite/gas/riscv/attribute-02.d: Likewise.
>         * testsuite/gas/riscv/attribute-03.d: Likewise.
>         * testsuite/gas/riscv/attribute-04.d: Likewise.
>         * testsuite/gas/riscv/attribute-05.d: Likewise.
>         * testsuite/gas/riscv/attribute-06.d: Likewise.
>         * testsuite/gas/riscv/attribute-07.d: Likewise.
>         * testsuite/gas/riscv/attribute-08.d: Likewise.
>         * testsuite/gas/riscv/attribute-09.d: New testcase.  For i-ext, we
>         already set the version 1p9 in elf attribute, so -misa-spec and
>         -mriscv-isa-version don't update the version to 2p0 and 2p1.
>         For f-ext, we don't set the version to it, so use the default version
>         2p0 according to the ISA spec 2p2.  For v-ext, the default version is
>         0p7 according to ISA spec 2p2, but we use -mriscv-isa-version to update
>         it to 0p9.  For a-ext, it isn't enabled by -march or elf attribute, so
>         we don't update it's version even if -mriscv-isa-version is set.
>         As for the zicsr extension, it is defined in the lastest ISA spec
>         rather than 2p2, so set it's version to 0p0.
>         * testsuite/gas/riscv/attribute-09.s: Likewise.
>         * testsuite/gas/riscv/attribute-10.d: New testcase.  The version of
>         zicsr is 2p0 according to ISA spec 20191213.
>         * testsuite/gas/riscv/attribute-11.d: New testcase.  We can also update
>         the z* extension by -mriscv-isa-version.
>
>         * configure.ac: Add new configure options, --with-arch, --with-isa-spec
>         and --with-riscv-isa-version.
>         * configure: Regenerated.
>         * config.in: Regenerated.
>
>         bfd/
>         * elfxx-riscv.h (struct riscv_subset_t): Add new bfd_boolean field
>         use_default_version, which is used to record whether the default
>         version is used for the extension.
>         (struct riscv_parse_subset_t): Add new callback function
>         get_default_version.  It is used to find the default version for
>         the specific extension.
>         (riscv_add_subset, riscv_parse_subset): Update function declaration.
>
>         * elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters
>         default_major_version and default_minor_version.  Add new bfd_boolean
>         parameter *use_default_version.  Set it to TRUE if we need to call
>         the callback rps->get_default_version to find the default version.
>
>         (riscv_update_subset_version): Only update the version of existin
>         standard extensions and their Z* sub extensions, if -mriscv-isa-version
>         or --with-riscv-isa-version are set, and the default version are used.
>
>         (riscv_add_subset): New parameter use_default_version.  Record whether
>         the default version is used.  riscv_update_subset_version only update
>         the version of extensions if the default versions are used.
>
>         (riscv_parse_subset): Add two parameters isa_spec_name and
>         update_version.  Pass them to riscv_parse_std_ext and
>         riscv_parse_prefixed_ext.  The string set by -mriscv-isa-version or
>         --with-riscv-isa-version doesn't have to start with rv32/rv64, so
>         skip the checking if update_version is TRUE.
>         (riscv_parse_std_ext): If update_version is TRUE, then we just call
>         riscv_update_subset_version to update the default version.  Otherwise,
>         Call rps->get_default_version if we fail to find the default version
>         in riscv_parsing_subset_version, and then call riscv_add_subset to add
>         the subset into subset list.
>         (riscv_parse_prefixed_ext): Same as the riscv_parse_std_ext.
>         (riscv_std_z_ext_strtab): Support Zicsr extensions.
>
>         * elfnn-riscv.c (riscv_merge_std_ext, riscv_merge_multi_letter_ext):
>         Updated.  Pass update_version as FALSE to riscv_add_subset, the
>         update_version is only needed for assembler, not linker.
>         (riscv_merge_arch_attr_info): The callback function get_default_version
>         is only needed for assembler, so set it to NULL in linker.  Also, Pass
>         isa_spec_name as NULL and update_version as FALSE to riscv_parse_subset.
>
>         include/
>         * opcode/riscv.h (struct riscv_ext_version): New structure holds
>         version information for the specific ISA.
>
>         opcodes/
>         * riscv-opc.c (riscv_ext_version_table): The table used to store
>         all information about the supported spec and the corresponding ISA
>         versions.  Currently, only Zicsr is supported to verify the
>         correctness of Z sub extension settings.  Others will be supported
>         in the future patches.
> ---
>  bfd/elfnn-riscv.c                      |  24 ++-
>  bfd/elfxx-riscv.c                      | 350 ++++++++++++++++++++++++---------
>  bfd/elfxx-riscv.h                      |  12 +-
>  gas/config.in                          |   9 +
>  gas/config/tc-riscv.c                  | 128 +++++++++++-
>  gas/configure                          |  53 ++++-
>  gas/configure.ac                       |  35 +++-
>  gas/testsuite/gas/riscv/attribute-01.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-02.d |   4 +-
>  gas/testsuite/gas/riscv/attribute-03.d |   4 +-
>  gas/testsuite/gas/riscv/attribute-04.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-05.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-06.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-07.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-08.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-09.d |   6 +
>  gas/testsuite/gas/riscv/attribute-09.s |   1 +
>  gas/testsuite/gas/riscv/attribute-10.d |   6 +
>  gas/testsuite/gas/riscv/attribute-11.d |   6 +
>  include/opcode/riscv.h                 |  11 ++
>  opcodes/riscv-opc.c                    |  53 +++++
>  21 files changed, 585 insertions(+), 129 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/attribute-09.d
>  create mode 100644 gas/testsuite/gas/riscv/attribute-09.s
>  create mode 100644 gas/testsuite/gas/riscv/attribute-10.d
>  create mode 100644 gas/testsuite/gas/riscv/attribute-11.d
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 8fcb106..4ca49e0 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -2802,7 +2802,7 @@ riscv_merge_std_ext (bfd *ibfd,
>    if (!riscv_i_or_e_p (ibfd, out_arch, out))
>      return FALSE;
>
> -  if (in->name[0] != out->name[0])
> +  if (strcasecmp (in->name, out->name) != 0)
>      {
>        /* TODO: We might allow merge 'i' with 'e'.  */
>        _bfd_error_handler
> @@ -2818,8 +2818,8 @@ riscv_merge_std_ext (bfd *ibfd,
>        return FALSE;
>      }
>    else
> -    riscv_add_subset (&merged_subsets,
> -                     in->name, in->major_version, in->minor_version);
> +    riscv_add_subset (&merged_subsets, in->name, in->major_version,
> +                     in->minor_version, FALSE);
>
>    in = in->next;
>    out = out->next;
> @@ -2848,7 +2848,7 @@ riscv_merge_std_ext (bfd *ibfd,
>
>        struct riscv_subset_t *merged = find_in ? find_in : find_out;
>        riscv_add_subset (&merged_subsets, merged->name,
> -                       merged->major_version, merged->minor_version);
> +                       merged->major_version, merged->minor_version, FALSE);
>      }
>
>    /* Skip all standard extensions.  */
> @@ -2917,14 +2917,14 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
>         {
>           /* `in' comes before `out', append `in' and increment.  */
>           riscv_add_subset (&merged_subsets, in->name, in->major_version,
> -                           in->minor_version);
> +                           in->minor_version, FALSE);
>           in = in->next;
>         }
>        else if (cmp > 0)
>         {
>           /* `out' comes before `in', append `out' and increment.  */
>           riscv_add_subset (&merged_subsets, out->name, out->major_version,
> -                           out->minor_version);
> +                           out->minor_version, FALSE);
>           out = out->next;
>         }
>        else
> @@ -2938,7 +2938,7 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
>             }
>
>           riscv_add_subset (&merged_subsets, out->name, out->major_version,
> -                           out->minor_version);
> +                           out->minor_version, FALSE);
>           out = out->next;
>           in = in->next;
>         }
> @@ -2952,7 +2952,7 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
>      while (tail)
>        {
>         riscv_add_subset (&merged_subsets, tail->name, tail->major_version,
> -                         tail->minor_version);
> +                         tail->minor_version, FALSE);
>         tail = tail->next;
>        }
>    }
> @@ -2975,13 +2975,17 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
>    riscv_parse_subset_t rpe_in;
>    riscv_parse_subset_t rpe_out;
>
> +  /* Only assembler needs to check the default version of ISA, so just set
> +     the rpe_in.get_default_version and rpe_out.get_default_version to NULL.  */
>    rpe_in.subset_list = &in_subsets;
>    rpe_in.error_handler = _bfd_error_handler;
>    rpe_in.xlen = &xlen_in;
> +  rpe_in.get_default_version = NULL;
>
>    rpe_out.subset_list = &out_subsets;
>    rpe_out.error_handler = _bfd_error_handler;
>    rpe_out.xlen = &xlen_out;
> +  rpe_out.get_default_version = NULL;
>
>    if (in_arch == NULL && out_arch == NULL)
>      return NULL;
> @@ -2993,10 +2997,10 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
>      return in_arch;
>
>    /* Parse subset from arch string.  */
> -  if (!riscv_parse_subset (&rpe_in, in_arch))
> +  if (!riscv_parse_subset (&rpe_in, in_arch, NULL, FALSE))
>      return NULL;
>
> -  if (!riscv_parse_subset (&rpe_out, out_arch))
> +  if (!riscv_parse_subset (&rpe_out, out_arch, NULL, FALSE))
>      return NULL;
>
>    /* Checking XLEN.  */
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index b15fdee..3a6aaf3 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1025,9 +1025,8 @@ riscv_elf_add_sub_reloc (bfd *abfd,
>       `minor_version`: Parsing result of minor version, set to 0 if version is
>       not present in arch string, but set to `default_minor_version` if
>       `major_version` using default_major_version.
> -     `default_major_version`: Default major version.
> -     `default_minor_version`: Default minor version.
> -     `std_ext_p`: True if parsing std extension.  */
> +     `std_ext_p`: True if parsing std extension.
> +     `use_default_version`: Set it to True if we need the default version.  */
>
>  static const char *
>  riscv_parsing_subset_version (riscv_parse_subset_t *rps,
> @@ -1035,17 +1034,16 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>                               const char *p,
>                               unsigned *major_version,
>                               unsigned *minor_version,
> -                             unsigned default_major_version,
> -                             unsigned default_minor_version,
> -                             bfd_boolean std_ext_p)
> +                             bfd_boolean std_ext_p,
> +                             bfd_boolean *use_default_version)
>  {
>    bfd_boolean major_p = TRUE;
>    unsigned version = 0;
> -  unsigned major = 0;
> -  unsigned minor = 0;
>    char np;
>
> -  for (;*p; ++p)
> +  *major_version = 0;
> +  *minor_version = 0;
> +  for (; *p; ++p)
>      {
>        if (*p == 'p')
>         {
> @@ -1057,7 +1055,6 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>               if (std_ext_p)
>                 {
>                   *major_version = version;
> -                 *minor_version = 0;
>                   return p;
>                 }
>               else
> @@ -1068,7 +1065,7 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>                 }
>             }
>
> -         major = version;
> +         *major_version = version;
>           major_p = FALSE;
>           version = 0;
>         }
> @@ -1079,21 +1076,15 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>      }
>
>    if (major_p)
> -    major = version;
> +    *major_version = version;
>    else
> -    minor = version;
> +    *minor_version = version;
>
> -  if (major == 0 && minor == 0)
> -    {
> -      /* We don't found any version string, use default version.  */
> -      *major_version = default_major_version;
> -      *minor_version = default_minor_version;
> -    }
> -  else
> -    {
> -      *major_version = major;
> -      *minor_version = minor;
> -    }
> +  /* We can not find any version in string, need to parse default version.  */
> +  if (use_default_version != NULL
> +      && *major_version == 0
> +      && *minor_version == 0)
> +    *use_default_version = TRUE;
>    return p;
>  }
>
> @@ -1106,6 +1097,41 @@ riscv_supported_std_ext (void)
>    return "mafdqlcbjtpvn";
>  }
>
> +/* Update the version of standard extensions and their Z* sub extensions
> +   if -mriscv-isa-version is set.  */
> +
> +static bfd_boolean
> +riscv_update_subset_version (riscv_parse_subset_t *rps,
> +                            const char *ext_with_version,
> +                            char *ext,
> +                             unsigned major_version,
> +                            unsigned minor_version,
> +                            bfd_boolean use_default_version)
> +{
> +  riscv_subset_t *subset = riscv_lookup_subset (rps->subset_list, ext);;
> +
> +  /* The extension doesn't exist, so just return.  */
> +  if (subset == NULL)
> +    return TRUE;
> +
> +  /* This means we can not find the version in the string.  */
> +  if (use_default_version)
> +    {
> +      rps->error_handler ("-mriscv-isa-version=%s: unexpected version "
> +                         "setting for subset `%s'", ext_with_version, ext);
> +      return FALSE;
> +    }
> +
> +  /* We only update the extension which use the default version.  */
> +  if (subset->use_default_version)
> +    {
> +      subset->major_version = major_version;
> +      subset->minor_version = minor_version;
> +    }
> +
> +  return TRUE;
> +}
> +
>  /* Parsing function for standard extensions.
>
>     Return Value:
> @@ -1114,46 +1140,95 @@ riscv_supported_std_ext (void)
>     Arguments:
>       `rps`: Hooks and status for parsing subset.
>       `march`: Full arch string.
> -     `p`: Curent parsing position.  */
> +     `p`: Curent parsing position.
> +     `isa_spec_name`: The ISA spec name.  We set the default ISA versions
> +     according to it.
> +     `update_version`: True if the -mriscv-isa-version is set, and we need
> +     to update the version for the existing extensions.  */
>
>  static const char *
>  riscv_parse_std_ext (riscv_parse_subset_t *rps,
> -                    const char *march, const char *p)
> +                    const char *march,
> +                    const char *p,
> +                    const char *isa_spec_name,
> +                    bfd_boolean update_version)
>  {
>    const char *all_std_exts = riscv_supported_std_ext ();
>    const char *std_exts = all_std_exts;
> -
>    unsigned major_version = 0;
>    unsigned minor_version = 0;
>    char std_ext = '\0';
> +  bfd_boolean use_default_version = FALSE;
>
>    /* First letter must start with i, e or g.  */
>    switch (*p)
>      {
>        case 'i':
> -       p++;
> -       p = riscv_parsing_subset_version (
> -             rps,
> -             march,
> -             p, &major_version, &minor_version,
> -             /* default_major_version= */ 2,
> -             /* default_minor_version= */ 0,
> -             /* std_ext_p= */TRUE);
> -       riscv_add_subset (rps->subset_list, "i", major_version, minor_version);
> +       p = riscv_parsing_subset_version (rps,
> +                                         march,
> +                                         ++p,
> +                                         &major_version,
> +                                         &minor_version,
> +                                         /* std_ext_p= */TRUE,
> +                                         &use_default_version);
> +
> +       /* Update the version for exsiting extension.  */
> +       if (update_version)
> +         {
> +           if (!riscv_update_subset_version (rps, march, "i",
> +                                             major_version,
> +                                             minor_version,
> +                                             use_default_version))
> +             return NULL;
> +           break;
> +         }
> +
> +       /* Find the default version if needed.  */
> +       if (use_default_version)
> +         rps->get_default_version ("i",
> +                                   isa_spec_name,
> +                                   &major_version,
> +                                   &minor_version);
> +       riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
> +                         use_default_version);
>         break;
>
>        case 'e':
> -       p++;
> -       p = riscv_parsing_subset_version (
> -             rps,
> -             march,
> -             p, &major_version, &minor_version,
> -             /* default_major_version= */ 1,
> -             /* default_minor_version= */ 9,
> -             /* std_ext_p= */TRUE);
> -
> -       riscv_add_subset (rps->subset_list, "e", major_version, minor_version);
> -       riscv_add_subset (rps->subset_list, "i", 2, 0);
> +       p = riscv_parsing_subset_version (rps,
> +                                         march,
> +                                         ++p,
> +                                         &major_version,
> +                                         &minor_version,
> +                                         /* std_ext_p= */TRUE,
> +                                         &use_default_version);
> +
> +       /* Update the version for exsiting extension.  */
> +       if (update_version)
> +         {
> +           if (!riscv_update_subset_version (rps, march, "e",
> +                                             major_version,
> +                                             minor_version,
> +                                             use_default_version))
> +             return NULL;
> +           break;
> +         }
> +
> +       /* Find the default version if needed.  */
> +       if (use_default_version)
> +         rps->get_default_version ("e",
> +                                   isa_spec_name,
> +                                   &major_version,
> +                                   &minor_version);
> +       riscv_add_subset (rps->subset_list, "e", major_version, minor_version,
> +                         use_default_version);
> +
> +       /* i-ext must be enabled.  */
> +       rps->get_default_version ("i",
> +                                 isa_spec_name,
> +                                 &major_version,
> +                                 &minor_version);
> +       riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
> +                         TRUE);
>
>         if (*rps->xlen > 32)
>           {
> @@ -1161,35 +1236,58 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps,
>                                 march, *rps->xlen);
>             return NULL;
>           }
> -
>         break;
>
>        case 'g':
> -       p++;
> -       p = riscv_parsing_subset_version (
> -             rps,
> -             march,
> -             p, &major_version, &minor_version,
> -             /* default_major_version= */ 2,
> -             /* default_minor_version= */ 0,
> -             /* std_ext_p= */TRUE);
> -       riscv_add_subset (rps->subset_list, "i", major_version, minor_version);
> +       /* The g-ext shouldn't has the version, so we just skip the setting if
> +          user set a version to it.  */
> +       p = riscv_parsing_subset_version (rps,
> +                                         march,
> +                                         ++p,
> +                                         &major_version,
> +                                         &minor_version,
> +                                         TRUE,
> +                                         &use_default_version);
> +
> +       /* Set the version of g in -mriscv-isa-version is meaningless,
> +          so just skip it.  */
> +       if (update_version)
> +         break;
> +
> +       /* i-ext must be enabled.  */
> +       rps->get_default_version ("i",
> +                                 isa_spec_name,
> +                                 &major_version,
> +                                 &minor_version);
> +       riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
> +                         TRUE);
>
>         for ( ; *std_exts != 'q'; std_exts++)
>           {
>             const char subset[] = {*std_exts, '\0'};
> -           riscv_add_subset (
> -             rps->subset_list, subset, major_version, minor_version);
> +           rps->get_default_version (subset,
> +                                     isa_spec_name,
> +                                     &major_version,
> +                                     &minor_version);
> +           riscv_add_subset (rps->subset_list, subset, major_version,
> +                             minor_version, TRUE);
>           }
>         break;
>
>        default:
> -       rps->error_handler (
> -         "-march=%s: first ISA subset must be `e', `i' or `g'", march);
> -       return NULL;
> +       /* The first ISA subset of -mriscv-isa-version will not necessarily
> +          be e/i/g.  */
> +       if (!update_version)
> +         {
> +           rps->error_handler (
> +           "-march=%s: first ISA subset must be `e', `i' or `g'", march);
> +           return NULL;
> +         }
>      }
>
> -  while (*p)
> +  /* The riscv_parsing_subset_version may set `p` to NULL, so I think we should
> +     skip parsing the string if `p` is NULL or value of `p` is `\0`.  */
> +  while (p != NULL && *p != '\0')
>      {
>        char subset[2] = {0, 0};
>
> @@ -1218,21 +1316,37 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps,
>               march, *p);
>           return NULL;
>         }
> -
>        std_exts++;
>
> -      p++;
> -      p = riscv_parsing_subset_version (
> -           rps,
> -           march,
> -           p, &major_version, &minor_version,
> -           /* default_major_version= */ 2,
> -           /* default_minor_version= */ 0,
> -           /* std_ext_p= */TRUE);
> -
> +      use_default_version = FALSE;
>        subset[0] = std_ext;
> +      p = riscv_parsing_subset_version (rps,
> +                                       march,
> +                                       ++p,
> +                                       &major_version,
> +                                       &minor_version,
> +                                       TRUE,
> +                                       &use_default_version);
> +
> +      /* Update the version for exsiting extension.  */
> +      if (update_version)
> +       {
> +         if (!riscv_update_subset_version (rps, march, subset,
> +                                           major_version,
> +                                           minor_version,
> +                                           use_default_version))
> +           return NULL;
> +         continue;
> +       }
>
> -      riscv_add_subset (rps->subset_list, subset, major_version, minor_version);
> +      /* Find the default version if needed.  */
> +      if (use_default_version)
> +       rps->get_default_version (subset,
> +                                 isa_spec_name,
> +                                 &major_version,
> +                                 &minor_version);
> +      riscv_add_subset (rps->subset_list, subset, major_version, minor_version,
> +                       use_default_version);
>      }
>    return p;
>  }
> @@ -1272,21 +1386,28 @@ typedef struct riscv_parse_config
>  } riscv_parse_config_t;
>
>  /* Parse a generic prefixed extension.
> -   march: The full architecture string as passed in by "-march=...".
> -   p: Point from which to start parsing the -march string.
> -   config: What class of extensions to parse, predicate funcs,
> -   and strings to use in error reporting.  */
> +   `march`: The full architecture string as passed in by "-march=...".
> +   `p`: Point from which to start parsing the -march string.
> +   `config`: What class of extensions to parse, predicate funcs,
> +   and strings to use in error reporting.
> +   `isa_spec_name`: ISA spec name.  We set the default ISA versions
> +   according to it.
> +   `update_version`: True if the -mriscv-isa-version is set, and we need
> +   update the version for the existing extensions.  */
>
>  static const char *
>  riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>                           const char *march,
>                           const char *p,
> -                         const riscv_parse_config_t *config)
> +                         const riscv_parse_config_t *config,
> +                         const char *isa_spec_name,
> +                         bfd_boolean update_version)
>  {
>    unsigned major_version = 0;
>    unsigned minor_version = 0;
>    const char *last_name;
>    riscv_isa_ext_class_t class;
> +  bfd_boolean use_default_version;
>
>    while (*p)
>      {
> @@ -1309,15 +1430,11 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>        while (*++q != '\0' && *q != '_' && !ISDIGIT (*q))
>         ;
>
> +      use_default_version = FALSE;
>        end_of_version =
> -       riscv_parsing_subset_version (
> -         rps,
> -         march,
> -         q, &major_version, &minor_version,
> -         /* default_major_version= */ 2,
> -         /* default_minor_version= */ 0,
> -         /* std_ext_p= */FALSE);
> -
> +       riscv_parsing_subset_version (rps, march, q, &major_version,
> +                                     &minor_version, FALSE,
> +                                     &use_default_version);
>        *q = '\0';
>
>        /* Check that the name is valid.
> @@ -1335,10 +1452,11 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>           return NULL;
>         }
>
> -      /* Check that the last item is not the same as this.  */
> +      /* Check that the last item is not the same as this.  Just skip this
> +        check when updating the version.  */
>        last_name = rps->subset_list->tail->name;
> -
> -      if (!strcasecmp (last_name, subset))
> +      if (!update_version
> +         && !strcasecmp (last_name, subset))
>         {
>           rps->error_handler ("-march=%s: Duplicate %s ISA extension: \'%s\'",
>                               march, config->prefix, subset);
> @@ -1357,7 +1475,30 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>           return NULL;
>         }
>
> -      riscv_add_subset (rps->subset_list, subset, major_version, minor_version);
> +      if (update_version)
> +       {
> +         /* Update the version for exsiting extension.  */
> +         if (!riscv_update_subset_version (rps, march, subset,
> +                                           major_version,
> +                                           minor_version,
> +                                           use_default_version))
> +           {
> +             free (subset);
> +             return NULL;
> +           }
> +       }
> +      else
> +       {
> +         /* Find the default version if needed.  */
> +         if (use_default_version)
> +           rps->get_default_version (subset,
> +                                     isa_spec_name,
> +                                     &major_version,
> +                                     &minor_version);
> +         riscv_add_subset (rps->subset_list, subset, major_version,
> +                           minor_version, use_default_version);
> +       }
> +
>        free (subset);
>        p += end_of_version - subset;
>
> @@ -1384,7 +1525,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>
>  static const char * const riscv_std_z_ext_strtab[] =
>    {
> -    NULL
> +    "zicsr", NULL
>    };
>
>  /* Same as `riscv_std_z_ext_strtab', but for S-class extensions.  */
> @@ -1457,11 +1598,17 @@ static const riscv_parse_config_t parse_config[] =
>
>     Arguments:
>       `rps`: Hooks and status for parsing subset.
> -     `arch`: Arch string.  */
> +     `arch`: Arch string.
> +     `isa_spec_name`: The ISA spec name.   We set the default ISA versions
> +     according to it.
> +     `update_version`: True if the -mriscv-isa-version is set, and we need
> +     update the version for the existing extensions.  */
>
>  bfd_boolean
>  riscv_parse_subset (riscv_parse_subset_t *rps,
> -                   const char *arch)
> +                   const char *arch,
> +                   const char *isa_spec_name,
> +                   bfd_boolean update_version)
>  {
>    const char *p = arch;
>    size_t i;
> @@ -1476,15 +1623,17 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
>        *rps->xlen = 64;
>        p += 4;
>      }
> -  else
> +  else if (!update_version)
>      {
> +      /* The string set by -mriscv-isa-version doesn't have to start
> +        with rv32/rv64.  */
>        rps->error_handler ("-march=%s: ISA string must begin with rv32 or rv64",
>                           arch);
>        return FALSE;
>      }
>
>    /* Parsing standard extension.  */
> -  p = riscv_parse_std_ext (rps, arch, p);
> +  p = riscv_parse_std_ext (rps, arch, p, isa_spec_name, update_version);
>
>    if (p == NULL)
>      return FALSE;
> @@ -1492,7 +1641,8 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
>    /* Parse the different classes of extensions in the specified order.  */
>
>    for (i = 0; i < ARRAY_SIZE (parse_config); ++i) {
> -    p = riscv_parse_prefixed_ext (rps, arch, p, &parse_config[i]);
> +    p = riscv_parse_prefixed_ext (rps, arch, p, &parse_config[i],
> +                                 isa_spec_name, update_version);
>
>      if (p == NULL)
>        return FALSE;
> @@ -1543,7 +1693,8 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
>  void
>  riscv_add_subset (riscv_subset_list_t *subset_list,
>                   const char *subset,
> -                 int major, int minor)
> +                 int major, int minor,
> +                 bfd_boolean use_default_version)
>  {
>    riscv_subset_t *s = xmalloc (sizeof *s);
>
> @@ -1553,6 +1704,9 @@ riscv_add_subset (riscv_subset_list_t *subset_list,
>    s->name = xstrdup (subset);
>    s->major_version = major;
>    s->minor_version = minor;
> +  /* Record whether the default version is used.  The -mriscv-isa-version
> +     only update the ISA which use the default version.  */
> +  s->use_default_version = use_default_version;
>    s->next = NULL;
>
>    if (subset_list->tail != NULL)
> diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h
> index 76ee274..e3d5177 100644
> --- a/bfd/elfxx-riscv.h
> +++ b/bfd/elfxx-riscv.h
> @@ -40,6 +40,7 @@ struct riscv_subset_t
>    const char *name;
>    int major_version;
>    int minor_version;
> +  bfd_boolean use_default_version;
>    struct riscv_subset_t *next;
>  };
>
> @@ -56,7 +57,8 @@ riscv_release_subset_list (riscv_subset_list_t *);
>  extern void
>  riscv_add_subset (riscv_subset_list_t *,
>                   const char *,
> -                 int, int);
> +                 int, int,
> +                 bfd_boolean);
>
>  extern riscv_subset_t *
>  riscv_lookup_subset (const riscv_subset_list_t *,
> @@ -72,11 +74,17 @@ typedef struct {
>    void (*error_handler) (const char *,
>                          ...) ATTRIBUTE_PRINTF_1;
>    unsigned *xlen;
> +  void (*get_default_version) (const char *,
> +                              const char *,
> +                              unsigned int *,
> +                              unsigned int *);
>  } riscv_parse_subset_t;
>
>  extern bfd_boolean
>  riscv_parse_subset (riscv_parse_subset_t *,
> -                   const char *);
> +                   const char *,
> +                   const char *,
> +                   bfd_boolean);
>
>  extern const char *
>  riscv_supported_std_ext (void);
> diff --git a/gas/config.in b/gas/config.in
> index 8724eb1..935bd9b 100644
> --- a/gas/config.in
> +++ b/gas/config.in
> @@ -30,6 +30,9 @@
>  /* Default architecture. */
>  #undef DEFAULT_ARCH
>
> +/* Define default value for -march */
> +#undef DEFAULT_ARCH_WITH_EXT
> +
>  /* Default CRIS architecture. */
>  #undef DEFAULT_CRIS_ARCH
>
> @@ -50,12 +53,18 @@
>  /* Define to 1 if you want to generate x86 relax relocations by default. */
>  #undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS
>
> +/* Define default value for -misa-spec */
> +#undef DEFAULT_ISA_SPEC
> +
>  /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
>  #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
>
>  /* Define to 1 if you want to generate RISC-V arch attribute by default. */
>  #undef DEFAULT_RISCV_ATTR
>
> +/* Define default isa version which are not covered by --with-isa-spec */
> +#undef DEFAULT_RISCV_ISA_VERSION
> +
>  /* Define to 1 if you want to generate GNU x86 used ISA and feature properties
>     by default. */
>  #undef DEFAULT_X86_USED_NOTE
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 168561e..bfcf2f0 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -63,7 +63,22 @@ struct riscv_cl_insn
>  #define DEFAULT_RISCV_ATTR 0
>  #endif
>
> +#ifndef DEFAULT_ARCH_WITH_EXT
> +#define DEFAULT_ARCH_WITH_EXT NULL
> +#endif
> +
> +#ifndef DEFAULT_ISA_SPEC
> +#define DEFAULT_ISA_SPEC "2p2"
> +#endif
> +
> +#ifndef DEFAULT_RISCV_ISA_VERSION
> +#define DEFAULT_RISCV_ISA_VERSION NULL
> +#endif
> +
>  static const char default_arch[] = DEFAULT_ARCH;
> +static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
> +static const char *default_isa_spec = DEFAULT_ISA_SPEC;
> +static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
>
>  static unsigned xlen = 0; /* width of an x-register */
>  static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
> @@ -147,18 +162,87 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
>      }
>  }
>
> +/* Handle of the extension with version hash table.  */
> +static struct hash_control *ext_version_hash = NULL;
> +
> +static struct hash_control *
> +init_ext_version_hash (const struct riscv_ext_version *table)
> +{
> +  int i = 0;
> +  struct hash_control *hash = hash_new ();
> +
> +  while (table[i].name)
> +    {
> +      const char *name = table[i].name;
> +      const char *hash_error =
> +       hash_insert (hash, name, (void *) &table[i]);
> +
> +      if (hash_error != NULL)
> +       {
> +         fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> +                  table[i].name, hash_error);
> +         /* Probably a memory allocation problem?  Give up now.  */
> +         as_fatal (_("Broken assembler.  No assembly attempted."));
> +         return NULL;
> +       }
> +
> +      i++;
> +      while (table[i].name
> +            && strcmp (table[i].name, name) == 0)
> +       i++;
> +    }
> +
> +  return hash;
> +}
> +
> +static void
> +riscv_get_default_ext_version (const char *name,
> +                              const char *spec_name,
> +                              unsigned int *major_version,
> +                              unsigned int *minor_version)
> +{
> +  struct riscv_ext_version *ext;
> +
> +  *major_version = 0;
> +  *minor_version = 0;
> +
> +  if (name == NULL
> +      || spec_name == NULL)
> +    return;
> +
> +  ext = (struct riscv_ext_version *) hash_find (ext_version_hash, name);
> +  while (ext
> +        && ext->name
> +        && strcmp (ext->name, name) == 0)
> +    {
> +      if (ext->spec_name
> +         && strcmp (ext->spec_name, spec_name) == 0)
> +       {
> +         *major_version = ext->major_version;
> +         *minor_version = ext->minor_version;
> +         return;
> +       }
> +      ext++;
> +    }
> +}
> +
>  /* Set which ISA and extensions are available.  */
>
>  static void
> -riscv_set_arch (const char *s)
> +riscv_set_arch (const char *s, bfd_boolean update_version)
>  {
>    riscv_parse_subset_t rps;
>    rps.subset_list = &riscv_subsets;
>    rps.error_handler = as_fatal;
>    rps.xlen = &xlen;
> +  rps.get_default_version = riscv_get_default_ext_version;
>
> -  riscv_release_subset_list (&riscv_subsets);
> -  riscv_parse_subset (&rps, s);
> +  if (s == NULL)
> +    return;
> +
> +  if (!update_version)
> +    riscv_release_subset_list (&riscv_subsets);
> +  riscv_parse_subset (&rps, s, default_isa_spec, update_version);
>  }
>
>  /* Handle of the OPCODE hash table.  */
> @@ -2348,6 +2432,8 @@ enum options
>    OPTION_NO_ARCH_ATTR,
>    OPTION_CSR_CHECK,
>    OPTION_NO_CSR_CHECK,
> +  OPTION_MISA_SPEC,
> +  OPTION_MRISCV_ISA_VERSION,
>    OPTION_END_OF_ENUM
>  };
>
> @@ -2364,6 +2450,8 @@ struct option md_longopts[] =
>    {"mno-arch-attr", no_argument, NULL, OPTION_NO_ARCH_ATTR},
>    {"mcsr-check", no_argument, NULL, OPTION_CSR_CHECK},
>    {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
> +  {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
> +  {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
>
>    {NULL, no_argument, NULL, 0}
>  };
> @@ -2392,7 +2480,9 @@ md_parse_option (int c, const char *arg)
>    switch (c)
>      {
>      case OPTION_MARCH:
> -      riscv_set_arch (arg);
> +      /* riscv_after_parse_args will call riscv_set_arch to parse
> +        the architecture.  */
> +      default_arch_with_ext = arg;
>        break;
>
>      case OPTION_NO_PIC:
> @@ -2450,6 +2540,14 @@ md_parse_option (int c, const char *arg)
>        riscv_opts.csr_check = FALSE;
>        break;
>
> +    case OPTION_MISA_SPEC:
> +      default_isa_spec = arg;
> +      break;
> +
> +    case OPTION_MRISCV_ISA_VERSION:
> +      default_riscv_isa_version = arg;
> +      break;
> +
>      default:
>        return 0;
>      }
> @@ -2460,6 +2558,13 @@ md_parse_option (int c, const char *arg)
>  void
>  riscv_after_parse_args (void)
>  {
> +  /* Initialize the hash table for extensions with default version.  */
> +  ext_version_hash = init_ext_version_hash (riscv_ext_version_table);
> +
> +  /* The --with-arch is optional for now, so we have to set the xlen
> +     according to the default_arch, which is set by the --targte, first.
> +     Then, we use the xlen to set the default_arch_with_ext if the
> +     -march and --with-arch are not set.  */
>    if (xlen == 0)
>      {
>        if (strcmp (default_arch, "riscv32") == 0)
> @@ -2469,9 +2574,15 @@ riscv_after_parse_args (void)
>        else
>         as_bad ("unknown default architecture `%s'", default_arch);
>      }
> +  if (default_arch_with_ext == NULL)
> +    default_arch_with_ext = xlen == 64 ? "rv64g" : "rv32g";
> +
> +  /* Set the architecture according to -march or --with-arch.  */
> +  riscv_set_arch (default_arch_with_ext, FALSE);
>
> -  if (riscv_subsets.head == NULL)
> -    riscv_set_arch (xlen == 64 ? "rv64g" : "rv32g");
> +  /* Update the version info according to -mriscv-isa-spec or
> +     --with-riscv-isa-spec.  */
> +  riscv_set_arch (default_riscv_isa_version, TRUE);
>
>    /* Add the RVC extension, regardless of -march, to support .option rvc.  */
>    riscv_set_rvc (FALSE);
> @@ -3366,7 +3477,7 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
>        obj_attribute *attr;
>        attr = elf_known_obj_attributes_proc (stdoutput);
>        if (!start_assemble)
> -       riscv_set_arch (attr[Tag_RISCV_arch].s);
> +       riscv_set_arch (attr[Tag_RISCV_arch].s, FALSE);
>        else
>         as_fatal (_(".attribute arch must set before any instructions"));
>
> @@ -3379,6 +3490,9 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
>           if (! bfd_set_arch_mach (stdoutput, bfd_arch_riscv, mach))
>             as_warn (_("Could not set architecture and machine"));
>         }
> +
> +      /* We also need to update the version of ISA here.  */
> +      riscv_set_arch (default_riscv_isa_version, TRUE);
>      }
>  }
>
> diff --git a/gas/configure b/gas/configure
> index 1515787..bce847a 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -13009,7 +13009,7 @@ $as_echo "#define NDS32_DEFAULT_ZOL_EXT 1" >>confdefs.h
>  $as_echo "$enable_zol_ext" >&6; }
>         ;;
>
> -      aarch64 | i386 | riscv | s390 | sparc)
> +      aarch64 | i386 | s390 | sparc)
>         if test $this_target = $target ; then
>
>  cat >>confdefs.h <<_ACEOF
> @@ -13019,6 +13019,57 @@ _ACEOF
>         fi
>         ;;
>
> +      riscv)
> +       # --target=riscv[32|64]-*-*.  */
> +       if test $this_target = $target ; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_ARCH "${arch}"
> +_ACEOF
> +
> +       fi
> +
> +       # --with-arch=<value>.  The syntax of <value> is same as Gas option -march.
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
> +$as_echo_n "checking for default configuration of --with-arch... " >&6; }
> +       if test "x${with_arch}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_ARCH_WITH_EXT "$with_arch"
> +_ACEOF
> +
> +       fi
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
> +$as_echo "$with_arch" >&6; }
> +
> +       # --with-isa-spec=[2p0|2p1|2p2|20190608|20191213].
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-isa-spec" >&5
> +$as_echo_n "checking for default configuration of --with-isa-spec... " >&6; }
> +       if test "x${with_isa_spec}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_ISA_SPEC "$with_isa_spec"
> +_ACEOF
> +
> +       fi
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_isa_spec" >&5
> +$as_echo "$with_isa_spec" >&6; }
> +
> +       # --with-riscv-isa-version=<value>.  The syntax of <value> is same as Gas
> +       # -march, but without the rv[32|64] prefix.
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-riscv-isa-version" >&5
> +$as_echo_n "checking for default configuration of --with-riscv-isa-version... " >&6; }
> +       if test "x${with_riscv_isa_version}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_RISCV_ISA_VERSION "$with_riscv_isa_version"
> +_ACEOF
> +
> +       fi
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
> +$as_echo "$with_riscv_isa_version" >&6; }
> +       ;;
> +
>        rl78)
>         f=rl78-parse.o
>         case " $extra_objects " in
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 6f32e55..be4ba20 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -569,12 +569,45 @@ changequote([,])dnl
>         AC_MSG_RESULT($enable_zol_ext)
>         ;;
>
> -      aarch64 | i386 | riscv | s390 | sparc)
> +      aarch64 | i386 | s390 | sparc)
>         if test $this_target = $target ; then
>           AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
>         fi
>         ;;
>
> +      riscv)
> +       # --target=riscv[32|64]-*-*.  */
> +       if test $this_target = $target ; then
> +         AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
> +       fi
> +
> +       # --with-arch=<value>.  The syntax of <value> is same as Gas option -march.
> +       AC_MSG_CHECKING(for default configuration of --with-arch)
> +       if test "x${with_arch}" != x; then
> +         AC_DEFINE_UNQUOTED(DEFAULT_ARCH_WITH_EXT, "$with_arch",
> +                            [Define default value for -march])
> +       fi
> +       AC_MSG_RESULT($with_arch)
> +
> +       # --with-isa-spec=[2p0|2p1|2p2|20190608|20191213].
> +       AC_MSG_CHECKING(for default configuration of --with-isa-spec)
> +       if test "x${with_isa_spec}" != x; then
> +         AC_DEFINE_UNQUOTED(DEFAULT_ISA_SPEC, "$with_isa_spec",
> +                            [Define default value for -misa-spec])
> +       fi
> +       AC_MSG_RESULT($with_isa_spec)
> +
> +       # --with-riscv-isa-version=<value>.  The syntax of <value> is same as Gas
> +       # -march, but without the rv[32|64] prefix.
> +       AC_MSG_CHECKING(for default configuration of --with-riscv-isa-version)
> +       if test "x${with_riscv_isa_version}" != x; then
> +         AC_DEFINE_UNQUOTED(DEFAULT_RISCV_ISA_VERSION, "$with_riscv_isa_version",
> +                            [Define default isa version which are not
> +                             covered by --with-isa-spec])
> +       fi
> +       AC_MSG_RESULT($with_riscv_isa_version)
> +       ;;
> +
>        rl78)
>         f=rl78-parse.o
>         case " $extra_objects " in
> diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
> index e22773e..3f9e841 100644
> --- a/gas/testsuite/gas/riscv/attribute-01.d
> +++ b/gas/testsuite/gas/riscv/attribute-01.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv32g -march-attr
> +#as: -march=rv32g -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: empty.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
> index bc3295b..a58248e 100644
> --- a/gas/testsuite/gas/riscv/attribute-02.d
> +++ b/gas/testsuite/gas/riscv/attribute-02.d
> @@ -1,6 +1,6 @@
> -#as: -march=rv32gxargle -march-attr
> +#as: -march=rv32gxargle -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: empty.s
>  Attribute Section: riscv
>  File Attributes
> -  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0"
> +  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
> index 78b706a..04b9ab5 100644
> --- a/gas/testsuite/gas/riscv/attribute-03.d
> +++ b/gas/testsuite/gas/riscv/attribute-03.d
> @@ -1,6 +1,6 @@
> -#as: -march=rv32gxargle_xfoo -march-attr
> +#as: -march=rv32gxargle_xfoo -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: empty.s
>  Attribute Section: riscv
>  File Attributes
> -  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0_xfoo2p0"
> +  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0_xfoo0p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
> index c97bf03..8a3f51b 100644
> --- a/gas/testsuite/gas/riscv/attribute-04.d
> +++ b/gas/testsuite/gas/riscv/attribute-04.d
> @@ -1,4 +1,4 @@
> -#as: -march-attr
> +#as: -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-04.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
> index f9b65f2..3309ff3 100644
> --- a/gas/testsuite/gas/riscv/attribute-05.d
> +++ b/gas/testsuite/gas/riscv/attribute-05.d
> @@ -1,4 +1,4 @@
> -#as: -march-attr
> +#as: -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-05.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-06.d b/gas/testsuite/gas/riscv/attribute-06.d
> index 1abeb47..5c8a5c6 100644
> --- a/gas/testsuite/gas/riscv/attribute-06.d
> +++ b/gas/testsuite/gas/riscv/attribute-06.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv32g2p0 -march-attr
> +#as: -march=rv32g2p1 -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-06.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-07.d b/gas/testsuite/gas/riscv/attribute-07.d
> index dfd7e6b..20ac9be 100644
> --- a/gas/testsuite/gas/riscv/attribute-07.d
> +++ b/gas/testsuite/gas/riscv/attribute-07.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv64g2p0 -march-attr
> +#as: -march=rv64g2p1 -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-07.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-08.d b/gas/testsuite/gas/riscv/attribute-08.d
> index c10ac0c..7f580d3 100644
> --- a/gas/testsuite/gas/riscv/attribute-08.d
> +++ b/gas/testsuite/gas/riscv/attribute-08.d
> @@ -1,4 +1,4 @@
> -#as: -march-attr
> +#as: -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-08.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-09.d b/gas/testsuite/gas/riscv/attribute-09.d
> new file mode 100644
> index 0000000..77c7ef3
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-09.d
> @@ -0,0 +1,6 @@
> +#as: -march-attr -misa-spec=2p2 -mriscv-isa-version=i2p1a2p1v0p9
> +#readelf: -A
> +#source: attribute-09.s
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-09.s b/gas/testsuite/gas/riscv/attribute-09.s
> new file mode 100644
> index 0000000..0b1b16c
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-09.s
> @@ -0,0 +1 @@
> +       .attribute arch, "rv32i1p9fv_zicsr"
> diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
> new file mode 100644
> index 0000000..9c72035
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-10.d
> @@ -0,0 +1,6 @@
> +#as: -march-attr -march=rv32i_zicsr -misa-spec=20191213
> +#readelf: -A
> +#source: empty.s
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: "rv32i2p1_zicsr2p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-11.d b/gas/testsuite/gas/riscv/attribute-11.d
> new file mode 100644
> index 0000000..bc7f986
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-11.d
> @@ -0,0 +1,6 @@
> +#as: -march-attr -march=rv32i_zicsr -misa-spec=20191213 -mriscv-isa-version=zicsr2p1
> +#readelf: -A
> +#source: empty.s
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: "rv32i2p1_zicsr2p1"
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index ac6e861..f8b0de3 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -343,6 +343,16 @@ struct riscv_opcode
>    unsigned long pinfo;
>  };
>
> +/* This structure holds version information for specific ISA.  */
> +
> +struct riscv_ext_version
> +{
> +  const char *name;
> +  const char *spec_name;
> +  unsigned int major_version;
> +  unsigned int minor_version;
> +};
> +
>  /* Instruction is a simple alias (e.g. "mv" for "addi").  */
>  #define        INSN_ALIAS              0x00000001
>
> @@ -420,5 +430,6 @@ extern const char * const riscv_fpr_names_abi[NFPR];
>
>  extern const struct riscv_opcode riscv_opcodes[];
>  extern const struct riscv_opcode riscv_insn_types[];
> +extern const struct riscv_ext_version riscv_ext_version_table[];
>
>  #endif /* _RISCV_H_ */
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index ceedcaf..7b885bf 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -884,3 +884,56 @@ const struct riscv_opcode riscv_insn_types[] =
>  /* Terminate the list.  */
>  {0, 0, INSN_CLASS_NONE, 0, 0, 0, 0, 0}
>  };
> +
> +const struct riscv_ext_version riscv_ext_version_table[] =
> +{
> +/* name, spec name,  major,  minor.  */
> +{"e",    "20191213",      1,     9},
> +{"e",    "20190608",      1,     9},
> +{"e",    "2p2",           1,     9},
> +
> +{"i",    "20191213",      2,     1},
> +{"i",    "20190608",      2,     1},
> +{"i",    "2p2",           2,     0},
> +
> +{"m",    "20191213",      2,     0},
> +{"m",    "20190608",      2,     0},
> +{"m",    "2p2",           2,     0},
> +
> +{"a",    "20191213",      2,     1},
> +{"a",    "20190608",      2,     0},
> +{"a",    "2p2",           2,     0},
> +
> +{"f",    "20191213",      2,     2},
> +{"f",    "20190608",      2,     2},
> +{"f",    "2p2",           2,     0},
> +
> +{"d",    "20191213",      2,     2},
> +{"d",    "20190608",      2,     2},
> +{"d",    "2p2",           2,     0},
> +
> +{"q",    "20191213",      2,     2},
> +{"q",    "20190608",      2,     2},
> +{"q",    "2p2",           2,     0},
> +
> +{"c",    "20191213",      2,     0},
> +{"c",    "20190608",      2,     0},
> +{"c",    "2p2",           2,     0},
> +
> +{"p",    "20191213",      0,     2},
> +{"p",    "20190608",      0,     2},
> +{"p",    "2p2",           0,     1},
> +
> +{"v",    "20191213",      0,     7},
> +{"v",    "20190608",      0,     7},
> +{"v",    "2p2",           0,     7},
> +
> +{"n",    "20190608",      1,     1},
> +{"n",    "2p2",           1,     1},
> +
> +{"zicsr","20191213",      2,     0},
> +{"zicsr","20190608",      2,     0},
> +
> +/* Terminate the list.  */
> +{NULL, NULL, 0, 0}
> +};
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version.
  2020-04-18 11:07 ` [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version Nelson Chu
@ 2020-04-18 11:18   ` Nelson Chu
  2020-04-24 10:21   ` Andrew Burgess
  1 sibling, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:18 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> Support new gas option -mpriv-spec and configure option --with-priv-spec. You
> can use these options to choose the privilege spec version, and then assembler
> will generates the correct CSR address.  If the obselete CSR name is used, then
> report the warning message when the -mcsr-check is set, and use the latest
> defined address for the CSR (Since we build hash table by the DECLARE_CSR first,
> and then use the DECLARE_CSR_ALIAS).  Maybe we can insert the CSR hash entries
> in version's order, then we probably don't need the DECLARE_CSR_ALIAS any more.
>
> New Assembler Options,
>
> * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
> This is used to set the privileged spec’s version, and we can decide whether
> the CSR is valid or not.
>
> New Default Configure Options,
>
> * --with-priv-spec = [1p9|1p9p1|1p10|1p11]
> The syntax is same as -mpriv-spec option.  Assembler will check this setting
> if -mpriv-spec option isn’t set.
>
>         gas/
>         * config/tc-riscv.c (DEFAULT_PRIV_SPEC): Default configure option.
>         You can set it by new configure option --with-priv-spec.
>         (enum riscv_csr_vclass default_priv_spec): You can set gas option
>         -mpriv-spec or --with-priv-spec, and then assembler will call
>         riscv_set_default_priv_version to set the default_priv_spec.
>         (riscv_set_default_priv_version): New function.  Set the
>         default_priv_spec.  Return 0 if the input privilege name isn't
>         supported.  Otherwise, return 1.
>
>         (struct riscv_csr_extra): Add new fields to store more information about
>         the CSR.  We use these information to find the suitable CSR address when
>         user choosing a specific privilege version.
>         (enum reg_class): We now get the CSR address from csr_extra_hash rather
>         than reg_names_hash.  Therefore, move RCLASS_CSR behind RCLASS_MAX.
>         (riscv_init_csr_hashes): Only need to initialize one hash table
>         csr_extra_hash.
>         (riscv_csr_class_check): Change the return type to void.  Don't check
>         the ISA dependency if -mcsr-check isn't set.
>         (riscv_csr_version_check): New function.  Check and find the CSR address
>         from csr_extra_hash, according to default_priv_spec.  Report warning
>         for the invalid CSR if -mcsr-check is set.
>         (reg_csr_lookup_internal): Updated.
>         (reg_lookup_internal): Likewise.
>         (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
>
>         (enum options, struct option md_longopts): Add new gas option -mpriv-spec.
>         (md_parse_option): Call riscv_set_default_priv_version to set
>         default_priv_spec.
>         (riscv_after_parse_args): If -mpriv-spec isn't set, then call
>         riscv_set_default_priv_version with DEFAULT_PRIV_SPEC to set the default
>         privilege verison.
>
>         * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
>         to check the ISA dependency for CSR, so fix the version by adding
>         -mpriv-spec=1p11.
>         * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.  There are some
>         version warnings for the test case.
>         * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
>         Check whether the CSR is valid when privilege version 1.9 is choosed.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
>         Check whether the CSR is valid when privilege version 1.9.1 is choosed.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
>         Check whether the CSR is valid when privilege version 1.10 is choosed.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
>         Check whether the CSR is valid when privilege version 1.11 is choosed.
>         * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
>
>         * configure.ac: Add new configure option --with-priv-spec.
>         * configure: Regenerated.
>         * config.in: Regenerated.
>
>         include/
>         * opcode/riscv-opc.h (DECLARE_CSR): Store two version information,
>         define_version and abort_version for the CSR, which is valid in the
>         current privilege spec.  The define_version means which privilege spec
>         started to define the CSR, and the abort_version means which privilege
>         spec started to abort the CSR.  If the CSR is valid for the newest spec,
>         then the abort_version is set to CSR_CLASS_VDRAFT.
>         (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
>         * opcode/riscv.h: Include "bfd.h" to define bfd_boolean type.
>         (enum riscv_csr_vclass): New enum classes.  Define the current supported
>         privilege versions.
>
>         opcodes/
>         * riscv-opc.c (struct priv_version_t): New structure.
>         (struct priv_version_t priv_versions): Store the supported privilege
>         versions' classes and their corresponding version string.
>         (riscv_get_priv_version_class): New function.  Get the corresponding
>         CSR version class by giving a privilege version string.
>         (riscv_get_priv_version_name): New function.  Get the corresponding
>         privilege version string by giving a CSR version class.
>
>         * riscv-dis.c: Updated since DECLARE_CSR is changed.
>
>         gdb/
>         * riscv-tdep.c: Updated since DECLARE_CSR is changed.
>         * riscv-tdep.h: Likewise.
>
>         binutils/
>         * dwarf.c: Updated since DECLARE_CSR is changed.
> ---
>  binutils/dwarf.c                                   |   3 +-
>  gas/config.in                                      |   3 +
>  gas/config/tc-riscv.c                              | 213 +++++++--
>  gas/configure                                      |  13 +
>  gas/configure.ac                                   |   8 +
>  gas/testsuite/gas/riscv/priv-reg-fail-fext.d       |   2 +-
>  gas/testsuite/gas/riscv/priv-reg-fail-fext.l       |  25 +
>  .../gas/riscv/priv-reg-fail-read-only-01.d         |   2 +-
>  .../gas/riscv/priv-reg-fail-read-only-01.l         |  25 +
>  gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d  |   2 +-
>  gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l  |  25 +
>  .../gas/riscv/priv-reg-fail-version-1p10.d         |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p10.l         |  27 ++
>  .../gas/riscv/priv-reg-fail-version-1p11.d         |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p11.l         |  25 +
>  .../gas/riscv/priv-reg-fail-version-1p9.d          |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p9.l          |  30 ++
>  .../gas/riscv/priv-reg-fail-version-1p9p1.d        |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p9p1.l        |  30 ++
>  gdb/riscv-tdep.c                                   |   6 +-
>  gdb/riscv-tdep.h                                   |   2 +-
>  include/opcode/riscv-opc.h                         | 509 ++++++++++-----------
>  include/opcode/riscv.h                             |  19 +
>  opcodes/riscv-dis.c                                |   3 +-
>  opcodes/riscv-opc.c                                |  55 +++
>  25 files changed, 728 insertions(+), 311 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
>
> diff --git a/binutils/dwarf.c b/binutils/dwarf.c
> index c75059b..a972c60 100644
> --- a/binutils/dwarf.c
> +++ b/binutils/dwarf.c
> @@ -7378,7 +7378,8 @@ regname_internal_riscv (unsigned int regno)
>          document.  */
>        switch (regno)
>         {
> -#define DECLARE_CSR(NAME,VALUE,CLASS) case VALUE + 4096: name = #NAME; break;
> +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
> +  case VALUE + 4096: name = #NAME; break;
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>
> diff --git a/gas/config.in b/gas/config.in
> index 935bd9b..093f474 100644
> --- a/gas/config.in
> +++ b/gas/config.in
> @@ -59,6 +59,9 @@
>  /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
>  #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
>
> +/* Define default value for -mpriv-spec */
> +#undef DEFAULT_PRIV_SPEC
> +
>  /* Define to 1 if you want to generate RISC-V arch attribute by default. */
>  #undef DEFAULT_RISCV_ATTR
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index bfcf2f0..6528a03 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -75,10 +75,15 @@ struct riscv_cl_insn
>  #define DEFAULT_RISCV_ISA_VERSION NULL
>  #endif
>
> +#ifndef DEFAULT_PRIV_SPEC
> +#define DEFAULT_PRIV_SPEC "1p11"
> +#endif
> +
>  static const char default_arch[] = DEFAULT_ARCH;
>  static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
>  static const char *default_isa_spec = DEFAULT_ISA_SPEC;
>  static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
> +static enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
>
>  static unsigned xlen = 0; /* width of an x-register */
>  static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
> @@ -536,8 +541,9 @@ enum reg_class
>  {
>    RCLASS_GPR,
>    RCLASS_FPR,
> -  RCLASS_CSR,
> -  RCLASS_MAX
> +  RCLASS_MAX,
> +
> +  RCLASS_CSR
>  };
>
>  static struct hash_control *reg_names_hash = NULL;
> @@ -585,84 +591,197 @@ struct riscv_csr_extra
>    /* Class to which this CSR belongs.  Used to decide whether or
>       not this CSR is legal in the current -march context.  */
>    enum riscv_csr_class csr_class;
> +
> +  /* CSR may have differnet numbers in the previous priv spec.  */
> +  unsigned address;
> +
> +  /* Record the CSR is defined/valid in which versions.  */
> +  enum riscv_csr_vclass define_version;
> +
> +  /* Record the CSR is aborted/invalid from which versions.  If it isn't
> +     aborted in the current version, then it should be CSR_CLASS_VDRAFT.  */
> +  enum riscv_csr_vclass abort_version;
> +
> +  /* The CSR may have more than one setting.  */
> +  struct riscv_csr_extra *next;
>  };
>
> -/* Init two hashes, csr_extra_hash and reg_names_hash, for CSR.  */
> +/* Set the default_priv_spec, assembler will find the suitable CSR address
> +   according to default_priv_spec.  Return 0 if the input priv name isn't
> +   supported.  Otherwise, return 1.  */
>
> -static void
> -riscv_init_csr_hashes (const char *name,
> -                      unsigned address,
> -                      enum riscv_csr_class class)
> +static int
> +riscv_set_default_priv_version (const char *s)
>  {
> -  struct riscv_csr_extra *entry = XNEW (struct riscv_csr_extra);
> -  entry->csr_class = class;
> +  enum riscv_csr_vclass class;
> +  if (!riscv_get_priv_version_class (s, &class))
> +    {
> +      as_bad (_("Unsupported RISC-V privilege version set by "
> +               "-mpriv-spec=%s."), s);
> +      return 0;
> +    }
> +  else
> +    default_priv_spec = class;
> +  return 1;
> +}
> +
> +/* Init hash table csr_extra_hash to handle CSR.  */
>
> -  const char *hash_error =
> -    hash_insert (csr_extra_hash, name, (void *) entry);
> -  if (hash_error != NULL)
> +static void
> +riscv_init_csr_hash (const char *name,
> +                    unsigned address,
> +                    enum riscv_csr_class class,
> +                    enum riscv_csr_vclass define_version,
> +                    enum riscv_csr_vclass abort_version)
> +{
> +  struct riscv_csr_extra *entry, *pre_entry;
> +  const char *hash_error = NULL;
> +  bfd_boolean need_enrty = TRUE;
> +
> +  pre_entry = NULL;
> +  entry = (struct riscv_csr_extra *) hash_find (csr_extra_hash, name);
> +  while (need_enrty && entry != NULL)
>      {
> -      fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> -                     name, hash_error);
> -      /* Probably a memory allocation problem?  Give up now.  */
> -       as_fatal (_("Broken assembler.  No assembly attempted."));
> +      if (entry->csr_class == class
> +         && entry->address == address
> +         && entry->define_version == define_version
> +         && entry->abort_version == abort_version)
> +       need_enrty = FALSE;
> +      pre_entry = entry;
> +      entry = entry->next;
>      }
>
> -  hash_reg_name (RCLASS_CSR, name, address);
> +  /* Duplicate setting for the CSR, just return and do nothing.  */
> +  if (!need_enrty)
> +    return;
> +
> +  entry = XNEW (struct riscv_csr_extra);
> +  entry->csr_class = class;
> +  entry->address = address;
> +  entry->define_version = define_version;
> +  entry->abort_version = abort_version;
> +
> +  /* If the CSR hasn't been inserted in the hash table, then insert it.
> +     Otherwise, attach the extra information to the entry which is already
> +     in the hash table.  */
> +  if (pre_entry == NULL)
> +    {
> +      hash_error = hash_insert (csr_extra_hash, name, (void *) entry);
> +      if (hash_error != NULL)
> +       {
> +         fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> +                  name, hash_error);
> +         /* Probably a memory allocation problem?  Give up now.  */
> +         as_fatal (_("Broken assembler.  No assembly attempted."));
> +       }
> +    }
> +  else
> +    pre_entry->next = entry;
>  }
>
>  /* Check wether the CSR is valid according to the ISA.  */
>
> -static bfd_boolean
> -riscv_csr_class_check (enum riscv_csr_class csr_class)
> +static void
> +riscv_csr_class_check (const char *s,
> +                      enum riscv_csr_class csr_class)
>  {
> +  bfd_boolean result = TRUE;
> +
> +  /* Don't check the ISA dependency when -mcsr-check isn't set.  */
> +  if (!riscv_opts.csr_check)
> +    return;
> +
>    switch (csr_class)
>      {
> -    case CSR_CLASS_I: return riscv_subset_supports ("i");
> -    case CSR_CLASS_F: return riscv_subset_supports ("f");
> +    case CSR_CLASS_I:
> +      result = riscv_subset_supports ("i");
> +      break;
> +    case CSR_CLASS_F:
> +      result = riscv_subset_supports ("f");
> +      break;
>      case CSR_CLASS_I_32:
> -      return (xlen == 32 && riscv_subset_supports ("i"));
> -
> +      result = (xlen == 32 && riscv_subset_supports ("i"));
> +      break;
>      default:
> -      return FALSE;
> +      as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
>      }
> +  if (!result)
> +    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
>  }
>
> -/* If the CSR is defined, then we call `riscv_csr_class_check` to do the
> -   further checking.  Return FALSE if the CSR is not defined.  Otherwise,
> -   return TRUE.  */
> +/* Check and find the CSR address according to the privilege spec version.  */
>
> -static bfd_boolean
> +static void
> +riscv_csr_version_check (const char *csr_name,
> +                        struct riscv_csr_extra **entryP)
> +{
> +  struct riscv_csr_extra *entry = *entryP;
> +  while (entry != NULL)
> +    {
> +      if (default_priv_spec >= entry->define_version
> +         && default_priv_spec < entry->abort_version)
> +       {
> +         /* Find the suitable CSR according to the specific version.  */
> +         *entryP = entry;
> +         return;
> +       }
> +      entry = entry->next;
> +    }
> +
> +  /* We can not find the suitable CSR address according to the privilege
> +     version.  Therefore, we use the last defined value.  Report the warning
> +     only when the -mcsr-check is set.  Enable the -mcsr-check is recommended,
> +     otherwise, you may get the unexpected CSR address.  */
> +  if (riscv_opts.csr_check)
> +    {
> +      const char *priv_name = riscv_get_priv_version_name (default_priv_spec);
> +      if (priv_name != NULL)
> +       as_warn (_("Invalid CSR `%s' for the privilege version `%s'"),
> +                csr_name, priv_name);
> +    }
> +}
> +
> +/* Once the CSR is defined, including the old privilege spec, then we call
> +   riscv_csr_class_check and riscv_csr_version_check to do the further
> +   checking and get the corresponding address.  Return -1 if the CSR is never
> +   been defined.  Otherwise, return the address.  */
> +
> +static unsigned int
>  reg_csr_lookup_internal (const char *s)
>  {
>    struct riscv_csr_extra *r =
>      (struct riscv_csr_extra *) hash_find (csr_extra_hash, s);
>
>    if (r == NULL)
> -    return FALSE;
> +    return -1;
>
> -  /* We just report the warning when the CSR is invalid.  */
> -  if (!riscv_csr_class_check (r->csr_class))
> -    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
> +  /* We just report the warning when the CSR is invalid.  "Invalid CSR" means
> +     the CSR was defined, but isn't allowed for the current ISA setting or
> +     the privilege version.  If the CSR is never been defined, then assembler
> +     will regard it as a "Unknown CSR" and report error.  If user use number
> +     to set the CSR, but over the range (> 0xfff), then assembler will report
> +     "Improper CSR" error for it.  */
> +  riscv_csr_class_check (s, r->csr_class);
> +  riscv_csr_version_check (s, &r);
>
> -  return TRUE;
> +  return r->address;
>  }
>
>  static unsigned int
>  reg_lookup_internal (const char *s, enum reg_class class)
>  {
> -  void *r = hash_find (reg_names_hash, s);
> +  void *r;
> +
> +  if (class == RCLASS_CSR)
> +    return reg_csr_lookup_internal (s);
>
> +  r = hash_find (reg_names_hash, s);
>    if (r == NULL || DECODE_REG_CLASS (r) != class)
>      return -1;
>
>    if (riscv_opts.rve && class == RCLASS_GPR && DECODE_REG_NUM (r) > 15)
>      return -1;
>
> -  if (class == RCLASS_CSR
> -      && riscv_opts.csr_check
> -      && !reg_csr_lookup_internal (s))
> -    return -1;
> -
>    return DECODE_REG_NUM (r);
>  }
>
> @@ -946,8 +1065,10 @@ md_begin (void)
>
>    /* Create and insert CSR hash tables.  */
>    csr_extra_hash = hash_new ();
> -#define DECLARE_CSR(name, num, class) riscv_init_csr_hashes (#name, num, class);
> -#define DECLARE_CSR_ALIAS(name, num, class) DECLARE_CSR(name, num, class);
> +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> +  riscv_init_csr_hash (#name, num, class, define_version, abort_version);
> +#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
> +  DECLARE_CSR(name, num, class, define_version, abort_version);
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>
> @@ -2434,6 +2555,7 @@ enum options
>    OPTION_NO_CSR_CHECK,
>    OPTION_MISA_SPEC,
>    OPTION_MRISCV_ISA_VERSION,
> +  OPTION_MPRIV_SPEC,
>    OPTION_END_OF_ENUM
>  };
>
> @@ -2452,6 +2574,7 @@ struct option md_longopts[] =
>    {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
>    {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
>    {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
> +  {"mpriv-spec", required_argument, NULL, OPTION_MPRIV_SPEC},
>
>    {NULL, no_argument, NULL, 0}
>  };
> @@ -2548,6 +2671,9 @@ md_parse_option (int c, const char *arg)
>        default_riscv_isa_version = arg;
>        break;
>
> +    case OPTION_MPRIV_SPEC:
> +      return riscv_set_default_priv_version (arg);
> +
>      default:
>        return 0;
>      }
> @@ -2594,6 +2720,11 @@ riscv_after_parse_args (void)
>    if (riscv_subset_supports ("e"))
>      riscv_set_rve (TRUE);
>
> +  /* If the -mpriv-spec isn't set, then we set the default privilege version
> +     according to DEFAULT_PRIV_SPEC,  */
> +  if (default_priv_spec == CSR_CLASS_VNONE)
> +    riscv_set_default_priv_version (DEFAULT_PRIV_SPEC);
> +
>    /* Infer ABI from ISA if not specified on command line.  */
>    if (abi_xlen == 0)
>      abi_xlen = xlen;
> diff --git a/gas/configure b/gas/configure
> index bce847a..0911152 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -13068,6 +13068,19 @@ _ACEOF
>         fi
>         { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
>  $as_echo "$with_riscv_isa_version" >&6; }
> +
> +        # --with-priv-spec=[1p9p1|1p10|1p11].
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-priv-spec" >&5
> +$as_echo_n "checking for default configuration of --with-priv-spec... " >&6; }
> +       if test "x${with_priv_spec}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_PRIV_SPEC "$with_priv_spec"
> +_ACEOF
> +
> +       fi
> +       { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_priv_spec" >&5
> +$as_echo "$with_priv_spec" >&6; }
>         ;;
>
>        rl78)
> diff --git a/gas/configure.ac b/gas/configure.ac
> index be4ba20..c3d3639 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -606,6 +606,14 @@ changequote([,])dnl
>                               covered by --with-isa-spec])
>         fi
>         AC_MSG_RESULT($with_riscv_isa_version)
> +
> +        # --with-priv-spec=[1p9p1|1p10|1p11].
> +       AC_MSG_CHECKING(for default configuration of --with-priv-spec)
> +       if test "x${with_priv_spec}" != x; then
> +         AC_DEFINE_UNQUOTED(DEFAULT_PRIV_SPEC, "$with_priv_spec",
> +                            [Define default value for -mpriv-spec])
> +       fi
> +       AC_MSG_RESULT($with_priv_spec)
>         ;;
>
>        rl78)
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> index da53566..0033e3c 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> @@ -1,3 +1,3 @@
> -#as: -march=rv32i -mcsr-check
> +#as: -march=rv32i -mcsr-check -mpriv-spec=1p11
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-fext.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> index 76818c8..d3b1bad 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> @@ -2,3 +2,28 @@
>  .*Warning: Invalid CSR `fflags' for the current ISA
>  .*Warning: Invalid CSR `frm' for the current ISA
>  .*Warning: Invalid CSR `fcsr' for the current ISA
> +
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> index ae190c0..bbf83b5 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> @@ -1,3 +1,3 @@
> -#as: -march=rv32if -mcsr-check
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
>  #source: priv-reg-fail-read-only-01.s
>  #warning_output: priv-reg-fail-read-only-01.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> index 7e52bd7..e8355f1 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> @@ -67,3 +67,28 @@
>  .*Warning: Read-only CSR is written `csrw marchid,a1'
>  .*Warning: Read-only CSR is written `csrw mimpid,a1'
>  .*Warning: Read-only CSR is written `csrw mhartid,a1'
> +
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> index d71b261..a0b88cf 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> @@ -1,3 +1,3 @@
> -#as: -march=rv64if -mcsr-check
> +#as: -march=rv64if -mcsr-check -mpriv-spec=1p11
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-rv32-only.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> index fa5a1b4..5e96a85 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> @@ -64,3 +64,28 @@
>  .*Warning: Invalid CSR `mhpmcounter29h' for the current ISA
>  .*Warning: Invalid CSR `mhpmcounter30h' for the current ISA
>  .*Warning: Invalid CSR `mhpmcounter31h' for the current ISA
> +
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> new file mode 100644
> index 0000000..d7a788a
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p10
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p10.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> new file mode 100644
> index 0000000..f532962
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> @@ -0,0 +1,27 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p10'
> +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p10'
> +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p10'
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p10'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p10'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> new file mode 100644
> index 0000000..2830c83
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p11.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> new file mode 100644
> index 0000000..252f96a
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> @@ -0,0 +1,25 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> new file mode 100644
> index 0000000..70c405f
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p9.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> new file mode 100644
> index 0000000..92e1463
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> @@ -0,0 +1,30 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `utval' for the privilege version `1p9'
> +.*Warning: Invalid CSR `scounteren' for the privilege version `1p9'
> +.*Warning: Invalid CSR `stval' for the privilege version `1p9'
> +.*Warning: Invalid CSR `satp' for the privilege version `1p9'
> +.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9'
> +.*Warning: Invalid CSR `mtval' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9'
> +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9'
> +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9'
> +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> new file mode 100644
> index 0000000..2bd4bbf
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p9p1.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> new file mode 100644
> index 0000000..6cde0b3
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> @@ -0,0 +1,30 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `utval' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `scounteren' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `stval' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `satp' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `mtval' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9p1'
> diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
> index 1bb824e..e67f661 100644
> --- a/gdb/riscv-tdep.c
> +++ b/gdb/riscv-tdep.c
> @@ -240,7 +240,7 @@ static struct riscv_register_feature riscv_csr_feature =
>  {
>   "org.gnu.gdb.riscv.csr",
>   {
> -#define DECLARE_CSR(NAME,VALUE,CLASS) \
> +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
>    { RISCV_ ## VALUE ## _REGNUM, { # NAME }, false },
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
> @@ -498,7 +498,7 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum)
>
>    if (regnum >= RISCV_FIRST_CSR_REGNUM && regnum <= RISCV_LAST_CSR_REGNUM)
>      {
> -#define DECLARE_CSR(NAME,VALUE,CLASS) \
> +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
>        case RISCV_ ## VALUE ## _REGNUM: return # NAME;
>
>        switch (regnum)
> @@ -828,7 +828,7 @@ riscv_is_regnum_a_named_csr (int regnum)
>
>    switch (regnum)
>      {
> -#define DECLARE_CSR(name, num, class) case RISCV_ ## num ## _REGNUM:
> +#define DECLARE_CSR(name, num, class, define_ver, abort_ver) case RISCV_ ## num ## _REGNUM:
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>        return true;
> diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
> index 90bae08..e415fb4 100644
> --- a/gdb/riscv-tdep.h
> +++ b/gdb/riscv-tdep.h
> @@ -44,7 +44,7 @@ enum
>    RISCV_LAST_FP_REGNUM = 64,   /* Last Floating Point Register */
>
>    RISCV_FIRST_CSR_REGNUM = 65,  /* First CSR */
> -#define DECLARE_CSR(name, num, class) \
> +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
>    RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num,
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index fe00bb6..ab11c31 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -656,7 +656,6 @@
>  #define CSR_SIDELEG 0x103
>  #define CSR_SIE 0x104
>  #define CSR_STVEC 0x105
> -/* scounteren is present int priv spec 1.10.  */
>  #define CSR_SCOUNTEREN 0x106
>  #define CSR_SSCRATCH 0x140
>  #define CSR_SEPC 0x141
> @@ -669,20 +668,17 @@
>  #define CSR_MIMPID 0xf13
>  #define CSR_MHARTID 0xf14
>  #define CSR_MSTATUS 0x300
> -/* misa is 0xf10 in 1.9, but 0x301 in 1.9.1.  */
>  #define CSR_MISA 0x301
>  #define CSR_MEDELEG 0x302
>  #define CSR_MIDELEG 0x303
>  #define CSR_MIE 0x304
>  #define CSR_MTVEC 0x305
> -/* mcounteren is present in priv spec 1.10.  */
>  #define CSR_MCOUNTEREN 0x306
>  #define CSR_MSCRATCH 0x340
>  #define CSR_MEPC 0x341
>  #define CSR_MCAUSE 0x342
>  #define CSR_MTVAL 0x343
>  #define CSR_MIP 0x344
> -/* pmpcfg0 to pmpcfg3, pmpaddr0 to pmpaddr15 are present in priv spec 1.10.  */
>  #define CSR_PMPCFG0 0x3a0
>  #define CSR_PMPCFG1 0x3a1
>  #define CSR_PMPCFG2 0x3a2
> @@ -765,7 +761,6 @@
>  #define CSR_MHPMCOUNTER29H 0xb9d
>  #define CSR_MHPMCOUNTER30H 0xb9e
>  #define CSR_MHPMCOUNTER31H 0xb9f
> -/* mcountinhibit is present in priv spec 1.11.  */
>  #define CSR_MCOUNTINHIBIT 0x320
>  #define CSR_MHPMEVENT3 0x323
>  #define CSR_MHPMEVENT4 0x324
> @@ -802,10 +797,8 @@
>  #define CSR_TDATA3 0x7a3
>  #define CSR_DCSR 0x7b0
>  #define CSR_DPC 0x7b1
> -/* dscratch0 and dscratch1 are present in priv spec 1.11.  */
>  #define CSR_DSCRATCH0 0x7b2
>  #define CSR_DSCRATCH1 0x7b3
> -/* These registers are present in priv spec 1.9.1, but are dropped in 1.10.  */
>  #define CSR_HSTATUS 0x200
>  #define CSR_HEDELEG 0x202
>  #define CSR_HIDELEG 0x203
> @@ -1124,262 +1117,256 @@ DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
>  DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
>  #endif
>  #ifdef DECLARE_CSR
> -DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I)
> -DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I)
> -DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I)
> -DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I)
> -DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I)
> -DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I)
> -DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F)
> -DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F)
> -DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F)
> -DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I)
> -DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I)
> -DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I)
> -DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32)
> -DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32)
> -DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32)
> -DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I)
> -DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I)
> -DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I)
> -DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I)
> -DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I)
> -DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I)
> -DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I)
> -DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I)
> -DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I)
> -DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I)
> -DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I)
> -DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I)
> -DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I)
> -DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I)
> -DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I)
> -DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I)
> -DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I)
> -DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I)
> -DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I)
> -DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I)
> -DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I)
> -DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I)
> -DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I)
> -DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I)
> -DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I)
> -DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32)
> -DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I)
> -DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32)
> -DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I)
> -DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I)
> -DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I)
> -DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32)
> -DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32)
> -DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I)
> -DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I)
> -DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I)
> -DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I)
> -DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I)
> -DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I)
> -DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I)
> -DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I)
> -DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I)
> -/* These registers are present in priv spec 1.9.1, dropped in 1.10.  */
> -DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I)
> -DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I)
> -DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I)
> -DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I)
> -DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I)
> -DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I)
> -DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I)
> -DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I)
> -DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I)
> -DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I)
> -DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I)
> -DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I)
> -DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I)
> -DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I)
> -DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I)
> -DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I)
> +DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I, CSR_CLASS_V1P9P1, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
>  #endif
>  #ifdef DECLARE_CSR_ALIAS
> -/* Ubadaddr is 0x043 in 1.9.1, but 0x043 is utval in 1.10.  */
> -DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I)
> -/* Sbadaddr is 0x143 in 1.9.1, but 0x143 is stval in 1.10.  */
> -DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I)
> -/* Sptbr is 0x180 in 1.9.1, but 0x180 is satp in 1.10.  */
> -DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I)
> -/* Mbadaddr is 0x343 in 1.9.1, but 0x343 is mtval in 1.10.  */
> -DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I)
> -/* Mucounteren is 0x320 in 1.10, but 0x320 is mcountinhibit in 1.11.  */
> -DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
> -/* Dscratch is 0x7b2 in 1.10, but 0x7b2 is dscratch0 in 1.11.  */
> -DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I)
> +DECLARE_CSR_ALIAS(misa, 0xf10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P9P1)
> +DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P11)
>  #endif
>  #ifdef DECLARE_CAUSE
>  DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index f8b0de3..c36bf69 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -24,6 +24,7 @@
>  #include "riscv-opc.h"
>  #include <stdlib.h>
>  #include <stdint.h>
> +#include "bfd.h"
>
>  typedef uint64_t insn_t;
>
> @@ -353,6 +354,19 @@ struct riscv_ext_version
>    unsigned int minor_version;
>  };
>
> +/* The current supported privilege versions.  */
> +
> +enum riscv_csr_vclass
> +{
> +  CSR_CLASS_VNONE,     /* Default value */
> +
> +  CSR_CLASS_V1P9,       /* v1.9 */
> +  CSR_CLASS_V1P9P1,     /* v1.9.1 */
> +  CSR_CLASS_V1P10,      /* v1.10 */
> +  CSR_CLASS_V1P11,      /* v1.11 */
> +  CSR_CLASS_VDRAFT
> +};
> +
>  /* Instruction is a simple alias (e.g. "mv" for "addi").  */
>  #define        INSN_ALIAS              0x00000001
>
> @@ -432,4 +446,9 @@ extern const struct riscv_opcode riscv_opcodes[];
>  extern const struct riscv_opcode riscv_insn_types[];
>  extern const struct riscv_ext_version riscv_ext_version_table[];
>
> +extern bfd_boolean
> +riscv_get_priv_version_class (const char *, enum riscv_csr_vclass *);
> +extern const char *
> +riscv_get_priv_version_name (enum riscv_csr_vclass);
> +
>  #endif /* _RISCV_H_ */
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index d7a184c..98302ff 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -326,7 +326,8 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
>             unsigned int csr = EXTRACT_OPERAND (CSR, l);
>             switch (csr)
>               {
> -#define DECLARE_CSR(name, num, class) case num: csr_name = #name; break;
> +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> +  case num: csr_name = #name; break;
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>               }
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index 7b885bf..cfefd8e 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -937,3 +937,58 @@ const struct riscv_ext_version riscv_ext_version_table[] =
>  /* Terminate the list.  */
>  {NULL, NULL, 0, 0}
>  };
> +
> +struct priv_version_t
> +{
> +  const char *name;
> +  enum riscv_csr_vclass vclass;
> +};
> +
> +/* List for all supported CSR versions.  */
> +static const struct priv_version_t priv_versions[] =
> +{
> +  {"1p9", CSR_CLASS_V1P9},
> +  {"1p9p1", CSR_CLASS_V1P9P1},
> +  {"1p10", CSR_CLASS_V1P10},
> +  {"1p11", CSR_CLASS_V1P11},
> +
> +/* Terminate the list.  */
> +  {NULL, 0}
> +};
> +
> +/* Get the corresponding CSR version class by giving a privilege
> +   version string.  */
> +
> +bfd_boolean
> +riscv_get_priv_version_class (const char *s,
> +                             enum riscv_csr_vclass *class)
> +{
> +  const struct priv_version_t *version;
> +
> +  if (s == NULL)
> +    return FALSE;
> +
> +  for (version = &priv_versions[0]; version->name != NULL; ++version)
> +    if (strcmp (version->name, s) == 0)
> +      {
> +       *class = version->vclass;
> +       return TRUE;
> +      }
> +
> +  /* Can not find the supported privilege version.  */
> +  return FALSE;
> +}
> +
> +/* Get the corresponding privilege version string by giving a CSR
> +   version class.  */
> +
> +const char *
> +riscv_get_priv_version_name (enum riscv_csr_vclass class)
> +{
> +  const struct priv_version_t *version;
> +  for (version = &priv_versions[0]; version->name != NULL; ++version)
> +    if (class == version->vclass)
> +      return version->name;
> +  /* This shouldn't happen.  */
> +  return NULL;
> +}
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 5/7] RISC-V: Make privilege spec attributes work.
  2020-04-18 11:07 ` [PATCH 5/7] RISC-V: Make privilege spec attributes work Nelson Chu
@ 2020-04-18 11:18   ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:18 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> There are three privilege spec attributes, Tag_RISCV_priv_spec,
> Tag_RISCV_priv_spec_minor and Tag_RISCV_priv_spec_revision, are used to choose
> which version of privilege spec you want.  You can also use -mpriv-spec option
> to choose the priv spec, but the priority of ELF attributes is the highest.
>
> Beside, we have to make sure all arch and priv attributes are set before any
> instruction.
>
> The Priority of these options,
> * ELF priv attributes > -mpriv-spec > --with-priv-spec
>
>         bfd/
>         * elfxx-riscv.c (riscv_parsing_subset_version): Remove the static.
>         (riscv_estimate_digit): Likewise.
>         * elfxx-riscv.h: Updated.
>
>         gas/
>         * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to
>         explicit_attr.  Set it to TRUE if any ELF attribute is found.
>         (riscv_set_default_priv_version): Try to set the default_priv_spec if
>         the priv attributes are set, and their value are meaningful (!= 0p0p0).
>         (md_assemble): Set the default_priv_version according to the priv
>         attributes when we start to assemble instruction.
>
>         (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to
>         riscv_write_out_attrs.  Update the arch and priv attributes.  If we
>         don't set the corresponding ELF attributes, then try to output the
>         default ones.
>         (riscv_set_public_attributes): If any ELF attribute or -march-attr
>         options is set (explicit_attr is TRUE), then call riscv_write_out_attrs
>         to update the arch and priv attributes.
>         (s_riscv_attribute): Make sure all arch and priv attributes are set
>         before any instruction.
>
>         * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any
>         ELF attribute or -march-attr is set.  If the priv attributes are not
>         set, then try to update them by the default setting (-mpriv-spec or
>         --with-priv-spec).
>         * testsuite/gas/riscv/attribute-02.d: Likewise.
>         * testsuite/gas/riscv/attribute-03.d: Likewise.
>         * testsuite/gas/riscv/attribute-04.d: Likewise.
>         * testsuite/gas/riscv/attribute-06.d: Likewise.
>         * testsuite/gas/riscv/attribute-07.d: Likewise.
>         * testsuite/gas/riscv/attribute-08.d: Likewise.
>         * testsuite/gas/riscv/attribute-09.d: Likewise.
>         * testsuite/gas/riscv/attribute-10.d: Likewise.
>         * testsuite/gas/riscv/attribute-11.d: Likewise.
>         * testsuite/gas/riscv/attribute-unknown.d: Likewise.
>
>         * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise.  Updated
>         priv attributes according to the -mpriv-spec option.
>         * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
>         * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise.
>         * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
>
>         * testsuite/gas/riscv/attribute-05.d: Likewise.  Also, the priv version
>         set by priv attributes must be supported.
>         * testsuite/gas/riscv/attribute-05.s: Likewise.
>
>         ld/
>         * testsuite/ld-riscv-elf/attr-merge-arch-01.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise.
>         * testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise.
> ---
>  bfd/elfxx-riscv.c                                  |   4 +-
>  bfd/elfxx-riscv.h                                  |  12 ++
>  gas/config/tc-riscv.c                              | 165 ++++++++++++++++++---
>  gas/testsuite/gas/riscv/attribute-01.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-02.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-03.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-04.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-05.d             |   4 +-
>  gas/testsuite/gas/riscv/attribute-05.s             |   4 +-
>  gas/testsuite/gas/riscv/attribute-06.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-07.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-08.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-09.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-10.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-11.d             |   3 +
>  gas/testsuite/gas/riscv/attribute-unknown.d        |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p10.d         |  10 +-
>  .../gas/riscv/priv-reg-fail-version-1p11.d         |  10 +-
>  .../gas/riscv/priv-reg-fail-version-1p9.d          |  10 +-
>  .../gas/riscv/priv-reg-fail-version-1p9p1.d        |  11 +-
>  ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d     |   3 +
>  ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d     |   3 +
>  ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d     |   3 +
>  ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s |   4 +-
>  ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s |   4 +-
>  ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d   |   4 +-
>  ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d |   3 +
>  .../ld-riscv-elf/attr-merge-strict-align-01.d      |   3 +
>  .../ld-riscv-elf/attr-merge-strict-align-02.d      |   3 +
>  .../ld-riscv-elf/attr-merge-strict-align-03.d      |   3 +
>  .../ld-riscv-elf/attr-merge-strict-align-04.d      |   3 +
>  .../ld-riscv-elf/attr-merge-strict-align-05.d      |   3 +
>  32 files changed, 266 insertions(+), 36 deletions(-)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 3a6aaf3..3ac66f1 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1028,7 +1028,7 @@ riscv_elf_add_sub_reloc (bfd *abfd,
>       `std_ext_p`: True if parsing std extension.
>       `use_default_version`: Set it to True if we need the default version.  */
>
> -static const char *
> +const char *
>  riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>                               const char *march,
>                               const char *p,
> @@ -1771,7 +1771,7 @@ riscv_release_subset_list (riscv_subset_list_t *subset_list)
>
>  /* Return the number of digits for the input.  */
>
> -static size_t
> +size_t
>  riscv_estimate_digit (unsigned num)
>  {
>    size_t digit = 0;
> diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h
> index e3d5177..145ea2e 100644
> --- a/bfd/elfxx-riscv.h
> +++ b/bfd/elfxx-riscv.h
> @@ -87,6 +87,15 @@ riscv_parse_subset (riscv_parse_subset_t *,
>                     bfd_boolean);
>
>  extern const char *
> +riscv_parsing_subset_version (riscv_parse_subset_t *,
> +                             const char *,
> +                             const char *,
> +                             unsigned *,
> +                             unsigned *,
> +                             bfd_boolean,
> +                             bfd_boolean *);
> +
> +extern const char *
>  riscv_supported_std_ext (void);
>
>  extern void
> @@ -95,6 +104,9 @@ riscv_release_subset_list (riscv_subset_list_t *);
>  extern char *
>  riscv_arch_str (unsigned, const riscv_subset_list_t *);
>
> +extern size_t
> +riscv_estimate_digit (unsigned);
> +
>  /* ISA extension name class. E.g. "zbb" corresponds to RV_ISA_CLASS_Z,
>     "xargs" corresponds to RV_ISA_CLASS_X, etc.  Order is important
>     here.  */
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 6528a03..9ce9046 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -283,8 +283,8 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
>  /* Indicate we are already assemble any instructions or not.  */
>  static bfd_boolean start_assemble = FALSE;
>
> -/* Indicate arch attribute is explictly set.  */
> -static bfd_boolean explicit_arch_attr = FALSE;
> +/* Indicate ELF attributes are explictly set.  */
> +static bfd_boolean explicit_attr = FALSE;
>
>  /* Macros for encoding relaxation state for RVC branches and far jumps.  */
>  #define RELAX_BRANCH_ENCODE(uncond, rvc, length)       \
> @@ -614,15 +614,67 @@ static int
>  riscv_set_default_priv_version (const char *s)
>  {
>    enum riscv_csr_vclass class;
> -  if (!riscv_get_priv_version_class (s, &class))
> +  unsigned major, minor, revision;
> +  obj_attribute *attr;
> +  size_t buf_size;
> +  char *buf;
> +
> +  /* Find the corresponding version class.  */
> +  if (riscv_get_priv_version_class (s, &class))
> +    {
> +      default_priv_spec = class;
> +      return 1;
> +    }
> +
> +  if (s != NULL)
>      {
>        as_bad (_("Unsupported RISC-V privilege version set by "
>                 "-mpriv-spec=%s."), s);
>        return 0;
>      }
> +
> +  /* Try to set the default_priv_spec according to the priv attributes.  */
> +  attr = elf_known_obj_attributes_proc (stdoutput);
> +  major = (unsigned) attr[Tag_RISCV_priv_spec].i;
> +  minor = (unsigned) attr[Tag_RISCV_priv_spec_minor].i;
> +  revision = (unsigned) attr[Tag_RISCV_priv_spec_revision].i;
> +
> +  /* The priv attributes setting 0p0p0 is meaningless.  We should have set
> +     the default_priv_spec by md_parse_option and riscv_after_parse_args, so
> +     just skip the following setting.  */
> +  if (major == 0 && minor == 0 && revision == 0)
> +    return 1;
> +
> +  buf_size = riscv_estimate_digit (major)
> +            + 1 /* 'p' */
> +            + riscv_estimate_digit (minor)
> +            + 1; /* string terminator */
> +
> +  if (revision != 0)
> +    {
> +      buf_size += 1 /* 'p' */
> +                 + riscv_estimate_digit (revision);
> +      buf = xmalloc (buf_size);
> +      snprintf (buf, buf_size, "%dp%dp%d", major, minor, revision);
> +    }
>    else
> -    default_priv_spec = class;
> -  return 1;
> +    {
> +      buf = xmalloc (buf_size);
> +      snprintf (buf, buf_size, "%dp%d", major, minor);
> +    }
> +
> +  if (riscv_get_priv_version_class (buf, &class))
> +    {
> +      default_priv_spec = class;
> +      free (buf);
> +      return 1;
> +    }
> +
> +  /* Still can not find the version class.  */
> +  as_bad (_("Unsupported RISC-V privilege version set by "
> +           "priv attributes `%dp%dp%d'."), major, minor, revision);
> +  free (buf);
> +  return 0;
>  }
>
>  /* Init hash table csr_extra_hash to handle CSR.  */
> @@ -2511,9 +2563,17 @@ md_assemble (char *str)
>    expressionS imm_expr;
>    bfd_reloc_code_real_type imm_reloc = BFD_RELOC_UNUSED;
>
> -  const char *error = riscv_ip (str, &insn, &imm_expr, &imm_reloc, op_hash);
> +  /* The arch and priv attributes should be set before assembling.  */
> +  if (!start_assemble)
> +    {
> +      start_assemble = TRUE;
>
> -  start_assemble = TRUE;
> +      /* Set the default_priv_version according to the priv attributes.  */
> +      if (!riscv_set_default_priv_version (NULL))
> +       return;
> +    }
> +
> +  const char *error = riscv_ip (str, &insn, &imm_expr, &imm_reloc, op_hash);
>
>    if (error)
>      {
> @@ -3526,26 +3586,78 @@ s_riscv_insn (int x ATTRIBUTE_UNUSED)
>    demand_empty_rest_of_line ();
>  }
>
> -/* Update arch attributes.  */
> +/* Update arch and priv attributes.  If we don't set the corresponding ELF
> +   attributes, then try to output the default ones.  */
>
>  static void
> -riscv_write_out_arch_attr (void)
> +riscv_write_out_attrs (void)
>  {
> -  const char *arch_str = riscv_arch_str (xlen, &riscv_subsets);
> +  riscv_parse_subset_t rps;
> +  const char *arch_str, *priv_str, *end;
> +  char *priv_str_t, *p;
> +  unsigned int p_count;
> +  unsigned major, minor, revision, empty;
>
> +  /* Re-write arch attribute to normalize the arch string.  */
> +  arch_str = riscv_arch_str (xlen, &riscv_subsets);
>    bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, arch_str);
> -
>    xfree ((void *)arch_str);
> +
> +  /* For the file without any instruction, we don't set the default_priv_version
> +     according to the priv attributes since the md_assemble isn't called.
> +     Call riscv_set_default_priv_version here for the above case, although
> +     it seems strange.  */
> +  if (!start_assemble
> +      && !riscv_set_default_priv_version (NULL))
> +    return;
> +
> +  /* Re-write priv attributes by default_priv_spec.  */
> +  priv_str = riscv_get_priv_version_name (default_priv_spec);
> +  priv_str_t = xstrdup (priv_str);
> +
> +  /* Split the version string into two parts, the first part is major + minor,
> +     and the second part is the revision if possible.  */
> +  for (p = priv_str_t, p_count = 0; *p != '\0'; p++)
> +    {
> +      if (*p == 'p')
> +       p_count++;
> +      if (p_count == 2)
> +       {
> +         *p++ = '\0';
> +         break;
> +       }
> +    }
> +
> +  /* Borrow riscv_parsing_subset_version to parse the priv version string.  */
> +  rps.subset_list = NULL;
> +  rps.error_handler = as_fatal;
> +  rps.xlen = &xlen;
> +  rps.get_default_version = NULL;
> +
> +  /* Parse the version string twice.  */
> +  end = riscv_parsing_subset_version (&rps, priv_str, priv_str_t,
> +                                     &major, &minor, TRUE, NULL);
> +  end = riscv_parsing_subset_version (&rps, priv_str, p,
> +                                     &revision, &empty, TRUE, NULL);
> +  if (*end != '\0')
> +    as_fatal (_("Failed to parse the priv version: %s"), priv_str);
> +
> +  /* Insert the priv attributes.  */
> +  bfd_elf_add_proc_attr_int (stdoutput, Tag_RISCV_priv_spec, major);
> +  bfd_elf_add_proc_attr_int (stdoutput, Tag_RISCV_priv_spec_minor, minor);
> +  bfd_elf_add_proc_attr_int (stdoutput, Tag_RISCV_priv_spec_revision, revision);
> +  xfree ((void *)priv_str_t);
>  }
>
> -/* Add the default contents for the .riscv.attributes section.  */
> +/* Add the default contents for the .riscv.attributes section.  If any
> +   ELF attribute or -march-attr options is set, call riscv_write_out_attrs
> +   to update the arch and priv attributes.  */
>
>  static void
>  riscv_set_public_attributes (void)
>  {
> -  if (riscv_opts.arch_attr || explicit_arch_attr)
> -    /* Re-write arch attribute to normalize the arch string.  */
> -    riscv_write_out_arch_attr ();
> +  if (riscv_opts.arch_attr || explicit_attr)
> +    riscv_write_out_attrs ();
>  }
>
>  /* Called after all assembly has been done.  */
> @@ -3599,13 +3711,14 @@ static void
>  s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
>  {
>    int tag = obj_elf_vendor_attribute (OBJ_ATTR_PROC);
> +  unsigned old_xlen;
> +  obj_attribute *attr;
>
> -  if (tag == Tag_RISCV_arch)
> +  explicit_attr = TRUE;
> +  switch (tag)
>      {
> -      unsigned old_xlen = xlen;
> -
> -      explicit_arch_attr = TRUE;
> -      obj_attribute *attr;
> +    case Tag_RISCV_arch:
> +      old_xlen = xlen;
>        attr = elf_known_obj_attributes_proc (stdoutput);
>        if (!start_assemble)
>         riscv_set_arch (attr[Tag_RISCV_arch].s, FALSE);
> @@ -3624,6 +3737,18 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
>
>        /* We also need to update the version of ISA here.  */
>        riscv_set_arch (default_riscv_isa_version, TRUE);
> +      break;
> +
> +    case Tag_RISCV_priv_spec:
> +    case Tag_RISCV_priv_spec_minor:
> +    case Tag_RISCV_priv_spec_revision:
> +      /* We will not set the priv versions until md_assemble.  */
> +      if (start_assemble)
> +       as_fatal (_(".attribute priv spec must set before any instructions"));
> +      break;
> +
> +    default:
> +      break;
>      }
>  }
>
> diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
> index 3f9e841..dedd443 100644
> --- a/gas/testsuite/gas/riscv/attribute-01.d
> +++ b/gas/testsuite/gas/riscv/attribute-01.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
> index a58248e..5368741 100644
> --- a/gas/testsuite/gas/riscv/attribute-02.d
> +++ b/gas/testsuite/gas/riscv/attribute-02.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
> index 04b9ab5..6d7c781 100644
> --- a/gas/testsuite/gas/riscv/attribute-03.d
> +++ b/gas/testsuite/gas/riscv/attribute-03.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0_xfoo0p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
> index 8a3f51b..b725e2d 100644
> --- a/gas/testsuite/gas/riscv/attribute-04.d
> +++ b/gas/testsuite/gas/riscv/attribute-04.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
> index 3309ff3..16c19e9 100644
> --- a/gas/testsuite/gas/riscv/attribute-05.d
> +++ b/gas/testsuite/gas/riscv/attribute-05.d
> @@ -7,5 +7,5 @@ File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
>    Tag_RISCV_unaligned_access: Unaligned access
>    Tag_RISCV_priv_spec: 1
> -  Tag_RISCV_priv_spec_minor: 2
> -  Tag_RISCV_priv_spec_revision: 3
> +  Tag_RISCV_priv_spec_minor: 9
> +  Tag_RISCV_priv_spec_revision: 1
> diff --git a/gas/testsuite/gas/riscv/attribute-05.s b/gas/testsuite/gas/riscv/attribute-05.s
> index 3b3b7f6..4920309 100644
> --- a/gas/testsuite/gas/riscv/attribute-05.s
> +++ b/gas/testsuite/gas/riscv/attribute-05.s
> @@ -1,6 +1,6 @@
>         .attribute arch, "rv32g"
>         .attribute priv_spec, 1
> -       .attribute priv_spec_minor, 2
> -       .attribute priv_spec_revision, 3
> +       .attribute priv_spec_minor, 9
> +       .attribute priv_spec_revision, 1
>         .attribute unaligned_access, 1
>         .attribute stack_align, 16
> diff --git a/gas/testsuite/gas/riscv/attribute-06.d b/gas/testsuite/gas/riscv/attribute-06.d
> index 5c8a5c6..b963b6e 100644
> --- a/gas/testsuite/gas/riscv/attribute-06.d
> +++ b/gas/testsuite/gas/riscv/attribute-06.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-07.d b/gas/testsuite/gas/riscv/attribute-07.d
> index 20ac9be..f383f94 100644
> --- a/gas/testsuite/gas/riscv/attribute-07.d
> +++ b/gas/testsuite/gas/riscv/attribute-07.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv64i2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-08.d b/gas/testsuite/gas/riscv/attribute-08.d
> index 7f580d3..1391b56 100644
> --- a/gas/testsuite/gas/riscv/attribute-08.d
> +++ b/gas/testsuite/gas/riscv/attribute-08.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32e1p9"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-09.d b/gas/testsuite/gas/riscv/attribute-09.d
> index 77c7ef3..14f1b85 100644
> --- a/gas/testsuite/gas/riscv/attribute-09.d
> +++ b/gas/testsuite/gas/riscv/attribute-09.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
> index 9c72035..7518197 100644
> --- a/gas/testsuite/gas/riscv/attribute-10.d
> +++ b/gas/testsuite/gas/riscv/attribute-10.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p1_zicsr2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-11.d b/gas/testsuite/gas/riscv/attribute-11.d
> index bc7f986..c4e8b0a 100644
> --- a/gas/testsuite/gas/riscv/attribute-11.d
> +++ b/gas/testsuite/gas/riscv/attribute-11.d
> @@ -4,3 +4,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p1_zicsr2p1"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/gas/testsuite/gas/riscv/attribute-unknown.d b/gas/testsuite/gas/riscv/attribute-unknown.d
> index 667f21a..120e3de 100644
> --- a/gas/testsuite/gas/riscv/attribute-unknown.d
> +++ b/gas/testsuite/gas/riscv/attribute-unknown.d
> @@ -4,5 +4,8 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
>    Tag_unknown_255: "test"
>    Tag_unknown_256: 123 \(0x7b\)
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> index d7a788a..ff7c5f8 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> @@ -1,3 +1,11 @@
> -#as: -march=rv32if -mcsr-check -mpriv-spec=1p10
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p10 -march-attr
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-version-1p10.l
> +#readelf: -A
> +
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: 1
> +  Tag_RISCV_priv_spec_minor: 10
> +#...
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> index 2830c83..7e79c02 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> @@ -1,3 +1,11 @@
> -#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11 -march-attr
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-version-1p11.l
> +#readelf: -A
> +
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: 1
> +  Tag_RISCV_priv_spec_minor: 11
> +#...
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> index 70c405f..372505f 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> @@ -1,3 +1,11 @@
> -#as: -march=rv32if -mcsr-check -mpriv-spec=1p9
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9 -march-attr
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-version-1p9.l
> +#readelf: -A
> +
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: 1
> +  Tag_RISCV_priv_spec_minor: 9
> +#...
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> index 2bd4bbf..dc204b0 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> @@ -1,3 +1,12 @@
> -#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1 -march-attr
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-version-1p9p1.l
> +#readelf: -A
> +
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: 1
> +  Tag_RISCV_priv_spec_minor: 9
> +  Tag_RISCV_priv_spec_revision: 1
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
> index 5baaba4..032f964 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d
> @@ -7,3 +7,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
> index a7d79a1..54a7621 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d
> @@ -7,3 +7,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
> index d46dee8..67f0437 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d
> @@ -7,3 +7,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: "rv32i2p0_m2p0_xbar2p0_xfoo2p0"
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s
> index 1ad9500..0b7ffea 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s
> @@ -1,3 +1,3 @@
>         .attribute priv_spec, 1
> -       .attribute priv_spec_minor, 2
> -       .attribute priv_spec_revision, 3
> +       .attribute priv_spec_minor, 9
> +       .attribute priv_spec_revision, 1
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s
> index 1ad9500..0b7ffea 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s
> @@ -1,3 +1,3 @@
>         .attribute priv_spec, 1
> -       .attribute priv_spec_minor, 2
> -       .attribute priv_spec_revision, 3
> +       .attribute priv_spec_minor, 9
> +       .attribute priv_spec_revision, 1
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d
> index dc4c4e0..0aa6fe0 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-priv-spec.d
> @@ -8,5 +8,5 @@ Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
>    Tag_RISCV_priv_spec: 1
> -  Tag_RISCV_priv_spec_minor: 2
> -  Tag_RISCV_priv_spec_revision: 3
> +  Tag_RISCV_priv_spec_minor: 9
> +  Tag_RISCV_priv_spec_revision: 1
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d b/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d
> index 7a5bc81..5585fac 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d
> @@ -8,3 +8,6 @@ Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_stack_align: 16-bytes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d
> index 1039930..91011a2 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d
> @@ -8,3 +8,6 @@ Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
>    Tag_RISCV_unaligned_access: Unaligned access
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d
> index 12ca1c4..5bdea27 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d
> @@ -8,3 +8,6 @@ Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
>    Tag_RISCV_unaligned_access: Unaligned access
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d
> index e41351d..ac886fb 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d
> @@ -8,3 +8,6 @@ Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
>    Tag_RISCV_unaligned_access: Unaligned access
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d
> index ac2a766..dd45f76 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d
> @@ -7,3 +7,6 @@
>  Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d
> index 608c05e..ef0c154 100644
> --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d
> +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d
> @@ -8,3 +8,6 @@ Attribute Section: riscv
>  File Attributes
>    Tag_RISCV_arch: [a-zA-Z0-9_\"].*
>    Tag_RISCV_unaligned_access: Unaligned access
> +  Tag_RISCV_priv_spec: [0-9_\"].*
> +  Tag_RISCV_priv_spec_minor: [0-9_\"].*
> +#...
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 6/7] RISC-V: Disassembler dumps the CSR according to the chosen privilege spec.
  2020-04-18 11:07 ` [PATCH 6/7] RISC-V: Disassembler dumps the CSR according to the chosen privilege spec Nelson Chu
@ 2020-04-18 11:18   ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:18 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> Add new disassembler option -Mpriv-spec=[1p9|1p9p1|1p10|1p11] to dump the CSR
> correctly.  Report error message if the chosen priv version isn't supported.
> Dump the CSR address direclty if it is invalid for the chosen spec.
>
>         gas/
>         * config/tc-riscv.c: Remove the static for default_priv_spec, and move
>         it to opcodes/riscv-opc.c.
>
>         * testsuite/gas/riscv/priv-reg.d: Removed.
>         * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case.  Dump the
>         CSR according to the priv spec 1p9.
>         * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case.  Dump the
>         CSR according to the priv spec 1p9p1.
>         * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case.  Dump the
>         CSR according to the priv spec 1p10.
>         * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case.  Dump the
>         CSR according to the priv spec 1p11.
>
>         include/
>         * opcode/riscv.h: Updated.
>
>         opcodes/
>         * riscv-opc.c: Updated.
>         * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
>         according to the chosen version.  Build a hash table riscv_csr_hash to
>         store the valid CSR for the chosen pirv verison.  Dump the direct
>         CSR address rather than it's name if it is invalid.
>         (parse_riscv_dis_option_without_args): New function.  Parse the options
>         without arguments.
>         (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
>         parse the options without arguments first, and then handle the options
>         with arguments.  Add the new option -Mpriv-spec, which has argument.
> ---
>  gas/config/tc-riscv.c                            |   1 -
>  gas/testsuite/gas/riscv/priv-reg-version-1p10.d  | 257 +++++++++++++++++++++++
>  gas/testsuite/gas/riscv/priv-reg-version-1p11.d  | 257 +++++++++++++++++++++++
>  gas/testsuite/gas/riscv/priv-reg-version-1p9.d   | 257 +++++++++++++++++++++++
>  gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d | 257 +++++++++++++++++++++++
>  gas/testsuite/gas/riscv/priv-reg.d               | 256 ----------------------
>  include/opcode/riscv.h                           |   2 +
>  opcodes/riscv-dis.c                              |  67 +++++-
>  opcodes/riscv-opc.c                              |   2 +
>  9 files changed, 1092 insertions(+), 264 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p10.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p11.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p9.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
>  delete mode 100644 gas/testsuite/gas/riscv/priv-reg.d
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 9ce9046..81bdfa8 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -83,7 +83,6 @@ static const char default_arch[] = DEFAULT_ARCH;
>  static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
>  static const char *default_isa_spec = DEFAULT_ISA_SPEC;
>  static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
> -static enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
>
>  static unsigned xlen = 0; /* width of an x-register */
>  static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
> diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
> new file mode 100644
> index 0000000..3c369f4
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d
> @@ -0,0 +1,257 @@
> +#as: -march=rv32if -mpriv-spec=1p10
> +#source: priv-reg.s
> +#objdump: -dr -Mpriv-spec=1p10
> +
> +.*:[   ]+file format .*
> +
> +
> +Disassembly of section .text:
> +
> +0+000 <.text>:
> +[      ]+[0-9a-f]+:[   ]+00002573[     ]+csrr[         ]+a0,ustatus
> +[      ]+[0-9a-f]+:[   ]+00402573[     ]+csrr[         ]+a0,uie
> +[      ]+[0-9a-f]+:[   ]+00502573[     ]+csrr[         ]+a0,utvec
> +[      ]+[0-9a-f]+:[   ]+04002573[     ]+csrr[         ]+a0,uscratch
> +[      ]+[0-9a-f]+:[   ]+04102573[     ]+csrr[         ]+a0,uepc
> +[      ]+[0-9a-f]+:[   ]+04202573[     ]+csrr[         ]+a0,ucause
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,utval
> +[      ]+[0-9a-f]+:[   ]+04402573[     ]+csrr[         ]+a0,uip
> +[      ]+[0-9a-f]+:[   ]+00102573[     ]+frflags[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+00202573[     ]+frrm[         ]+a0
> +[      ]+[0-9a-f]+:[   ]+00302573[     ]+frcsr[        ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0002573[     ]+rdcycle[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0102573[     ]+rdtime[       ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0202573[     ]+rdinstret[    ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0302573[     ]+csrr[         ]+a0,hpmcounter3
> +[      ]+[0-9a-f]+:[   ]+c0402573[     ]+csrr[         ]+a0,hpmcounter4
> +[      ]+[0-9a-f]+:[   ]+c0502573[     ]+csrr[         ]+a0,hpmcounter5
> +[      ]+[0-9a-f]+:[   ]+c0602573[     ]+csrr[         ]+a0,hpmcounter6
> +[      ]+[0-9a-f]+:[   ]+c0702573[     ]+csrr[         ]+a0,hpmcounter7
> +[      ]+[0-9a-f]+:[   ]+c0802573[     ]+csrr[         ]+a0,hpmcounter8
> +[      ]+[0-9a-f]+:[   ]+c0902573[     ]+csrr[         ]+a0,hpmcounter9
> +[      ]+[0-9a-f]+:[   ]+c0a02573[     ]+csrr[         ]+a0,hpmcounter10
> +[      ]+[0-9a-f]+:[   ]+c0b02573[     ]+csrr[         ]+a0,hpmcounter11
> +[      ]+[0-9a-f]+:[   ]+c0c02573[     ]+csrr[         ]+a0,hpmcounter12
> +[      ]+[0-9a-f]+:[   ]+c0d02573[     ]+csrr[         ]+a0,hpmcounter13
> +[      ]+[0-9a-f]+:[   ]+c0e02573[     ]+csrr[         ]+a0,hpmcounter14
> +[      ]+[0-9a-f]+:[   ]+c0f02573[     ]+csrr[         ]+a0,hpmcounter15
> +[      ]+[0-9a-f]+:[   ]+c1002573[     ]+csrr[         ]+a0,hpmcounter16
> +[      ]+[0-9a-f]+:[   ]+c1102573[     ]+csrr[         ]+a0,hpmcounter17
> +[      ]+[0-9a-f]+:[   ]+c1202573[     ]+csrr[         ]+a0,hpmcounter18
> +[      ]+[0-9a-f]+:[   ]+c1302573[     ]+csrr[         ]+a0,hpmcounter19
> +[      ]+[0-9a-f]+:[   ]+c1402573[     ]+csrr[         ]+a0,hpmcounter20
> +[      ]+[0-9a-f]+:[   ]+c1502573[     ]+csrr[         ]+a0,hpmcounter21
> +[      ]+[0-9a-f]+:[   ]+c1602573[     ]+csrr[         ]+a0,hpmcounter22
> +[      ]+[0-9a-f]+:[   ]+c1702573[     ]+csrr[         ]+a0,hpmcounter23
> +[      ]+[0-9a-f]+:[   ]+c1802573[     ]+csrr[         ]+a0,hpmcounter24
> +[      ]+[0-9a-f]+:[   ]+c1902573[     ]+csrr[         ]+a0,hpmcounter25
> +[      ]+[0-9a-f]+:[   ]+c1a02573[     ]+csrr[         ]+a0,hpmcounter26
> +[      ]+[0-9a-f]+:[   ]+c1b02573[     ]+csrr[         ]+a0,hpmcounter27
> +[      ]+[0-9a-f]+:[   ]+c1c02573[     ]+csrr[         ]+a0,hpmcounter28
> +[      ]+[0-9a-f]+:[   ]+c1d02573[     ]+csrr[         ]+a0,hpmcounter29
> +[      ]+[0-9a-f]+:[   ]+c1e02573[     ]+csrr[         ]+a0,hpmcounter30
> +[      ]+[0-9a-f]+:[   ]+c1f02573[     ]+csrr[         ]+a0,hpmcounter31
> +[      ]+[0-9a-f]+:[   ]+c8002573[     ]+rdcycleh[     ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8102573[     ]+rdtimeh[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8202573[     ]+rdinstreth[   ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8302573[     ]+csrr[         ]+a0,hpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+c8402573[     ]+csrr[         ]+a0,hpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+c8502573[     ]+csrr[         ]+a0,hpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+c8602573[     ]+csrr[         ]+a0,hpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+c8702573[     ]+csrr[         ]+a0,hpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+c8802573[     ]+csrr[         ]+a0,hpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+c8902573[     ]+csrr[         ]+a0,hpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+c8a02573[     ]+csrr[         ]+a0,hpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+c8b02573[     ]+csrr[         ]+a0,hpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+c8c02573[     ]+csrr[         ]+a0,hpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+c8d02573[     ]+csrr[         ]+a0,hpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+c8e02573[     ]+csrr[         ]+a0,hpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+c8f02573[     ]+csrr[         ]+a0,hpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+c9002573[     ]+csrr[         ]+a0,hpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+c9102573[     ]+csrr[         ]+a0,hpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+c9202573[     ]+csrr[         ]+a0,hpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+c9302573[     ]+csrr[         ]+a0,hpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+c9402573[     ]+csrr[         ]+a0,hpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+c9502573[     ]+csrr[         ]+a0,hpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+c9602573[     ]+csrr[         ]+a0,hpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+c9702573[     ]+csrr[         ]+a0,hpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+c9802573[     ]+csrr[         ]+a0,hpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+c9902573[     ]+csrr[         ]+a0,hpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+c9a02573[     ]+csrr[         ]+a0,hpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+c9b02573[     ]+csrr[         ]+a0,hpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+c9c02573[     ]+csrr[         ]+a0,hpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+c9d02573[     ]+csrr[         ]+a0,hpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+c9e02573[     ]+csrr[         ]+a0,hpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+c9f02573[     ]+csrr[         ]+a0,hpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+10002573[     ]+csrr[         ]+a0,sstatus
> +[      ]+[0-9a-f]+:[   ]+10202573[     ]+csrr[         ]+a0,sedeleg
> +[      ]+[0-9a-f]+:[   ]+10302573[     ]+csrr[         ]+a0,sideleg
> +[      ]+[0-9a-f]+:[   ]+10402573[     ]+csrr[         ]+a0,sie
> +[      ]+[0-9a-f]+:[   ]+10502573[     ]+csrr[         ]+a0,stvec
> +[      ]+[0-9a-f]+:[   ]+10602573[     ]+csrr[         ]+a0,scounteren
> +[      ]+[0-9a-f]+:[   ]+14002573[     ]+csrr[         ]+a0,sscratch
> +[      ]+[0-9a-f]+:[   ]+14102573[     ]+csrr[         ]+a0,sepc
> +[      ]+[0-9a-f]+:[   ]+14202573[     ]+csrr[         ]+a0,scause
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,stval
> +[      ]+[0-9a-f]+:[   ]+14402573[     ]+csrr[         ]+a0,sip
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,satp
> +[      ]+[0-9a-f]+:[   ]+f1102573[     ]+csrr[         ]+a0,mvendorid
> +[      ]+[0-9a-f]+:[   ]+f1202573[     ]+csrr[         ]+a0,marchid
> +[      ]+[0-9a-f]+:[   ]+f1302573[     ]+csrr[         ]+a0,mimpid
> +[      ]+[0-9a-f]+:[   ]+f1402573[     ]+csrr[         ]+a0,mhartid
> +[      ]+[0-9a-f]+:[   ]+30002573[     ]+csrr[         ]+a0,mstatus
> +[      ]+[0-9a-f]+:[   ]+30102573[     ]+csrr[         ]+a0,misa
> +[      ]+[0-9a-f]+:[   ]+30202573[     ]+csrr[         ]+a0,medeleg
> +[      ]+[0-9a-f]+:[   ]+30302573[     ]+csrr[         ]+a0,mideleg
> +[      ]+[0-9a-f]+:[   ]+30402573[     ]+csrr[         ]+a0,mie
> +[      ]+[0-9a-f]+:[   ]+30502573[     ]+csrr[         ]+a0,mtvec
> +[      ]+[0-9a-f]+:[   ]+30602573[     ]+csrr[         ]+a0,mcounteren
> +[      ]+[0-9a-f]+:[   ]+34002573[     ]+csrr[         ]+a0,mscratch
> +[      ]+[0-9a-f]+:[   ]+34102573[     ]+csrr[         ]+a0,mepc
> +[      ]+[0-9a-f]+:[   ]+34202573[     ]+csrr[         ]+a0,mcause
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mtval
> +[      ]+[0-9a-f]+:[   ]+34402573[     ]+csrr[         ]+a0,mip
> +[      ]+[0-9a-f]+:[   ]+3a002573[     ]+csrr[         ]+a0,pmpcfg0
> +[      ]+[0-9a-f]+:[   ]+3a102573[     ]+csrr[         ]+a0,pmpcfg1
> +[      ]+[0-9a-f]+:[   ]+3a202573[     ]+csrr[         ]+a0,pmpcfg2
> +[      ]+[0-9a-f]+:[   ]+3a302573[     ]+csrr[         ]+a0,pmpcfg3
> +[      ]+[0-9a-f]+:[   ]+3b002573[     ]+csrr[         ]+a0,pmpaddr0
> +[      ]+[0-9a-f]+:[   ]+3b102573[     ]+csrr[         ]+a0,pmpaddr1
> +[      ]+[0-9a-f]+:[   ]+3b202573[     ]+csrr[         ]+a0,pmpaddr2
> +[      ]+[0-9a-f]+:[   ]+3b302573[     ]+csrr[         ]+a0,pmpaddr3
> +[      ]+[0-9a-f]+:[   ]+3b402573[     ]+csrr[         ]+a0,pmpaddr4
> +[      ]+[0-9a-f]+:[   ]+3b502573[     ]+csrr[         ]+a0,pmpaddr5
> +[      ]+[0-9a-f]+:[   ]+3b602573[     ]+csrr[         ]+a0,pmpaddr6
> +[      ]+[0-9a-f]+:[   ]+3b702573[     ]+csrr[         ]+a0,pmpaddr7
> +[      ]+[0-9a-f]+:[   ]+3b802573[     ]+csrr[         ]+a0,pmpaddr8
> +[      ]+[0-9a-f]+:[   ]+3b902573[     ]+csrr[         ]+a0,pmpaddr9
> +[      ]+[0-9a-f]+:[   ]+3ba02573[     ]+csrr[         ]+a0,pmpaddr10
> +[      ]+[0-9a-f]+:[   ]+3bb02573[     ]+csrr[         ]+a0,pmpaddr11
> +[      ]+[0-9a-f]+:[   ]+3bc02573[     ]+csrr[         ]+a0,pmpaddr12
> +[      ]+[0-9a-f]+:[   ]+3bd02573[     ]+csrr[         ]+a0,pmpaddr13
> +[      ]+[0-9a-f]+:[   ]+3be02573[     ]+csrr[         ]+a0,pmpaddr14
> +[      ]+[0-9a-f]+:[   ]+3bf02573[     ]+csrr[         ]+a0,pmpaddr15
> +[      ]+[0-9a-f]+:[   ]+b0002573[     ]+csrr[         ]+a0,mcycle
> +[      ]+[0-9a-f]+:[   ]+b0202573[     ]+csrr[         ]+a0,minstret
> +[      ]+[0-9a-f]+:[   ]+b0302573[     ]+csrr[         ]+a0,mhpmcounter3
> +[      ]+[0-9a-f]+:[   ]+b0402573[     ]+csrr[         ]+a0,mhpmcounter4
> +[      ]+[0-9a-f]+:[   ]+b0502573[     ]+csrr[         ]+a0,mhpmcounter5
> +[      ]+[0-9a-f]+:[   ]+b0602573[     ]+csrr[         ]+a0,mhpmcounter6
> +[      ]+[0-9a-f]+:[   ]+b0702573[     ]+csrr[         ]+a0,mhpmcounter7
> +[      ]+[0-9a-f]+:[   ]+b0802573[     ]+csrr[         ]+a0,mhpmcounter8
> +[      ]+[0-9a-f]+:[   ]+b0902573[     ]+csrr[         ]+a0,mhpmcounter9
> +[      ]+[0-9a-f]+:[   ]+b0a02573[     ]+csrr[         ]+a0,mhpmcounter10
> +[      ]+[0-9a-f]+:[   ]+b0b02573[     ]+csrr[         ]+a0,mhpmcounter11
> +[      ]+[0-9a-f]+:[   ]+b0c02573[     ]+csrr[         ]+a0,mhpmcounter12
> +[      ]+[0-9a-f]+:[   ]+b0d02573[     ]+csrr[         ]+a0,mhpmcounter13
> +[      ]+[0-9a-f]+:[   ]+b0e02573[     ]+csrr[         ]+a0,mhpmcounter14
> +[      ]+[0-9a-f]+:[   ]+b0f02573[     ]+csrr[         ]+a0,mhpmcounter15
> +[      ]+[0-9a-f]+:[   ]+b1002573[     ]+csrr[         ]+a0,mhpmcounter16
> +[      ]+[0-9a-f]+:[   ]+b1102573[     ]+csrr[         ]+a0,mhpmcounter17
> +[      ]+[0-9a-f]+:[   ]+b1202573[     ]+csrr[         ]+a0,mhpmcounter18
> +[      ]+[0-9a-f]+:[   ]+b1302573[     ]+csrr[         ]+a0,mhpmcounter19
> +[      ]+[0-9a-f]+:[   ]+b1402573[     ]+csrr[         ]+a0,mhpmcounter20
> +[      ]+[0-9a-f]+:[   ]+b1502573[     ]+csrr[         ]+a0,mhpmcounter21
> +[      ]+[0-9a-f]+:[   ]+b1602573[     ]+csrr[         ]+a0,mhpmcounter22
> +[      ]+[0-9a-f]+:[   ]+b1702573[     ]+csrr[         ]+a0,mhpmcounter23
> +[      ]+[0-9a-f]+:[   ]+b1802573[     ]+csrr[         ]+a0,mhpmcounter24
> +[      ]+[0-9a-f]+:[   ]+b1902573[     ]+csrr[         ]+a0,mhpmcounter25
> +[      ]+[0-9a-f]+:[   ]+b1a02573[     ]+csrr[         ]+a0,mhpmcounter26
> +[      ]+[0-9a-f]+:[   ]+b1b02573[     ]+csrr[         ]+a0,mhpmcounter27
> +[      ]+[0-9a-f]+:[   ]+b1c02573[     ]+csrr[         ]+a0,mhpmcounter28
> +[      ]+[0-9a-f]+:[   ]+b1d02573[     ]+csrr[         ]+a0,mhpmcounter29
> +[      ]+[0-9a-f]+:[   ]+b1e02573[     ]+csrr[         ]+a0,mhpmcounter30
> +[      ]+[0-9a-f]+:[   ]+b1f02573[     ]+csrr[         ]+a0,mhpmcounter31
> +[      ]+[0-9a-f]+:[   ]+b8002573[     ]+csrr[         ]+a0,mcycleh
> +[      ]+[0-9a-f]+:[   ]+b8202573[     ]+csrr[         ]+a0,minstreth
> +[      ]+[0-9a-f]+:[   ]+b8302573[     ]+csrr[         ]+a0,mhpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+b8402573[     ]+csrr[         ]+a0,mhpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+b8502573[     ]+csrr[         ]+a0,mhpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+b8602573[     ]+csrr[         ]+a0,mhpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+b8702573[     ]+csrr[         ]+a0,mhpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+b8802573[     ]+csrr[         ]+a0,mhpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+b8902573[     ]+csrr[         ]+a0,mhpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+b8a02573[     ]+csrr[         ]+a0,mhpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+b8b02573[     ]+csrr[         ]+a0,mhpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+b8c02573[     ]+csrr[         ]+a0,mhpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+b8d02573[     ]+csrr[         ]+a0,mhpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+b8e02573[     ]+csrr[         ]+a0,mhpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+b8f02573[     ]+csrr[         ]+a0,mhpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+b9002573[     ]+csrr[         ]+a0,mhpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+b9102573[     ]+csrr[         ]+a0,mhpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+b9202573[     ]+csrr[         ]+a0,mhpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+b9302573[     ]+csrr[         ]+a0,mhpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+b9402573[     ]+csrr[         ]+a0,mhpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+b9502573[     ]+csrr[         ]+a0,mhpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+b9602573[     ]+csrr[         ]+a0,mhpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+b9702573[     ]+csrr[         ]+a0,mhpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+b9802573[     ]+csrr[         ]+a0,mhpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+b9902573[     ]+csrr[         ]+a0,mhpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+b9a02573[     ]+csrr[         ]+a0,mhpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+b9b02573[     ]+csrr[         ]+a0,mhpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+b9c02573[     ]+csrr[         ]+a0,mhpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+b9d02573[     ]+csrr[         ]+a0,mhpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+b9e02573[     ]+csrr[         ]+a0,mhpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+b9f02573[     ]+csrr[         ]+a0,mhpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,0x320
> +[      ]+[0-9a-f]+:[   ]+32302573[     ]+csrr[         ]+a0,mhpmevent3
> +[      ]+[0-9a-f]+:[   ]+32402573[     ]+csrr[         ]+a0,mhpmevent4
> +[      ]+[0-9a-f]+:[   ]+32502573[     ]+csrr[         ]+a0,mhpmevent5
> +[      ]+[0-9a-f]+:[   ]+32602573[     ]+csrr[         ]+a0,mhpmevent6
> +[      ]+[0-9a-f]+:[   ]+32702573[     ]+csrr[         ]+a0,mhpmevent7
> +[      ]+[0-9a-f]+:[   ]+32802573[     ]+csrr[         ]+a0,mhpmevent8
> +[      ]+[0-9a-f]+:[   ]+32902573[     ]+csrr[         ]+a0,mhpmevent9
> +[      ]+[0-9a-f]+:[   ]+32a02573[     ]+csrr[         ]+a0,mhpmevent10
> +[      ]+[0-9a-f]+:[   ]+32b02573[     ]+csrr[         ]+a0,mhpmevent11
> +[      ]+[0-9a-f]+:[   ]+32c02573[     ]+csrr[         ]+a0,mhpmevent12
> +[      ]+[0-9a-f]+:[   ]+32d02573[     ]+csrr[         ]+a0,mhpmevent13
> +[      ]+[0-9a-f]+:[   ]+32e02573[     ]+csrr[         ]+a0,mhpmevent14
> +[      ]+[0-9a-f]+:[   ]+32f02573[     ]+csrr[         ]+a0,mhpmevent15
> +[      ]+[0-9a-f]+:[   ]+33002573[     ]+csrr[         ]+a0,mhpmevent16
> +[      ]+[0-9a-f]+:[   ]+33102573[     ]+csrr[         ]+a0,mhpmevent17
> +[      ]+[0-9a-f]+:[   ]+33202573[     ]+csrr[         ]+a0,mhpmevent18
> +[      ]+[0-9a-f]+:[   ]+33302573[     ]+csrr[         ]+a0,mhpmevent19
> +[      ]+[0-9a-f]+:[   ]+33402573[     ]+csrr[         ]+a0,mhpmevent20
> +[      ]+[0-9a-f]+:[   ]+33502573[     ]+csrr[         ]+a0,mhpmevent21
> +[      ]+[0-9a-f]+:[   ]+33602573[     ]+csrr[         ]+a0,mhpmevent22
> +[      ]+[0-9a-f]+:[   ]+33702573[     ]+csrr[         ]+a0,mhpmevent23
> +[      ]+[0-9a-f]+:[   ]+33802573[     ]+csrr[         ]+a0,mhpmevent24
> +[      ]+[0-9a-f]+:[   ]+33902573[     ]+csrr[         ]+a0,mhpmevent25
> +[      ]+[0-9a-f]+:[   ]+33a02573[     ]+csrr[         ]+a0,mhpmevent26
> +[      ]+[0-9a-f]+:[   ]+33b02573[     ]+csrr[         ]+a0,mhpmevent27
> +[      ]+[0-9a-f]+:[   ]+33c02573[     ]+csrr[         ]+a0,mhpmevent28
> +[      ]+[0-9a-f]+:[   ]+33d02573[     ]+csrr[         ]+a0,mhpmevent29
> +[      ]+[0-9a-f]+:[   ]+33e02573[     ]+csrr[         ]+a0,mhpmevent30
> +[      ]+[0-9a-f]+:[   ]+33f02573[     ]+csrr[         ]+a0,mhpmevent31
> +[      ]+[0-9a-f]+:[   ]+7a002573[     ]+csrr[         ]+a0,tselect
> +[      ]+[0-9a-f]+:[   ]+7a102573[     ]+csrr[         ]+a0,tdata1
> +[      ]+[0-9a-f]+:[   ]+7a202573[     ]+csrr[         ]+a0,tdata2
> +[      ]+[0-9a-f]+:[   ]+7a302573[     ]+csrr[         ]+a0,tdata3
> +[      ]+[0-9a-f]+:[   ]+7b002573[     ]+csrr[         ]+a0,dcsr
> +[      ]+[0-9a-f]+:[   ]+7b102573[     ]+csrr[         ]+a0,dpc
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch
> +[      ]+[0-9a-f]+:[   ]+7b302573[     ]+csrr[         ]+a0,0x7b3
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,utval
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,stval
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,satp
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mtval
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,0x320
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch
> +[      ]+[0-9a-f]+:[   ]+20002573[     ]+csrr[         ]+a0,0x200
> +[      ]+[0-9a-f]+:[   ]+20202573[     ]+csrr[         ]+a0,0x202
> +[      ]+[0-9a-f]+:[   ]+20302573[     ]+csrr[         ]+a0,0x203
> +[      ]+[0-9a-f]+:[   ]+20402573[     ]+csrr[         ]+a0,0x204
> +[      ]+[0-9a-f]+:[   ]+20502573[     ]+csrr[         ]+a0,0x205
> +[      ]+[0-9a-f]+:[   ]+24002573[     ]+csrr[         ]+a0,0x240
> +[      ]+[0-9a-f]+:[   ]+24102573[     ]+csrr[         ]+a0,0x241
> +[      ]+[0-9a-f]+:[   ]+24202573[     ]+csrr[         ]+a0,0x242
> +[      ]+[0-9a-f]+:[   ]+24302573[     ]+csrr[         ]+a0,0x243
> +[      ]+[0-9a-f]+:[   ]+24402573[     ]+csrr[         ]+a0,0x244
> +[      ]+[0-9a-f]+:[   ]+38002573[     ]+csrr[         ]+a0,0x380
> +[      ]+[0-9a-f]+:[   ]+38102573[     ]+csrr[         ]+a0,0x381
> +[      ]+[0-9a-f]+:[   ]+38202573[     ]+csrr[         ]+a0,0x382
> +[      ]+[0-9a-f]+:[   ]+38302573[     ]+csrr[         ]+a0,0x383
> +[      ]+[0-9a-f]+:[   ]+38402573[     ]+csrr[         ]+a0,0x384
> +[      ]+[0-9a-f]+:[   ]+38502573[     ]+csrr[         ]+a0,0x385
> +[      ]+[0-9a-f]+:[   ]+32102573[     ]+csrr[         ]+a0,0x321
> +[      ]+[0-9a-f]+:[   ]+32202573[     ]+csrr[         ]+a0,0x322
> diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
> new file mode 100644
> index 0000000..1196c80
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d
> @@ -0,0 +1,257 @@
> +#as: -march=rv32if -mpriv-spec=1p11
> +#source: priv-reg.s
> +#objdump: -dr -Mpriv-spec=1p11
> +
> +.*:[   ]+file format .*
> +
> +
> +Disassembly of section .text:
> +
> +0+000 <.text>:
> +[      ]+[0-9a-f]+:[   ]+00002573[     ]+csrr[         ]+a0,ustatus
> +[      ]+[0-9a-f]+:[   ]+00402573[     ]+csrr[         ]+a0,uie
> +[      ]+[0-9a-f]+:[   ]+00502573[     ]+csrr[         ]+a0,utvec
> +[      ]+[0-9a-f]+:[   ]+04002573[     ]+csrr[         ]+a0,uscratch
> +[      ]+[0-9a-f]+:[   ]+04102573[     ]+csrr[         ]+a0,uepc
> +[      ]+[0-9a-f]+:[   ]+04202573[     ]+csrr[         ]+a0,ucause
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,utval
> +[      ]+[0-9a-f]+:[   ]+04402573[     ]+csrr[         ]+a0,uip
> +[      ]+[0-9a-f]+:[   ]+00102573[     ]+frflags[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+00202573[     ]+frrm[         ]+a0
> +[      ]+[0-9a-f]+:[   ]+00302573[     ]+frcsr[        ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0002573[     ]+rdcycle[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0102573[     ]+rdtime[       ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0202573[     ]+rdinstret[    ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0302573[     ]+csrr[         ]+a0,hpmcounter3
> +[      ]+[0-9a-f]+:[   ]+c0402573[     ]+csrr[         ]+a0,hpmcounter4
> +[      ]+[0-9a-f]+:[   ]+c0502573[     ]+csrr[         ]+a0,hpmcounter5
> +[      ]+[0-9a-f]+:[   ]+c0602573[     ]+csrr[         ]+a0,hpmcounter6
> +[      ]+[0-9a-f]+:[   ]+c0702573[     ]+csrr[         ]+a0,hpmcounter7
> +[      ]+[0-9a-f]+:[   ]+c0802573[     ]+csrr[         ]+a0,hpmcounter8
> +[      ]+[0-9a-f]+:[   ]+c0902573[     ]+csrr[         ]+a0,hpmcounter9
> +[      ]+[0-9a-f]+:[   ]+c0a02573[     ]+csrr[         ]+a0,hpmcounter10
> +[      ]+[0-9a-f]+:[   ]+c0b02573[     ]+csrr[         ]+a0,hpmcounter11
> +[      ]+[0-9a-f]+:[   ]+c0c02573[     ]+csrr[         ]+a0,hpmcounter12
> +[      ]+[0-9a-f]+:[   ]+c0d02573[     ]+csrr[         ]+a0,hpmcounter13
> +[      ]+[0-9a-f]+:[   ]+c0e02573[     ]+csrr[         ]+a0,hpmcounter14
> +[      ]+[0-9a-f]+:[   ]+c0f02573[     ]+csrr[         ]+a0,hpmcounter15
> +[      ]+[0-9a-f]+:[   ]+c1002573[     ]+csrr[         ]+a0,hpmcounter16
> +[      ]+[0-9a-f]+:[   ]+c1102573[     ]+csrr[         ]+a0,hpmcounter17
> +[      ]+[0-9a-f]+:[   ]+c1202573[     ]+csrr[         ]+a0,hpmcounter18
> +[      ]+[0-9a-f]+:[   ]+c1302573[     ]+csrr[         ]+a0,hpmcounter19
> +[      ]+[0-9a-f]+:[   ]+c1402573[     ]+csrr[         ]+a0,hpmcounter20
> +[      ]+[0-9a-f]+:[   ]+c1502573[     ]+csrr[         ]+a0,hpmcounter21
> +[      ]+[0-9a-f]+:[   ]+c1602573[     ]+csrr[         ]+a0,hpmcounter22
> +[      ]+[0-9a-f]+:[   ]+c1702573[     ]+csrr[         ]+a0,hpmcounter23
> +[      ]+[0-9a-f]+:[   ]+c1802573[     ]+csrr[         ]+a0,hpmcounter24
> +[      ]+[0-9a-f]+:[   ]+c1902573[     ]+csrr[         ]+a0,hpmcounter25
> +[      ]+[0-9a-f]+:[   ]+c1a02573[     ]+csrr[         ]+a0,hpmcounter26
> +[      ]+[0-9a-f]+:[   ]+c1b02573[     ]+csrr[         ]+a0,hpmcounter27
> +[      ]+[0-9a-f]+:[   ]+c1c02573[     ]+csrr[         ]+a0,hpmcounter28
> +[      ]+[0-9a-f]+:[   ]+c1d02573[     ]+csrr[         ]+a0,hpmcounter29
> +[      ]+[0-9a-f]+:[   ]+c1e02573[     ]+csrr[         ]+a0,hpmcounter30
> +[      ]+[0-9a-f]+:[   ]+c1f02573[     ]+csrr[         ]+a0,hpmcounter31
> +[      ]+[0-9a-f]+:[   ]+c8002573[     ]+rdcycleh[     ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8102573[     ]+rdtimeh[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8202573[     ]+rdinstreth[   ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8302573[     ]+csrr[         ]+a0,hpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+c8402573[     ]+csrr[         ]+a0,hpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+c8502573[     ]+csrr[         ]+a0,hpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+c8602573[     ]+csrr[         ]+a0,hpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+c8702573[     ]+csrr[         ]+a0,hpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+c8802573[     ]+csrr[         ]+a0,hpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+c8902573[     ]+csrr[         ]+a0,hpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+c8a02573[     ]+csrr[         ]+a0,hpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+c8b02573[     ]+csrr[         ]+a0,hpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+c8c02573[     ]+csrr[         ]+a0,hpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+c8d02573[     ]+csrr[         ]+a0,hpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+c8e02573[     ]+csrr[         ]+a0,hpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+c8f02573[     ]+csrr[         ]+a0,hpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+c9002573[     ]+csrr[         ]+a0,hpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+c9102573[     ]+csrr[         ]+a0,hpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+c9202573[     ]+csrr[         ]+a0,hpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+c9302573[     ]+csrr[         ]+a0,hpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+c9402573[     ]+csrr[         ]+a0,hpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+c9502573[     ]+csrr[         ]+a0,hpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+c9602573[     ]+csrr[         ]+a0,hpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+c9702573[     ]+csrr[         ]+a0,hpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+c9802573[     ]+csrr[         ]+a0,hpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+c9902573[     ]+csrr[         ]+a0,hpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+c9a02573[     ]+csrr[         ]+a0,hpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+c9b02573[     ]+csrr[         ]+a0,hpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+c9c02573[     ]+csrr[         ]+a0,hpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+c9d02573[     ]+csrr[         ]+a0,hpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+c9e02573[     ]+csrr[         ]+a0,hpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+c9f02573[     ]+csrr[         ]+a0,hpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+10002573[     ]+csrr[         ]+a0,sstatus
> +[      ]+[0-9a-f]+:[   ]+10202573[     ]+csrr[         ]+a0,sedeleg
> +[      ]+[0-9a-f]+:[   ]+10302573[     ]+csrr[         ]+a0,sideleg
> +[      ]+[0-9a-f]+:[   ]+10402573[     ]+csrr[         ]+a0,sie
> +[      ]+[0-9a-f]+:[   ]+10502573[     ]+csrr[         ]+a0,stvec
> +[      ]+[0-9a-f]+:[   ]+10602573[     ]+csrr[         ]+a0,scounteren
> +[      ]+[0-9a-f]+:[   ]+14002573[     ]+csrr[         ]+a0,sscratch
> +[      ]+[0-9a-f]+:[   ]+14102573[     ]+csrr[         ]+a0,sepc
> +[      ]+[0-9a-f]+:[   ]+14202573[     ]+csrr[         ]+a0,scause
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,stval
> +[      ]+[0-9a-f]+:[   ]+14402573[     ]+csrr[         ]+a0,sip
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,satp
> +[      ]+[0-9a-f]+:[   ]+f1102573[     ]+csrr[         ]+a0,mvendorid
> +[      ]+[0-9a-f]+:[   ]+f1202573[     ]+csrr[         ]+a0,marchid
> +[      ]+[0-9a-f]+:[   ]+f1302573[     ]+csrr[         ]+a0,mimpid
> +[      ]+[0-9a-f]+:[   ]+f1402573[     ]+csrr[         ]+a0,mhartid
> +[      ]+[0-9a-f]+:[   ]+30002573[     ]+csrr[         ]+a0,mstatus
> +[      ]+[0-9a-f]+:[   ]+30102573[     ]+csrr[         ]+a0,misa
> +[      ]+[0-9a-f]+:[   ]+30202573[     ]+csrr[         ]+a0,medeleg
> +[      ]+[0-9a-f]+:[   ]+30302573[     ]+csrr[         ]+a0,mideleg
> +[      ]+[0-9a-f]+:[   ]+30402573[     ]+csrr[         ]+a0,mie
> +[      ]+[0-9a-f]+:[   ]+30502573[     ]+csrr[         ]+a0,mtvec
> +[      ]+[0-9a-f]+:[   ]+30602573[     ]+csrr[         ]+a0,mcounteren
> +[      ]+[0-9a-f]+:[   ]+34002573[     ]+csrr[         ]+a0,mscratch
> +[      ]+[0-9a-f]+:[   ]+34102573[     ]+csrr[         ]+a0,mepc
> +[      ]+[0-9a-f]+:[   ]+34202573[     ]+csrr[         ]+a0,mcause
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mtval
> +[      ]+[0-9a-f]+:[   ]+34402573[     ]+csrr[         ]+a0,mip
> +[      ]+[0-9a-f]+:[   ]+3a002573[     ]+csrr[         ]+a0,pmpcfg0
> +[      ]+[0-9a-f]+:[   ]+3a102573[     ]+csrr[         ]+a0,pmpcfg1
> +[      ]+[0-9a-f]+:[   ]+3a202573[     ]+csrr[         ]+a0,pmpcfg2
> +[      ]+[0-9a-f]+:[   ]+3a302573[     ]+csrr[         ]+a0,pmpcfg3
> +[      ]+[0-9a-f]+:[   ]+3b002573[     ]+csrr[         ]+a0,pmpaddr0
> +[      ]+[0-9a-f]+:[   ]+3b102573[     ]+csrr[         ]+a0,pmpaddr1
> +[      ]+[0-9a-f]+:[   ]+3b202573[     ]+csrr[         ]+a0,pmpaddr2
> +[      ]+[0-9a-f]+:[   ]+3b302573[     ]+csrr[         ]+a0,pmpaddr3
> +[      ]+[0-9a-f]+:[   ]+3b402573[     ]+csrr[         ]+a0,pmpaddr4
> +[      ]+[0-9a-f]+:[   ]+3b502573[     ]+csrr[         ]+a0,pmpaddr5
> +[      ]+[0-9a-f]+:[   ]+3b602573[     ]+csrr[         ]+a0,pmpaddr6
> +[      ]+[0-9a-f]+:[   ]+3b702573[     ]+csrr[         ]+a0,pmpaddr7
> +[      ]+[0-9a-f]+:[   ]+3b802573[     ]+csrr[         ]+a0,pmpaddr8
> +[      ]+[0-9a-f]+:[   ]+3b902573[     ]+csrr[         ]+a0,pmpaddr9
> +[      ]+[0-9a-f]+:[   ]+3ba02573[     ]+csrr[         ]+a0,pmpaddr10
> +[      ]+[0-9a-f]+:[   ]+3bb02573[     ]+csrr[         ]+a0,pmpaddr11
> +[      ]+[0-9a-f]+:[   ]+3bc02573[     ]+csrr[         ]+a0,pmpaddr12
> +[      ]+[0-9a-f]+:[   ]+3bd02573[     ]+csrr[         ]+a0,pmpaddr13
> +[      ]+[0-9a-f]+:[   ]+3be02573[     ]+csrr[         ]+a0,pmpaddr14
> +[      ]+[0-9a-f]+:[   ]+3bf02573[     ]+csrr[         ]+a0,pmpaddr15
> +[      ]+[0-9a-f]+:[   ]+b0002573[     ]+csrr[         ]+a0,mcycle
> +[      ]+[0-9a-f]+:[   ]+b0202573[     ]+csrr[         ]+a0,minstret
> +[      ]+[0-9a-f]+:[   ]+b0302573[     ]+csrr[         ]+a0,mhpmcounter3
> +[      ]+[0-9a-f]+:[   ]+b0402573[     ]+csrr[         ]+a0,mhpmcounter4
> +[      ]+[0-9a-f]+:[   ]+b0502573[     ]+csrr[         ]+a0,mhpmcounter5
> +[      ]+[0-9a-f]+:[   ]+b0602573[     ]+csrr[         ]+a0,mhpmcounter6
> +[      ]+[0-9a-f]+:[   ]+b0702573[     ]+csrr[         ]+a0,mhpmcounter7
> +[      ]+[0-9a-f]+:[   ]+b0802573[     ]+csrr[         ]+a0,mhpmcounter8
> +[      ]+[0-9a-f]+:[   ]+b0902573[     ]+csrr[         ]+a0,mhpmcounter9
> +[      ]+[0-9a-f]+:[   ]+b0a02573[     ]+csrr[         ]+a0,mhpmcounter10
> +[      ]+[0-9a-f]+:[   ]+b0b02573[     ]+csrr[         ]+a0,mhpmcounter11
> +[      ]+[0-9a-f]+:[   ]+b0c02573[     ]+csrr[         ]+a0,mhpmcounter12
> +[      ]+[0-9a-f]+:[   ]+b0d02573[     ]+csrr[         ]+a0,mhpmcounter13
> +[      ]+[0-9a-f]+:[   ]+b0e02573[     ]+csrr[         ]+a0,mhpmcounter14
> +[      ]+[0-9a-f]+:[   ]+b0f02573[     ]+csrr[         ]+a0,mhpmcounter15
> +[      ]+[0-9a-f]+:[   ]+b1002573[     ]+csrr[         ]+a0,mhpmcounter16
> +[      ]+[0-9a-f]+:[   ]+b1102573[     ]+csrr[         ]+a0,mhpmcounter17
> +[      ]+[0-9a-f]+:[   ]+b1202573[     ]+csrr[         ]+a0,mhpmcounter18
> +[      ]+[0-9a-f]+:[   ]+b1302573[     ]+csrr[         ]+a0,mhpmcounter19
> +[      ]+[0-9a-f]+:[   ]+b1402573[     ]+csrr[         ]+a0,mhpmcounter20
> +[      ]+[0-9a-f]+:[   ]+b1502573[     ]+csrr[         ]+a0,mhpmcounter21
> +[      ]+[0-9a-f]+:[   ]+b1602573[     ]+csrr[         ]+a0,mhpmcounter22
> +[      ]+[0-9a-f]+:[   ]+b1702573[     ]+csrr[         ]+a0,mhpmcounter23
> +[      ]+[0-9a-f]+:[   ]+b1802573[     ]+csrr[         ]+a0,mhpmcounter24
> +[      ]+[0-9a-f]+:[   ]+b1902573[     ]+csrr[         ]+a0,mhpmcounter25
> +[      ]+[0-9a-f]+:[   ]+b1a02573[     ]+csrr[         ]+a0,mhpmcounter26
> +[      ]+[0-9a-f]+:[   ]+b1b02573[     ]+csrr[         ]+a0,mhpmcounter27
> +[      ]+[0-9a-f]+:[   ]+b1c02573[     ]+csrr[         ]+a0,mhpmcounter28
> +[      ]+[0-9a-f]+:[   ]+b1d02573[     ]+csrr[         ]+a0,mhpmcounter29
> +[      ]+[0-9a-f]+:[   ]+b1e02573[     ]+csrr[         ]+a0,mhpmcounter30
> +[      ]+[0-9a-f]+:[   ]+b1f02573[     ]+csrr[         ]+a0,mhpmcounter31
> +[      ]+[0-9a-f]+:[   ]+b8002573[     ]+csrr[         ]+a0,mcycleh
> +[      ]+[0-9a-f]+:[   ]+b8202573[     ]+csrr[         ]+a0,minstreth
> +[      ]+[0-9a-f]+:[   ]+b8302573[     ]+csrr[         ]+a0,mhpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+b8402573[     ]+csrr[         ]+a0,mhpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+b8502573[     ]+csrr[         ]+a0,mhpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+b8602573[     ]+csrr[         ]+a0,mhpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+b8702573[     ]+csrr[         ]+a0,mhpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+b8802573[     ]+csrr[         ]+a0,mhpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+b8902573[     ]+csrr[         ]+a0,mhpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+b8a02573[     ]+csrr[         ]+a0,mhpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+b8b02573[     ]+csrr[         ]+a0,mhpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+b8c02573[     ]+csrr[         ]+a0,mhpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+b8d02573[     ]+csrr[         ]+a0,mhpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+b8e02573[     ]+csrr[         ]+a0,mhpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+b8f02573[     ]+csrr[         ]+a0,mhpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+b9002573[     ]+csrr[         ]+a0,mhpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+b9102573[     ]+csrr[         ]+a0,mhpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+b9202573[     ]+csrr[         ]+a0,mhpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+b9302573[     ]+csrr[         ]+a0,mhpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+b9402573[     ]+csrr[         ]+a0,mhpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+b9502573[     ]+csrr[         ]+a0,mhpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+b9602573[     ]+csrr[         ]+a0,mhpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+b9702573[     ]+csrr[         ]+a0,mhpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+b9802573[     ]+csrr[         ]+a0,mhpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+b9902573[     ]+csrr[         ]+a0,mhpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+b9a02573[     ]+csrr[         ]+a0,mhpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+b9b02573[     ]+csrr[         ]+a0,mhpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+b9c02573[     ]+csrr[         ]+a0,mhpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+b9d02573[     ]+csrr[         ]+a0,mhpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+b9e02573[     ]+csrr[         ]+a0,mhpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+b9f02573[     ]+csrr[         ]+a0,mhpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mcountinhibit
> +[      ]+[0-9a-f]+:[   ]+32302573[     ]+csrr[         ]+a0,mhpmevent3
> +[      ]+[0-9a-f]+:[   ]+32402573[     ]+csrr[         ]+a0,mhpmevent4
> +[      ]+[0-9a-f]+:[   ]+32502573[     ]+csrr[         ]+a0,mhpmevent5
> +[      ]+[0-9a-f]+:[   ]+32602573[     ]+csrr[         ]+a0,mhpmevent6
> +[      ]+[0-9a-f]+:[   ]+32702573[     ]+csrr[         ]+a0,mhpmevent7
> +[      ]+[0-9a-f]+:[   ]+32802573[     ]+csrr[         ]+a0,mhpmevent8
> +[      ]+[0-9a-f]+:[   ]+32902573[     ]+csrr[         ]+a0,mhpmevent9
> +[      ]+[0-9a-f]+:[   ]+32a02573[     ]+csrr[         ]+a0,mhpmevent10
> +[      ]+[0-9a-f]+:[   ]+32b02573[     ]+csrr[         ]+a0,mhpmevent11
> +[      ]+[0-9a-f]+:[   ]+32c02573[     ]+csrr[         ]+a0,mhpmevent12
> +[      ]+[0-9a-f]+:[   ]+32d02573[     ]+csrr[         ]+a0,mhpmevent13
> +[      ]+[0-9a-f]+:[   ]+32e02573[     ]+csrr[         ]+a0,mhpmevent14
> +[      ]+[0-9a-f]+:[   ]+32f02573[     ]+csrr[         ]+a0,mhpmevent15
> +[      ]+[0-9a-f]+:[   ]+33002573[     ]+csrr[         ]+a0,mhpmevent16
> +[      ]+[0-9a-f]+:[   ]+33102573[     ]+csrr[         ]+a0,mhpmevent17
> +[      ]+[0-9a-f]+:[   ]+33202573[     ]+csrr[         ]+a0,mhpmevent18
> +[      ]+[0-9a-f]+:[   ]+33302573[     ]+csrr[         ]+a0,mhpmevent19
> +[      ]+[0-9a-f]+:[   ]+33402573[     ]+csrr[         ]+a0,mhpmevent20
> +[      ]+[0-9a-f]+:[   ]+33502573[     ]+csrr[         ]+a0,mhpmevent21
> +[      ]+[0-9a-f]+:[   ]+33602573[     ]+csrr[         ]+a0,mhpmevent22
> +[      ]+[0-9a-f]+:[   ]+33702573[     ]+csrr[         ]+a0,mhpmevent23
> +[      ]+[0-9a-f]+:[   ]+33802573[     ]+csrr[         ]+a0,mhpmevent24
> +[      ]+[0-9a-f]+:[   ]+33902573[     ]+csrr[         ]+a0,mhpmevent25
> +[      ]+[0-9a-f]+:[   ]+33a02573[     ]+csrr[         ]+a0,mhpmevent26
> +[      ]+[0-9a-f]+:[   ]+33b02573[     ]+csrr[         ]+a0,mhpmevent27
> +[      ]+[0-9a-f]+:[   ]+33c02573[     ]+csrr[         ]+a0,mhpmevent28
> +[      ]+[0-9a-f]+:[   ]+33d02573[     ]+csrr[         ]+a0,mhpmevent29
> +[      ]+[0-9a-f]+:[   ]+33e02573[     ]+csrr[         ]+a0,mhpmevent30
> +[      ]+[0-9a-f]+:[   ]+33f02573[     ]+csrr[         ]+a0,mhpmevent31
> +[      ]+[0-9a-f]+:[   ]+7a002573[     ]+csrr[         ]+a0,tselect
> +[      ]+[0-9a-f]+:[   ]+7a102573[     ]+csrr[         ]+a0,tdata1
> +[      ]+[0-9a-f]+:[   ]+7a202573[     ]+csrr[         ]+a0,tdata2
> +[      ]+[0-9a-f]+:[   ]+7a302573[     ]+csrr[         ]+a0,tdata3
> +[      ]+[0-9a-f]+:[   ]+7b002573[     ]+csrr[         ]+a0,dcsr
> +[      ]+[0-9a-f]+:[   ]+7b102573[     ]+csrr[         ]+a0,dpc
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch0
> +[      ]+[0-9a-f]+:[   ]+7b302573[     ]+csrr[         ]+a0,dscratch1
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,utval
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,stval
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,satp
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mtval
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mcountinhibit
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch0
> +[      ]+[0-9a-f]+:[   ]+20002573[     ]+csrr[         ]+a0,0x200
> +[      ]+[0-9a-f]+:[   ]+20202573[     ]+csrr[         ]+a0,0x202
> +[      ]+[0-9a-f]+:[   ]+20302573[     ]+csrr[         ]+a0,0x203
> +[      ]+[0-9a-f]+:[   ]+20402573[     ]+csrr[         ]+a0,0x204
> +[      ]+[0-9a-f]+:[   ]+20502573[     ]+csrr[         ]+a0,0x205
> +[      ]+[0-9a-f]+:[   ]+24002573[     ]+csrr[         ]+a0,0x240
> +[      ]+[0-9a-f]+:[   ]+24102573[     ]+csrr[         ]+a0,0x241
> +[      ]+[0-9a-f]+:[   ]+24202573[     ]+csrr[         ]+a0,0x242
> +[      ]+[0-9a-f]+:[   ]+24302573[     ]+csrr[         ]+a0,0x243
> +[      ]+[0-9a-f]+:[   ]+24402573[     ]+csrr[         ]+a0,0x244
> +[      ]+[0-9a-f]+:[   ]+38002573[     ]+csrr[         ]+a0,0x380
> +[      ]+[0-9a-f]+:[   ]+38102573[     ]+csrr[         ]+a0,0x381
> +[      ]+[0-9a-f]+:[   ]+38202573[     ]+csrr[         ]+a0,0x382
> +[      ]+[0-9a-f]+:[   ]+38302573[     ]+csrr[         ]+a0,0x383
> +[      ]+[0-9a-f]+:[   ]+38402573[     ]+csrr[         ]+a0,0x384
> +[      ]+[0-9a-f]+:[   ]+38502573[     ]+csrr[         ]+a0,0x385
> +[      ]+[0-9a-f]+:[   ]+32102573[     ]+csrr[         ]+a0,0x321
> +[      ]+[0-9a-f]+:[   ]+32202573[     ]+csrr[         ]+a0,0x322
> diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-version-1p9.d
> new file mode 100644
> index 0000000..1b5a5a7
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p9.d
> @@ -0,0 +1,257 @@
> +#as: -march=rv32if -mpriv-spec=1p9
> +#source: priv-reg.s
> +#objdump: -dr -Mpriv-spec=1p9
> +
> +.*:[   ]+file format .*
> +
> +
> +Disassembly of section .text:
> +
> +0+000 <.text>:
> +[      ]+[0-9a-f]+:[   ]+00002573[     ]+csrr[         ]+a0,ustatus
> +[      ]+[0-9a-f]+:[   ]+00402573[     ]+csrr[         ]+a0,uie
> +[      ]+[0-9a-f]+:[   ]+00502573[     ]+csrr[         ]+a0,utvec
> +[      ]+[0-9a-f]+:[   ]+04002573[     ]+csrr[         ]+a0,uscratch
> +[      ]+[0-9a-f]+:[   ]+04102573[     ]+csrr[         ]+a0,uepc
> +[      ]+[0-9a-f]+:[   ]+04202573[     ]+csrr[         ]+a0,ucause
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,ubadaddr
> +[      ]+[0-9a-f]+:[   ]+04402573[     ]+csrr[         ]+a0,uip
> +[      ]+[0-9a-f]+:[   ]+00102573[     ]+frflags[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+00202573[     ]+frrm[         ]+a0
> +[      ]+[0-9a-f]+:[   ]+00302573[     ]+frcsr[        ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0002573[     ]+rdcycle[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0102573[     ]+rdtime[       ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0202573[     ]+rdinstret[    ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0302573[     ]+csrr[         ]+a0,hpmcounter3
> +[      ]+[0-9a-f]+:[   ]+c0402573[     ]+csrr[         ]+a0,hpmcounter4
> +[      ]+[0-9a-f]+:[   ]+c0502573[     ]+csrr[         ]+a0,hpmcounter5
> +[      ]+[0-9a-f]+:[   ]+c0602573[     ]+csrr[         ]+a0,hpmcounter6
> +[      ]+[0-9a-f]+:[   ]+c0702573[     ]+csrr[         ]+a0,hpmcounter7
> +[      ]+[0-9a-f]+:[   ]+c0802573[     ]+csrr[         ]+a0,hpmcounter8
> +[      ]+[0-9a-f]+:[   ]+c0902573[     ]+csrr[         ]+a0,hpmcounter9
> +[      ]+[0-9a-f]+:[   ]+c0a02573[     ]+csrr[         ]+a0,hpmcounter10
> +[      ]+[0-9a-f]+:[   ]+c0b02573[     ]+csrr[         ]+a0,hpmcounter11
> +[      ]+[0-9a-f]+:[   ]+c0c02573[     ]+csrr[         ]+a0,hpmcounter12
> +[      ]+[0-9a-f]+:[   ]+c0d02573[     ]+csrr[         ]+a0,hpmcounter13
> +[      ]+[0-9a-f]+:[   ]+c0e02573[     ]+csrr[         ]+a0,hpmcounter14
> +[      ]+[0-9a-f]+:[   ]+c0f02573[     ]+csrr[         ]+a0,hpmcounter15
> +[      ]+[0-9a-f]+:[   ]+c1002573[     ]+csrr[         ]+a0,hpmcounter16
> +[      ]+[0-9a-f]+:[   ]+c1102573[     ]+csrr[         ]+a0,hpmcounter17
> +[      ]+[0-9a-f]+:[   ]+c1202573[     ]+csrr[         ]+a0,hpmcounter18
> +[      ]+[0-9a-f]+:[   ]+c1302573[     ]+csrr[         ]+a0,hpmcounter19
> +[      ]+[0-9a-f]+:[   ]+c1402573[     ]+csrr[         ]+a0,hpmcounter20
> +[      ]+[0-9a-f]+:[   ]+c1502573[     ]+csrr[         ]+a0,hpmcounter21
> +[      ]+[0-9a-f]+:[   ]+c1602573[     ]+csrr[         ]+a0,hpmcounter22
> +[      ]+[0-9a-f]+:[   ]+c1702573[     ]+csrr[         ]+a0,hpmcounter23
> +[      ]+[0-9a-f]+:[   ]+c1802573[     ]+csrr[         ]+a0,hpmcounter24
> +[      ]+[0-9a-f]+:[   ]+c1902573[     ]+csrr[         ]+a0,hpmcounter25
> +[      ]+[0-9a-f]+:[   ]+c1a02573[     ]+csrr[         ]+a0,hpmcounter26
> +[      ]+[0-9a-f]+:[   ]+c1b02573[     ]+csrr[         ]+a0,hpmcounter27
> +[      ]+[0-9a-f]+:[   ]+c1c02573[     ]+csrr[         ]+a0,hpmcounter28
> +[      ]+[0-9a-f]+:[   ]+c1d02573[     ]+csrr[         ]+a0,hpmcounter29
> +[      ]+[0-9a-f]+:[   ]+c1e02573[     ]+csrr[         ]+a0,hpmcounter30
> +[      ]+[0-9a-f]+:[   ]+c1f02573[     ]+csrr[         ]+a0,hpmcounter31
> +[      ]+[0-9a-f]+:[   ]+c8002573[     ]+rdcycleh[     ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8102573[     ]+rdtimeh[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8202573[     ]+rdinstreth[   ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8302573[     ]+csrr[         ]+a0,hpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+c8402573[     ]+csrr[         ]+a0,hpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+c8502573[     ]+csrr[         ]+a0,hpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+c8602573[     ]+csrr[         ]+a0,hpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+c8702573[     ]+csrr[         ]+a0,hpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+c8802573[     ]+csrr[         ]+a0,hpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+c8902573[     ]+csrr[         ]+a0,hpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+c8a02573[     ]+csrr[         ]+a0,hpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+c8b02573[     ]+csrr[         ]+a0,hpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+c8c02573[     ]+csrr[         ]+a0,hpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+c8d02573[     ]+csrr[         ]+a0,hpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+c8e02573[     ]+csrr[         ]+a0,hpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+c8f02573[     ]+csrr[         ]+a0,hpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+c9002573[     ]+csrr[         ]+a0,hpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+c9102573[     ]+csrr[         ]+a0,hpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+c9202573[     ]+csrr[         ]+a0,hpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+c9302573[     ]+csrr[         ]+a0,hpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+c9402573[     ]+csrr[         ]+a0,hpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+c9502573[     ]+csrr[         ]+a0,hpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+c9602573[     ]+csrr[         ]+a0,hpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+c9702573[     ]+csrr[         ]+a0,hpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+c9802573[     ]+csrr[         ]+a0,hpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+c9902573[     ]+csrr[         ]+a0,hpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+c9a02573[     ]+csrr[         ]+a0,hpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+c9b02573[     ]+csrr[         ]+a0,hpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+c9c02573[     ]+csrr[         ]+a0,hpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+c9d02573[     ]+csrr[         ]+a0,hpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+c9e02573[     ]+csrr[         ]+a0,hpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+c9f02573[     ]+csrr[         ]+a0,hpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+10002573[     ]+csrr[         ]+a0,sstatus
> +[      ]+[0-9a-f]+:[   ]+10202573[     ]+csrr[         ]+a0,sedeleg
> +[      ]+[0-9a-f]+:[   ]+10302573[     ]+csrr[         ]+a0,sideleg
> +[      ]+[0-9a-f]+:[   ]+10402573[     ]+csrr[         ]+a0,sie
> +[      ]+[0-9a-f]+:[   ]+10502573[     ]+csrr[         ]+a0,stvec
> +[      ]+[0-9a-f]+:[   ]+10602573[     ]+csrr[         ]+a0,0x106
> +[      ]+[0-9a-f]+:[   ]+14002573[     ]+csrr[         ]+a0,sscratch
> +[      ]+[0-9a-f]+:[   ]+14102573[     ]+csrr[         ]+a0,sepc
> +[      ]+[0-9a-f]+:[   ]+14202573[     ]+csrr[         ]+a0,scause
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,sbadaddr
> +[      ]+[0-9a-f]+:[   ]+14402573[     ]+csrr[         ]+a0,sip
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,sptbr
> +[      ]+[0-9a-f]+:[   ]+f1102573[     ]+csrr[         ]+a0,mvendorid
> +[      ]+[0-9a-f]+:[   ]+f1202573[     ]+csrr[         ]+a0,marchid
> +[      ]+[0-9a-f]+:[   ]+f1302573[     ]+csrr[         ]+a0,mimpid
> +[      ]+[0-9a-f]+:[   ]+f1402573[     ]+csrr[         ]+a0,mhartid
> +[      ]+[0-9a-f]+:[   ]+30002573[     ]+csrr[         ]+a0,mstatus
> +[      ]+[0-9a-f]+:[   ]+f1002573[     ]+csrr[         ]+a0,misa
> +[      ]+[0-9a-f]+:[   ]+30202573[     ]+csrr[         ]+a0,medeleg
> +[      ]+[0-9a-f]+:[   ]+30302573[     ]+csrr[         ]+a0,mideleg
> +[      ]+[0-9a-f]+:[   ]+30402573[     ]+csrr[         ]+a0,mie
> +[      ]+[0-9a-f]+:[   ]+30502573[     ]+csrr[         ]+a0,mtvec
> +[      ]+[0-9a-f]+:[   ]+30602573[     ]+csrr[         ]+a0,0x306
> +[      ]+[0-9a-f]+:[   ]+34002573[     ]+csrr[         ]+a0,mscratch
> +[      ]+[0-9a-f]+:[   ]+34102573[     ]+csrr[         ]+a0,mepc
> +[      ]+[0-9a-f]+:[   ]+34202573[     ]+csrr[         ]+a0,mcause
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mbadaddr
> +[      ]+[0-9a-f]+:[   ]+34402573[     ]+csrr[         ]+a0,mip
> +[      ]+[0-9a-f]+:[   ]+3a002573[     ]+csrr[         ]+a0,0x3a0
> +[      ]+[0-9a-f]+:[   ]+3a102573[     ]+csrr[         ]+a0,0x3a1
> +[      ]+[0-9a-f]+:[   ]+3a202573[     ]+csrr[         ]+a0,0x3a2
> +[      ]+[0-9a-f]+:[   ]+3a302573[     ]+csrr[         ]+a0,0x3a3
> +[      ]+[0-9a-f]+:[   ]+3b002573[     ]+csrr[         ]+a0,0x3b0
> +[      ]+[0-9a-f]+:[   ]+3b102573[     ]+csrr[         ]+a0,0x3b1
> +[      ]+[0-9a-f]+:[   ]+3b202573[     ]+csrr[         ]+a0,0x3b2
> +[      ]+[0-9a-f]+:[   ]+3b302573[     ]+csrr[         ]+a0,0x3b3
> +[      ]+[0-9a-f]+:[   ]+3b402573[     ]+csrr[         ]+a0,0x3b4
> +[      ]+[0-9a-f]+:[   ]+3b502573[     ]+csrr[         ]+a0,0x3b5
> +[      ]+[0-9a-f]+:[   ]+3b602573[     ]+csrr[         ]+a0,0x3b6
> +[      ]+[0-9a-f]+:[   ]+3b702573[     ]+csrr[         ]+a0,0x3b7
> +[      ]+[0-9a-f]+:[   ]+3b802573[     ]+csrr[         ]+a0,0x3b8
> +[      ]+[0-9a-f]+:[   ]+3b902573[     ]+csrr[         ]+a0,0x3b9
> +[      ]+[0-9a-f]+:[   ]+3ba02573[     ]+csrr[         ]+a0,0x3ba
> +[      ]+[0-9a-f]+:[   ]+3bb02573[     ]+csrr[         ]+a0,0x3bb
> +[      ]+[0-9a-f]+:[   ]+3bc02573[     ]+csrr[         ]+a0,0x3bc
> +[      ]+[0-9a-f]+:[   ]+3bd02573[     ]+csrr[         ]+a0,0x3bd
> +[      ]+[0-9a-f]+:[   ]+3be02573[     ]+csrr[         ]+a0,0x3be
> +[      ]+[0-9a-f]+:[   ]+3bf02573[     ]+csrr[         ]+a0,0x3bf
> +[      ]+[0-9a-f]+:[   ]+b0002573[     ]+csrr[         ]+a0,mcycle
> +[      ]+[0-9a-f]+:[   ]+b0202573[     ]+csrr[         ]+a0,minstret
> +[      ]+[0-9a-f]+:[   ]+b0302573[     ]+csrr[         ]+a0,mhpmcounter3
> +[      ]+[0-9a-f]+:[   ]+b0402573[     ]+csrr[         ]+a0,mhpmcounter4
> +[      ]+[0-9a-f]+:[   ]+b0502573[     ]+csrr[         ]+a0,mhpmcounter5
> +[      ]+[0-9a-f]+:[   ]+b0602573[     ]+csrr[         ]+a0,mhpmcounter6
> +[      ]+[0-9a-f]+:[   ]+b0702573[     ]+csrr[         ]+a0,mhpmcounter7
> +[      ]+[0-9a-f]+:[   ]+b0802573[     ]+csrr[         ]+a0,mhpmcounter8
> +[      ]+[0-9a-f]+:[   ]+b0902573[     ]+csrr[         ]+a0,mhpmcounter9
> +[      ]+[0-9a-f]+:[   ]+b0a02573[     ]+csrr[         ]+a0,mhpmcounter10
> +[      ]+[0-9a-f]+:[   ]+b0b02573[     ]+csrr[         ]+a0,mhpmcounter11
> +[      ]+[0-9a-f]+:[   ]+b0c02573[     ]+csrr[         ]+a0,mhpmcounter12
> +[      ]+[0-9a-f]+:[   ]+b0d02573[     ]+csrr[         ]+a0,mhpmcounter13
> +[      ]+[0-9a-f]+:[   ]+b0e02573[     ]+csrr[         ]+a0,mhpmcounter14
> +[      ]+[0-9a-f]+:[   ]+b0f02573[     ]+csrr[         ]+a0,mhpmcounter15
> +[      ]+[0-9a-f]+:[   ]+b1002573[     ]+csrr[         ]+a0,mhpmcounter16
> +[      ]+[0-9a-f]+:[   ]+b1102573[     ]+csrr[         ]+a0,mhpmcounter17
> +[      ]+[0-9a-f]+:[   ]+b1202573[     ]+csrr[         ]+a0,mhpmcounter18
> +[      ]+[0-9a-f]+:[   ]+b1302573[     ]+csrr[         ]+a0,mhpmcounter19
> +[      ]+[0-9a-f]+:[   ]+b1402573[     ]+csrr[         ]+a0,mhpmcounter20
> +[      ]+[0-9a-f]+:[   ]+b1502573[     ]+csrr[         ]+a0,mhpmcounter21
> +[      ]+[0-9a-f]+:[   ]+b1602573[     ]+csrr[         ]+a0,mhpmcounter22
> +[      ]+[0-9a-f]+:[   ]+b1702573[     ]+csrr[         ]+a0,mhpmcounter23
> +[      ]+[0-9a-f]+:[   ]+b1802573[     ]+csrr[         ]+a0,mhpmcounter24
> +[      ]+[0-9a-f]+:[   ]+b1902573[     ]+csrr[         ]+a0,mhpmcounter25
> +[      ]+[0-9a-f]+:[   ]+b1a02573[     ]+csrr[         ]+a0,mhpmcounter26
> +[      ]+[0-9a-f]+:[   ]+b1b02573[     ]+csrr[         ]+a0,mhpmcounter27
> +[      ]+[0-9a-f]+:[   ]+b1c02573[     ]+csrr[         ]+a0,mhpmcounter28
> +[      ]+[0-9a-f]+:[   ]+b1d02573[     ]+csrr[         ]+a0,mhpmcounter29
> +[      ]+[0-9a-f]+:[   ]+b1e02573[     ]+csrr[         ]+a0,mhpmcounter30
> +[      ]+[0-9a-f]+:[   ]+b1f02573[     ]+csrr[         ]+a0,mhpmcounter31
> +[      ]+[0-9a-f]+:[   ]+b8002573[     ]+csrr[         ]+a0,mcycleh
> +[      ]+[0-9a-f]+:[   ]+b8202573[     ]+csrr[         ]+a0,minstreth
> +[      ]+[0-9a-f]+:[   ]+b8302573[     ]+csrr[         ]+a0,mhpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+b8402573[     ]+csrr[         ]+a0,mhpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+b8502573[     ]+csrr[         ]+a0,mhpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+b8602573[     ]+csrr[         ]+a0,mhpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+b8702573[     ]+csrr[         ]+a0,mhpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+b8802573[     ]+csrr[         ]+a0,mhpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+b8902573[     ]+csrr[         ]+a0,mhpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+b8a02573[     ]+csrr[         ]+a0,mhpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+b8b02573[     ]+csrr[         ]+a0,mhpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+b8c02573[     ]+csrr[         ]+a0,mhpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+b8d02573[     ]+csrr[         ]+a0,mhpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+b8e02573[     ]+csrr[         ]+a0,mhpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+b8f02573[     ]+csrr[         ]+a0,mhpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+b9002573[     ]+csrr[         ]+a0,mhpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+b9102573[     ]+csrr[         ]+a0,mhpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+b9202573[     ]+csrr[         ]+a0,mhpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+b9302573[     ]+csrr[         ]+a0,mhpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+b9402573[     ]+csrr[         ]+a0,mhpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+b9502573[     ]+csrr[         ]+a0,mhpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+b9602573[     ]+csrr[         ]+a0,mhpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+b9702573[     ]+csrr[         ]+a0,mhpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+b9802573[     ]+csrr[         ]+a0,mhpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+b9902573[     ]+csrr[         ]+a0,mhpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+b9a02573[     ]+csrr[         ]+a0,mhpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+b9b02573[     ]+csrr[         ]+a0,mhpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+b9c02573[     ]+csrr[         ]+a0,mhpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+b9d02573[     ]+csrr[         ]+a0,mhpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+b9e02573[     ]+csrr[         ]+a0,mhpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+b9f02573[     ]+csrr[         ]+a0,mhpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mucounteren
> +[      ]+[0-9a-f]+:[   ]+32302573[     ]+csrr[         ]+a0,mhpmevent3
> +[      ]+[0-9a-f]+:[   ]+32402573[     ]+csrr[         ]+a0,mhpmevent4
> +[      ]+[0-9a-f]+:[   ]+32502573[     ]+csrr[         ]+a0,mhpmevent5
> +[      ]+[0-9a-f]+:[   ]+32602573[     ]+csrr[         ]+a0,mhpmevent6
> +[      ]+[0-9a-f]+:[   ]+32702573[     ]+csrr[         ]+a0,mhpmevent7
> +[      ]+[0-9a-f]+:[   ]+32802573[     ]+csrr[         ]+a0,mhpmevent8
> +[      ]+[0-9a-f]+:[   ]+32902573[     ]+csrr[         ]+a0,mhpmevent9
> +[      ]+[0-9a-f]+:[   ]+32a02573[     ]+csrr[         ]+a0,mhpmevent10
> +[      ]+[0-9a-f]+:[   ]+32b02573[     ]+csrr[         ]+a0,mhpmevent11
> +[      ]+[0-9a-f]+:[   ]+32c02573[     ]+csrr[         ]+a0,mhpmevent12
> +[      ]+[0-9a-f]+:[   ]+32d02573[     ]+csrr[         ]+a0,mhpmevent13
> +[      ]+[0-9a-f]+:[   ]+32e02573[     ]+csrr[         ]+a0,mhpmevent14
> +[      ]+[0-9a-f]+:[   ]+32f02573[     ]+csrr[         ]+a0,mhpmevent15
> +[      ]+[0-9a-f]+:[   ]+33002573[     ]+csrr[         ]+a0,mhpmevent16
> +[      ]+[0-9a-f]+:[   ]+33102573[     ]+csrr[         ]+a0,mhpmevent17
> +[      ]+[0-9a-f]+:[   ]+33202573[     ]+csrr[         ]+a0,mhpmevent18
> +[      ]+[0-9a-f]+:[   ]+33302573[     ]+csrr[         ]+a0,mhpmevent19
> +[      ]+[0-9a-f]+:[   ]+33402573[     ]+csrr[         ]+a0,mhpmevent20
> +[      ]+[0-9a-f]+:[   ]+33502573[     ]+csrr[         ]+a0,mhpmevent21
> +[      ]+[0-9a-f]+:[   ]+33602573[     ]+csrr[         ]+a0,mhpmevent22
> +[      ]+[0-9a-f]+:[   ]+33702573[     ]+csrr[         ]+a0,mhpmevent23
> +[      ]+[0-9a-f]+:[   ]+33802573[     ]+csrr[         ]+a0,mhpmevent24
> +[      ]+[0-9a-f]+:[   ]+33902573[     ]+csrr[         ]+a0,mhpmevent25
> +[      ]+[0-9a-f]+:[   ]+33a02573[     ]+csrr[         ]+a0,mhpmevent26
> +[      ]+[0-9a-f]+:[   ]+33b02573[     ]+csrr[         ]+a0,mhpmevent27
> +[      ]+[0-9a-f]+:[   ]+33c02573[     ]+csrr[         ]+a0,mhpmevent28
> +[      ]+[0-9a-f]+:[   ]+33d02573[     ]+csrr[         ]+a0,mhpmevent29
> +[      ]+[0-9a-f]+:[   ]+33e02573[     ]+csrr[         ]+a0,mhpmevent30
> +[      ]+[0-9a-f]+:[   ]+33f02573[     ]+csrr[         ]+a0,mhpmevent31
> +[      ]+[0-9a-f]+:[   ]+7a002573[     ]+csrr[         ]+a0,tselect
> +[      ]+[0-9a-f]+:[   ]+7a102573[     ]+csrr[         ]+a0,tdata1
> +[      ]+[0-9a-f]+:[   ]+7a202573[     ]+csrr[         ]+a0,tdata2
> +[      ]+[0-9a-f]+:[   ]+7a302573[     ]+csrr[         ]+a0,tdata3
> +[      ]+[0-9a-f]+:[   ]+7b002573[     ]+csrr[         ]+a0,dcsr
> +[      ]+[0-9a-f]+:[   ]+7b102573[     ]+csrr[         ]+a0,dpc
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch
> +[      ]+[0-9a-f]+:[   ]+7b302573[     ]+csrr[         ]+a0,0x7b3
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,ubadaddr
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,sbadaddr
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,sptbr
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mbadaddr
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mucounteren
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch
> +[      ]+[0-9a-f]+:[   ]+20002573[     ]+csrr[         ]+a0,hstatus
> +[      ]+[0-9a-f]+:[   ]+20202573[     ]+csrr[         ]+a0,hedeleg
> +[      ]+[0-9a-f]+:[   ]+20302573[     ]+csrr[         ]+a0,hideleg
> +[      ]+[0-9a-f]+:[   ]+20402573[     ]+csrr[         ]+a0,hie
> +[      ]+[0-9a-f]+:[   ]+20502573[     ]+csrr[         ]+a0,htvec
> +[      ]+[0-9a-f]+:[   ]+24002573[     ]+csrr[         ]+a0,hscratch
> +[      ]+[0-9a-f]+:[   ]+24102573[     ]+csrr[         ]+a0,hepc
> +[      ]+[0-9a-f]+:[   ]+24202573[     ]+csrr[         ]+a0,hcause
> +[      ]+[0-9a-f]+:[   ]+24302573[     ]+csrr[         ]+a0,hbadaddr
> +[      ]+[0-9a-f]+:[   ]+24402573[     ]+csrr[         ]+a0,hip
> +[      ]+[0-9a-f]+:[   ]+38002573[     ]+csrr[         ]+a0,mbase
> +[      ]+[0-9a-f]+:[   ]+38102573[     ]+csrr[         ]+a0,mbound
> +[      ]+[0-9a-f]+:[   ]+38202573[     ]+csrr[         ]+a0,mibase
> +[      ]+[0-9a-f]+:[   ]+38302573[     ]+csrr[         ]+a0,mibound
> +[      ]+[0-9a-f]+:[   ]+38402573[     ]+csrr[         ]+a0,mdbase
> +[      ]+[0-9a-f]+:[   ]+38502573[     ]+csrr[         ]+a0,mdbound
> +[      ]+[0-9a-f]+:[   ]+32102573[     ]+csrr[         ]+a0,mscounteren
> +[      ]+[0-9a-f]+:[   ]+32202573[     ]+csrr[         ]+a0,mhcounteren
> diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
> new file mode 100644
> index 0000000..5affc54
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d
> @@ -0,0 +1,257 @@
> +#as: -march=rv32if -mpriv-spec=1p9p1
> +#source: priv-reg.s
> +#objdump: -dr -Mpriv-spec=1p9p1
> +
> +.*:[   ]+file format .*
> +
> +
> +Disassembly of section .text:
> +
> +0+000 <.text>:
> +[      ]+[0-9a-f]+:[   ]+00002573[     ]+csrr[         ]+a0,ustatus
> +[      ]+[0-9a-f]+:[   ]+00402573[     ]+csrr[         ]+a0,uie
> +[      ]+[0-9a-f]+:[   ]+00502573[     ]+csrr[         ]+a0,utvec
> +[      ]+[0-9a-f]+:[   ]+04002573[     ]+csrr[         ]+a0,uscratch
> +[      ]+[0-9a-f]+:[   ]+04102573[     ]+csrr[         ]+a0,uepc
> +[      ]+[0-9a-f]+:[   ]+04202573[     ]+csrr[         ]+a0,ucause
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,ubadaddr
> +[      ]+[0-9a-f]+:[   ]+04402573[     ]+csrr[         ]+a0,uip
> +[      ]+[0-9a-f]+:[   ]+00102573[     ]+frflags[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+00202573[     ]+frrm[         ]+a0
> +[      ]+[0-9a-f]+:[   ]+00302573[     ]+frcsr[        ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0002573[     ]+rdcycle[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0102573[     ]+rdtime[       ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0202573[     ]+rdinstret[    ]+a0
> +[      ]+[0-9a-f]+:[   ]+c0302573[     ]+csrr[         ]+a0,hpmcounter3
> +[      ]+[0-9a-f]+:[   ]+c0402573[     ]+csrr[         ]+a0,hpmcounter4
> +[      ]+[0-9a-f]+:[   ]+c0502573[     ]+csrr[         ]+a0,hpmcounter5
> +[      ]+[0-9a-f]+:[   ]+c0602573[     ]+csrr[         ]+a0,hpmcounter6
> +[      ]+[0-9a-f]+:[   ]+c0702573[     ]+csrr[         ]+a0,hpmcounter7
> +[      ]+[0-9a-f]+:[   ]+c0802573[     ]+csrr[         ]+a0,hpmcounter8
> +[      ]+[0-9a-f]+:[   ]+c0902573[     ]+csrr[         ]+a0,hpmcounter9
> +[      ]+[0-9a-f]+:[   ]+c0a02573[     ]+csrr[         ]+a0,hpmcounter10
> +[      ]+[0-9a-f]+:[   ]+c0b02573[     ]+csrr[         ]+a0,hpmcounter11
> +[      ]+[0-9a-f]+:[   ]+c0c02573[     ]+csrr[         ]+a0,hpmcounter12
> +[      ]+[0-9a-f]+:[   ]+c0d02573[     ]+csrr[         ]+a0,hpmcounter13
> +[      ]+[0-9a-f]+:[   ]+c0e02573[     ]+csrr[         ]+a0,hpmcounter14
> +[      ]+[0-9a-f]+:[   ]+c0f02573[     ]+csrr[         ]+a0,hpmcounter15
> +[      ]+[0-9a-f]+:[   ]+c1002573[     ]+csrr[         ]+a0,hpmcounter16
> +[      ]+[0-9a-f]+:[   ]+c1102573[     ]+csrr[         ]+a0,hpmcounter17
> +[      ]+[0-9a-f]+:[   ]+c1202573[     ]+csrr[         ]+a0,hpmcounter18
> +[      ]+[0-9a-f]+:[   ]+c1302573[     ]+csrr[         ]+a0,hpmcounter19
> +[      ]+[0-9a-f]+:[   ]+c1402573[     ]+csrr[         ]+a0,hpmcounter20
> +[      ]+[0-9a-f]+:[   ]+c1502573[     ]+csrr[         ]+a0,hpmcounter21
> +[      ]+[0-9a-f]+:[   ]+c1602573[     ]+csrr[         ]+a0,hpmcounter22
> +[      ]+[0-9a-f]+:[   ]+c1702573[     ]+csrr[         ]+a0,hpmcounter23
> +[      ]+[0-9a-f]+:[   ]+c1802573[     ]+csrr[         ]+a0,hpmcounter24
> +[      ]+[0-9a-f]+:[   ]+c1902573[     ]+csrr[         ]+a0,hpmcounter25
> +[      ]+[0-9a-f]+:[   ]+c1a02573[     ]+csrr[         ]+a0,hpmcounter26
> +[      ]+[0-9a-f]+:[   ]+c1b02573[     ]+csrr[         ]+a0,hpmcounter27
> +[      ]+[0-9a-f]+:[   ]+c1c02573[     ]+csrr[         ]+a0,hpmcounter28
> +[      ]+[0-9a-f]+:[   ]+c1d02573[     ]+csrr[         ]+a0,hpmcounter29
> +[      ]+[0-9a-f]+:[   ]+c1e02573[     ]+csrr[         ]+a0,hpmcounter30
> +[      ]+[0-9a-f]+:[   ]+c1f02573[     ]+csrr[         ]+a0,hpmcounter31
> +[      ]+[0-9a-f]+:[   ]+c8002573[     ]+rdcycleh[     ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8102573[     ]+rdtimeh[      ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8202573[     ]+rdinstreth[   ]+a0
> +[      ]+[0-9a-f]+:[   ]+c8302573[     ]+csrr[         ]+a0,hpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+c8402573[     ]+csrr[         ]+a0,hpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+c8502573[     ]+csrr[         ]+a0,hpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+c8602573[     ]+csrr[         ]+a0,hpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+c8702573[     ]+csrr[         ]+a0,hpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+c8802573[     ]+csrr[         ]+a0,hpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+c8902573[     ]+csrr[         ]+a0,hpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+c8a02573[     ]+csrr[         ]+a0,hpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+c8b02573[     ]+csrr[         ]+a0,hpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+c8c02573[     ]+csrr[         ]+a0,hpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+c8d02573[     ]+csrr[         ]+a0,hpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+c8e02573[     ]+csrr[         ]+a0,hpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+c8f02573[     ]+csrr[         ]+a0,hpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+c9002573[     ]+csrr[         ]+a0,hpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+c9102573[     ]+csrr[         ]+a0,hpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+c9202573[     ]+csrr[         ]+a0,hpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+c9302573[     ]+csrr[         ]+a0,hpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+c9402573[     ]+csrr[         ]+a0,hpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+c9502573[     ]+csrr[         ]+a0,hpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+c9602573[     ]+csrr[         ]+a0,hpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+c9702573[     ]+csrr[         ]+a0,hpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+c9802573[     ]+csrr[         ]+a0,hpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+c9902573[     ]+csrr[         ]+a0,hpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+c9a02573[     ]+csrr[         ]+a0,hpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+c9b02573[     ]+csrr[         ]+a0,hpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+c9c02573[     ]+csrr[         ]+a0,hpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+c9d02573[     ]+csrr[         ]+a0,hpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+c9e02573[     ]+csrr[         ]+a0,hpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+c9f02573[     ]+csrr[         ]+a0,hpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+10002573[     ]+csrr[         ]+a0,sstatus
> +[      ]+[0-9a-f]+:[   ]+10202573[     ]+csrr[         ]+a0,sedeleg
> +[      ]+[0-9a-f]+:[   ]+10302573[     ]+csrr[         ]+a0,sideleg
> +[      ]+[0-9a-f]+:[   ]+10402573[     ]+csrr[         ]+a0,sie
> +[      ]+[0-9a-f]+:[   ]+10502573[     ]+csrr[         ]+a0,stvec
> +[      ]+[0-9a-f]+:[   ]+10602573[     ]+csrr[         ]+a0,0x106
> +[      ]+[0-9a-f]+:[   ]+14002573[     ]+csrr[         ]+a0,sscratch
> +[      ]+[0-9a-f]+:[   ]+14102573[     ]+csrr[         ]+a0,sepc
> +[      ]+[0-9a-f]+:[   ]+14202573[     ]+csrr[         ]+a0,scause
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,sbadaddr
> +[      ]+[0-9a-f]+:[   ]+14402573[     ]+csrr[         ]+a0,sip
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,sptbr
> +[      ]+[0-9a-f]+:[   ]+f1102573[     ]+csrr[         ]+a0,mvendorid
> +[      ]+[0-9a-f]+:[   ]+f1202573[     ]+csrr[         ]+a0,marchid
> +[      ]+[0-9a-f]+:[   ]+f1302573[     ]+csrr[         ]+a0,mimpid
> +[      ]+[0-9a-f]+:[   ]+f1402573[     ]+csrr[         ]+a0,mhartid
> +[      ]+[0-9a-f]+:[   ]+30002573[     ]+csrr[         ]+a0,mstatus
> +[      ]+[0-9a-f]+:[   ]+30102573[     ]+csrr[         ]+a0,misa
> +[      ]+[0-9a-f]+:[   ]+30202573[     ]+csrr[         ]+a0,medeleg
> +[      ]+[0-9a-f]+:[   ]+30302573[     ]+csrr[         ]+a0,mideleg
> +[      ]+[0-9a-f]+:[   ]+30402573[     ]+csrr[         ]+a0,mie
> +[      ]+[0-9a-f]+:[   ]+30502573[     ]+csrr[         ]+a0,mtvec
> +[      ]+[0-9a-f]+:[   ]+30602573[     ]+csrr[         ]+a0,0x306
> +[      ]+[0-9a-f]+:[   ]+34002573[     ]+csrr[         ]+a0,mscratch
> +[      ]+[0-9a-f]+:[   ]+34102573[     ]+csrr[         ]+a0,mepc
> +[      ]+[0-9a-f]+:[   ]+34202573[     ]+csrr[         ]+a0,mcause
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mbadaddr
> +[      ]+[0-9a-f]+:[   ]+34402573[     ]+csrr[         ]+a0,mip
> +[      ]+[0-9a-f]+:[   ]+3a002573[     ]+csrr[         ]+a0,0x3a0
> +[      ]+[0-9a-f]+:[   ]+3a102573[     ]+csrr[         ]+a0,0x3a1
> +[      ]+[0-9a-f]+:[   ]+3a202573[     ]+csrr[         ]+a0,0x3a2
> +[      ]+[0-9a-f]+:[   ]+3a302573[     ]+csrr[         ]+a0,0x3a3
> +[      ]+[0-9a-f]+:[   ]+3b002573[     ]+csrr[         ]+a0,0x3b0
> +[      ]+[0-9a-f]+:[   ]+3b102573[     ]+csrr[         ]+a0,0x3b1
> +[      ]+[0-9a-f]+:[   ]+3b202573[     ]+csrr[         ]+a0,0x3b2
> +[      ]+[0-9a-f]+:[   ]+3b302573[     ]+csrr[         ]+a0,0x3b3
> +[      ]+[0-9a-f]+:[   ]+3b402573[     ]+csrr[         ]+a0,0x3b4
> +[      ]+[0-9a-f]+:[   ]+3b502573[     ]+csrr[         ]+a0,0x3b5
> +[      ]+[0-9a-f]+:[   ]+3b602573[     ]+csrr[         ]+a0,0x3b6
> +[      ]+[0-9a-f]+:[   ]+3b702573[     ]+csrr[         ]+a0,0x3b7
> +[      ]+[0-9a-f]+:[   ]+3b802573[     ]+csrr[         ]+a0,0x3b8
> +[      ]+[0-9a-f]+:[   ]+3b902573[     ]+csrr[         ]+a0,0x3b9
> +[      ]+[0-9a-f]+:[   ]+3ba02573[     ]+csrr[         ]+a0,0x3ba
> +[      ]+[0-9a-f]+:[   ]+3bb02573[     ]+csrr[         ]+a0,0x3bb
> +[      ]+[0-9a-f]+:[   ]+3bc02573[     ]+csrr[         ]+a0,0x3bc
> +[      ]+[0-9a-f]+:[   ]+3bd02573[     ]+csrr[         ]+a0,0x3bd
> +[      ]+[0-9a-f]+:[   ]+3be02573[     ]+csrr[         ]+a0,0x3be
> +[      ]+[0-9a-f]+:[   ]+3bf02573[     ]+csrr[         ]+a0,0x3bf
> +[      ]+[0-9a-f]+:[   ]+b0002573[     ]+csrr[         ]+a0,mcycle
> +[      ]+[0-9a-f]+:[   ]+b0202573[     ]+csrr[         ]+a0,minstret
> +[      ]+[0-9a-f]+:[   ]+b0302573[     ]+csrr[         ]+a0,mhpmcounter3
> +[      ]+[0-9a-f]+:[   ]+b0402573[     ]+csrr[         ]+a0,mhpmcounter4
> +[      ]+[0-9a-f]+:[   ]+b0502573[     ]+csrr[         ]+a0,mhpmcounter5
> +[      ]+[0-9a-f]+:[   ]+b0602573[     ]+csrr[         ]+a0,mhpmcounter6
> +[      ]+[0-9a-f]+:[   ]+b0702573[     ]+csrr[         ]+a0,mhpmcounter7
> +[      ]+[0-9a-f]+:[   ]+b0802573[     ]+csrr[         ]+a0,mhpmcounter8
> +[      ]+[0-9a-f]+:[   ]+b0902573[     ]+csrr[         ]+a0,mhpmcounter9
> +[      ]+[0-9a-f]+:[   ]+b0a02573[     ]+csrr[         ]+a0,mhpmcounter10
> +[      ]+[0-9a-f]+:[   ]+b0b02573[     ]+csrr[         ]+a0,mhpmcounter11
> +[      ]+[0-9a-f]+:[   ]+b0c02573[     ]+csrr[         ]+a0,mhpmcounter12
> +[      ]+[0-9a-f]+:[   ]+b0d02573[     ]+csrr[         ]+a0,mhpmcounter13
> +[      ]+[0-9a-f]+:[   ]+b0e02573[     ]+csrr[         ]+a0,mhpmcounter14
> +[      ]+[0-9a-f]+:[   ]+b0f02573[     ]+csrr[         ]+a0,mhpmcounter15
> +[      ]+[0-9a-f]+:[   ]+b1002573[     ]+csrr[         ]+a0,mhpmcounter16
> +[      ]+[0-9a-f]+:[   ]+b1102573[     ]+csrr[         ]+a0,mhpmcounter17
> +[      ]+[0-9a-f]+:[   ]+b1202573[     ]+csrr[         ]+a0,mhpmcounter18
> +[      ]+[0-9a-f]+:[   ]+b1302573[     ]+csrr[         ]+a0,mhpmcounter19
> +[      ]+[0-9a-f]+:[   ]+b1402573[     ]+csrr[         ]+a0,mhpmcounter20
> +[      ]+[0-9a-f]+:[   ]+b1502573[     ]+csrr[         ]+a0,mhpmcounter21
> +[      ]+[0-9a-f]+:[   ]+b1602573[     ]+csrr[         ]+a0,mhpmcounter22
> +[      ]+[0-9a-f]+:[   ]+b1702573[     ]+csrr[         ]+a0,mhpmcounter23
> +[      ]+[0-9a-f]+:[   ]+b1802573[     ]+csrr[         ]+a0,mhpmcounter24
> +[      ]+[0-9a-f]+:[   ]+b1902573[     ]+csrr[         ]+a0,mhpmcounter25
> +[      ]+[0-9a-f]+:[   ]+b1a02573[     ]+csrr[         ]+a0,mhpmcounter26
> +[      ]+[0-9a-f]+:[   ]+b1b02573[     ]+csrr[         ]+a0,mhpmcounter27
> +[      ]+[0-9a-f]+:[   ]+b1c02573[     ]+csrr[         ]+a0,mhpmcounter28
> +[      ]+[0-9a-f]+:[   ]+b1d02573[     ]+csrr[         ]+a0,mhpmcounter29
> +[      ]+[0-9a-f]+:[   ]+b1e02573[     ]+csrr[         ]+a0,mhpmcounter30
> +[      ]+[0-9a-f]+:[   ]+b1f02573[     ]+csrr[         ]+a0,mhpmcounter31
> +[      ]+[0-9a-f]+:[   ]+b8002573[     ]+csrr[         ]+a0,mcycleh
> +[      ]+[0-9a-f]+:[   ]+b8202573[     ]+csrr[         ]+a0,minstreth
> +[      ]+[0-9a-f]+:[   ]+b8302573[     ]+csrr[         ]+a0,mhpmcounter3h
> +[      ]+[0-9a-f]+:[   ]+b8402573[     ]+csrr[         ]+a0,mhpmcounter4h
> +[      ]+[0-9a-f]+:[   ]+b8502573[     ]+csrr[         ]+a0,mhpmcounter5h
> +[      ]+[0-9a-f]+:[   ]+b8602573[     ]+csrr[         ]+a0,mhpmcounter6h
> +[      ]+[0-9a-f]+:[   ]+b8702573[     ]+csrr[         ]+a0,mhpmcounter7h
> +[      ]+[0-9a-f]+:[   ]+b8802573[     ]+csrr[         ]+a0,mhpmcounter8h
> +[      ]+[0-9a-f]+:[   ]+b8902573[     ]+csrr[         ]+a0,mhpmcounter9h
> +[      ]+[0-9a-f]+:[   ]+b8a02573[     ]+csrr[         ]+a0,mhpmcounter10h
> +[      ]+[0-9a-f]+:[   ]+b8b02573[     ]+csrr[         ]+a0,mhpmcounter11h
> +[      ]+[0-9a-f]+:[   ]+b8c02573[     ]+csrr[         ]+a0,mhpmcounter12h
> +[      ]+[0-9a-f]+:[   ]+b8d02573[     ]+csrr[         ]+a0,mhpmcounter13h
> +[      ]+[0-9a-f]+:[   ]+b8e02573[     ]+csrr[         ]+a0,mhpmcounter14h
> +[      ]+[0-9a-f]+:[   ]+b8f02573[     ]+csrr[         ]+a0,mhpmcounter15h
> +[      ]+[0-9a-f]+:[   ]+b9002573[     ]+csrr[         ]+a0,mhpmcounter16h
> +[      ]+[0-9a-f]+:[   ]+b9102573[     ]+csrr[         ]+a0,mhpmcounter17h
> +[      ]+[0-9a-f]+:[   ]+b9202573[     ]+csrr[         ]+a0,mhpmcounter18h
> +[      ]+[0-9a-f]+:[   ]+b9302573[     ]+csrr[         ]+a0,mhpmcounter19h
> +[      ]+[0-9a-f]+:[   ]+b9402573[     ]+csrr[         ]+a0,mhpmcounter20h
> +[      ]+[0-9a-f]+:[   ]+b9502573[     ]+csrr[         ]+a0,mhpmcounter21h
> +[      ]+[0-9a-f]+:[   ]+b9602573[     ]+csrr[         ]+a0,mhpmcounter22h
> +[      ]+[0-9a-f]+:[   ]+b9702573[     ]+csrr[         ]+a0,mhpmcounter23h
> +[      ]+[0-9a-f]+:[   ]+b9802573[     ]+csrr[         ]+a0,mhpmcounter24h
> +[      ]+[0-9a-f]+:[   ]+b9902573[     ]+csrr[         ]+a0,mhpmcounter25h
> +[      ]+[0-9a-f]+:[   ]+b9a02573[     ]+csrr[         ]+a0,mhpmcounter26h
> +[      ]+[0-9a-f]+:[   ]+b9b02573[     ]+csrr[         ]+a0,mhpmcounter27h
> +[      ]+[0-9a-f]+:[   ]+b9c02573[     ]+csrr[         ]+a0,mhpmcounter28h
> +[      ]+[0-9a-f]+:[   ]+b9d02573[     ]+csrr[         ]+a0,mhpmcounter29h
> +[      ]+[0-9a-f]+:[   ]+b9e02573[     ]+csrr[         ]+a0,mhpmcounter30h
> +[      ]+[0-9a-f]+:[   ]+b9f02573[     ]+csrr[         ]+a0,mhpmcounter31h
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mucounteren
> +[      ]+[0-9a-f]+:[   ]+32302573[     ]+csrr[         ]+a0,mhpmevent3
> +[      ]+[0-9a-f]+:[   ]+32402573[     ]+csrr[         ]+a0,mhpmevent4
> +[      ]+[0-9a-f]+:[   ]+32502573[     ]+csrr[         ]+a0,mhpmevent5
> +[      ]+[0-9a-f]+:[   ]+32602573[     ]+csrr[         ]+a0,mhpmevent6
> +[      ]+[0-9a-f]+:[   ]+32702573[     ]+csrr[         ]+a0,mhpmevent7
> +[      ]+[0-9a-f]+:[   ]+32802573[     ]+csrr[         ]+a0,mhpmevent8
> +[      ]+[0-9a-f]+:[   ]+32902573[     ]+csrr[         ]+a0,mhpmevent9
> +[      ]+[0-9a-f]+:[   ]+32a02573[     ]+csrr[         ]+a0,mhpmevent10
> +[      ]+[0-9a-f]+:[   ]+32b02573[     ]+csrr[         ]+a0,mhpmevent11
> +[      ]+[0-9a-f]+:[   ]+32c02573[     ]+csrr[         ]+a0,mhpmevent12
> +[      ]+[0-9a-f]+:[   ]+32d02573[     ]+csrr[         ]+a0,mhpmevent13
> +[      ]+[0-9a-f]+:[   ]+32e02573[     ]+csrr[         ]+a0,mhpmevent14
> +[      ]+[0-9a-f]+:[   ]+32f02573[     ]+csrr[         ]+a0,mhpmevent15
> +[      ]+[0-9a-f]+:[   ]+33002573[     ]+csrr[         ]+a0,mhpmevent16
> +[      ]+[0-9a-f]+:[   ]+33102573[     ]+csrr[         ]+a0,mhpmevent17
> +[      ]+[0-9a-f]+:[   ]+33202573[     ]+csrr[         ]+a0,mhpmevent18
> +[      ]+[0-9a-f]+:[   ]+33302573[     ]+csrr[         ]+a0,mhpmevent19
> +[      ]+[0-9a-f]+:[   ]+33402573[     ]+csrr[         ]+a0,mhpmevent20
> +[      ]+[0-9a-f]+:[   ]+33502573[     ]+csrr[         ]+a0,mhpmevent21
> +[      ]+[0-9a-f]+:[   ]+33602573[     ]+csrr[         ]+a0,mhpmevent22
> +[      ]+[0-9a-f]+:[   ]+33702573[     ]+csrr[         ]+a0,mhpmevent23
> +[      ]+[0-9a-f]+:[   ]+33802573[     ]+csrr[         ]+a0,mhpmevent24
> +[      ]+[0-9a-f]+:[   ]+33902573[     ]+csrr[         ]+a0,mhpmevent25
> +[      ]+[0-9a-f]+:[   ]+33a02573[     ]+csrr[         ]+a0,mhpmevent26
> +[      ]+[0-9a-f]+:[   ]+33b02573[     ]+csrr[         ]+a0,mhpmevent27
> +[      ]+[0-9a-f]+:[   ]+33c02573[     ]+csrr[         ]+a0,mhpmevent28
> +[      ]+[0-9a-f]+:[   ]+33d02573[     ]+csrr[         ]+a0,mhpmevent29
> +[      ]+[0-9a-f]+:[   ]+33e02573[     ]+csrr[         ]+a0,mhpmevent30
> +[      ]+[0-9a-f]+:[   ]+33f02573[     ]+csrr[         ]+a0,mhpmevent31
> +[      ]+[0-9a-f]+:[   ]+7a002573[     ]+csrr[         ]+a0,tselect
> +[      ]+[0-9a-f]+:[   ]+7a102573[     ]+csrr[         ]+a0,tdata1
> +[      ]+[0-9a-f]+:[   ]+7a202573[     ]+csrr[         ]+a0,tdata2
> +[      ]+[0-9a-f]+:[   ]+7a302573[     ]+csrr[         ]+a0,tdata3
> +[      ]+[0-9a-f]+:[   ]+7b002573[     ]+csrr[         ]+a0,dcsr
> +[      ]+[0-9a-f]+:[   ]+7b102573[     ]+csrr[         ]+a0,dpc
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch
> +[      ]+[0-9a-f]+:[   ]+7b302573[     ]+csrr[         ]+a0,0x7b3
> +[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,ubadaddr
> +[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,sbadaddr
> +[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,sptbr
> +[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mbadaddr
> +[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mucounteren
> +[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch
> +[      ]+[0-9a-f]+:[   ]+20002573[     ]+csrr[         ]+a0,hstatus
> +[      ]+[0-9a-f]+:[   ]+20202573[     ]+csrr[         ]+a0,hedeleg
> +[      ]+[0-9a-f]+:[   ]+20302573[     ]+csrr[         ]+a0,hideleg
> +[      ]+[0-9a-f]+:[   ]+20402573[     ]+csrr[         ]+a0,hie
> +[      ]+[0-9a-f]+:[   ]+20502573[     ]+csrr[         ]+a0,htvec
> +[      ]+[0-9a-f]+:[   ]+24002573[     ]+csrr[         ]+a0,hscratch
> +[      ]+[0-9a-f]+:[   ]+24102573[     ]+csrr[         ]+a0,hepc
> +[      ]+[0-9a-f]+:[   ]+24202573[     ]+csrr[         ]+a0,hcause
> +[      ]+[0-9a-f]+:[   ]+24302573[     ]+csrr[         ]+a0,hbadaddr
> +[      ]+[0-9a-f]+:[   ]+24402573[     ]+csrr[         ]+a0,hip
> +[      ]+[0-9a-f]+:[   ]+38002573[     ]+csrr[         ]+a0,mbase
> +[      ]+[0-9a-f]+:[   ]+38102573[     ]+csrr[         ]+a0,mbound
> +[      ]+[0-9a-f]+:[   ]+38202573[     ]+csrr[         ]+a0,mibase
> +[      ]+[0-9a-f]+:[   ]+38302573[     ]+csrr[         ]+a0,mibound
> +[      ]+[0-9a-f]+:[   ]+38402573[     ]+csrr[         ]+a0,mdbase
> +[      ]+[0-9a-f]+:[   ]+38502573[     ]+csrr[         ]+a0,mdbound
> +[      ]+[0-9a-f]+:[   ]+32102573[     ]+csrr[         ]+a0,mscounteren
> +[      ]+[0-9a-f]+:[   ]+32202573[     ]+csrr[         ]+a0,mhcounteren
> diff --git a/gas/testsuite/gas/riscv/priv-reg.d b/gas/testsuite/gas/riscv/priv-reg.d
> deleted file mode 100644
> index 8fc41d2..0000000
> --- a/gas/testsuite/gas/riscv/priv-reg.d
> +++ /dev/null
> @@ -1,256 +0,0 @@
> -#as: -march=rv32if
> -#objdump: -dr
> -
> -.*:[   ]+file format .*
> -
> -
> -Disassembly of section .text:
> -
> -0+000 <.text>:
> -[      ]+[0-9a-f]+:[   ]+00002573[     ]+csrr[         ]+a0,ustatus
> -[      ]+[0-9a-f]+:[   ]+00402573[     ]+csrr[         ]+a0,uie
> -[      ]+[0-9a-f]+:[   ]+00502573[     ]+csrr[         ]+a0,utvec
> -[      ]+[0-9a-f]+:[   ]+04002573[     ]+csrr[         ]+a0,uscratch
> -[      ]+[0-9a-f]+:[   ]+04102573[     ]+csrr[         ]+a0,uepc
> -[      ]+[0-9a-f]+:[   ]+04202573[     ]+csrr[         ]+a0,ucause
> -[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,utval
> -[      ]+[0-9a-f]+:[   ]+04402573[     ]+csrr[         ]+a0,uip
> -[      ]+[0-9a-f]+:[   ]+00102573[     ]+frflags[      ]+a0
> -[      ]+[0-9a-f]+:[   ]+00202573[     ]+frrm[         ]+a0
> -[      ]+[0-9a-f]+:[   ]+00302573[     ]+frcsr[        ]+a0
> -[      ]+[0-9a-f]+:[   ]+c0002573[     ]+rdcycle[      ]+a0
> -[      ]+[0-9a-f]+:[   ]+c0102573[     ]+rdtime[       ]+a0
> -[      ]+[0-9a-f]+:[   ]+c0202573[     ]+rdinstret[    ]+a0
> -[      ]+[0-9a-f]+:[   ]+c0302573[     ]+csrr[         ]+a0,hpmcounter3
> -[      ]+[0-9a-f]+:[   ]+c0402573[     ]+csrr[         ]+a0,hpmcounter4
> -[      ]+[0-9a-f]+:[   ]+c0502573[     ]+csrr[         ]+a0,hpmcounter5
> -[      ]+[0-9a-f]+:[   ]+c0602573[     ]+csrr[         ]+a0,hpmcounter6
> -[      ]+[0-9a-f]+:[   ]+c0702573[     ]+csrr[         ]+a0,hpmcounter7
> -[      ]+[0-9a-f]+:[   ]+c0802573[     ]+csrr[         ]+a0,hpmcounter8
> -[      ]+[0-9a-f]+:[   ]+c0902573[     ]+csrr[         ]+a0,hpmcounter9
> -[      ]+[0-9a-f]+:[   ]+c0a02573[     ]+csrr[         ]+a0,hpmcounter10
> -[      ]+[0-9a-f]+:[   ]+c0b02573[     ]+csrr[         ]+a0,hpmcounter11
> -[      ]+[0-9a-f]+:[   ]+c0c02573[     ]+csrr[         ]+a0,hpmcounter12
> -[      ]+[0-9a-f]+:[   ]+c0d02573[     ]+csrr[         ]+a0,hpmcounter13
> -[      ]+[0-9a-f]+:[   ]+c0e02573[     ]+csrr[         ]+a0,hpmcounter14
> -[      ]+[0-9a-f]+:[   ]+c0f02573[     ]+csrr[         ]+a0,hpmcounter15
> -[      ]+[0-9a-f]+:[   ]+c1002573[     ]+csrr[         ]+a0,hpmcounter16
> -[      ]+[0-9a-f]+:[   ]+c1102573[     ]+csrr[         ]+a0,hpmcounter17
> -[      ]+[0-9a-f]+:[   ]+c1202573[     ]+csrr[         ]+a0,hpmcounter18
> -[      ]+[0-9a-f]+:[   ]+c1302573[     ]+csrr[         ]+a0,hpmcounter19
> -[      ]+[0-9a-f]+:[   ]+c1402573[     ]+csrr[         ]+a0,hpmcounter20
> -[      ]+[0-9a-f]+:[   ]+c1502573[     ]+csrr[         ]+a0,hpmcounter21
> -[      ]+[0-9a-f]+:[   ]+c1602573[     ]+csrr[         ]+a0,hpmcounter22
> -[      ]+[0-9a-f]+:[   ]+c1702573[     ]+csrr[         ]+a0,hpmcounter23
> -[      ]+[0-9a-f]+:[   ]+c1802573[     ]+csrr[         ]+a0,hpmcounter24
> -[      ]+[0-9a-f]+:[   ]+c1902573[     ]+csrr[         ]+a0,hpmcounter25
> -[      ]+[0-9a-f]+:[   ]+c1a02573[     ]+csrr[         ]+a0,hpmcounter26
> -[      ]+[0-9a-f]+:[   ]+c1b02573[     ]+csrr[         ]+a0,hpmcounter27
> -[      ]+[0-9a-f]+:[   ]+c1c02573[     ]+csrr[         ]+a0,hpmcounter28
> -[      ]+[0-9a-f]+:[   ]+c1d02573[     ]+csrr[         ]+a0,hpmcounter29
> -[      ]+[0-9a-f]+:[   ]+c1e02573[     ]+csrr[         ]+a0,hpmcounter30
> -[      ]+[0-9a-f]+:[   ]+c1f02573[     ]+csrr[         ]+a0,hpmcounter31
> -[      ]+[0-9a-f]+:[   ]+c8002573[     ]+rdcycleh[     ]+a0
> -[      ]+[0-9a-f]+:[   ]+c8102573[     ]+rdtimeh[      ]+a0
> -[      ]+[0-9a-f]+:[   ]+c8202573[     ]+rdinstreth[   ]+a0
> -[      ]+[0-9a-f]+:[   ]+c8302573[     ]+csrr[         ]+a0,hpmcounter3h
> -[      ]+[0-9a-f]+:[   ]+c8402573[     ]+csrr[         ]+a0,hpmcounter4h
> -[      ]+[0-9a-f]+:[   ]+c8502573[     ]+csrr[         ]+a0,hpmcounter5h
> -[      ]+[0-9a-f]+:[   ]+c8602573[     ]+csrr[         ]+a0,hpmcounter6h
> -[      ]+[0-9a-f]+:[   ]+c8702573[     ]+csrr[         ]+a0,hpmcounter7h
> -[      ]+[0-9a-f]+:[   ]+c8802573[     ]+csrr[         ]+a0,hpmcounter8h
> -[      ]+[0-9a-f]+:[   ]+c8902573[     ]+csrr[         ]+a0,hpmcounter9h
> -[      ]+[0-9a-f]+:[   ]+c8a02573[     ]+csrr[         ]+a0,hpmcounter10h
> -[      ]+[0-9a-f]+:[   ]+c8b02573[     ]+csrr[         ]+a0,hpmcounter11h
> -[      ]+[0-9a-f]+:[   ]+c8c02573[     ]+csrr[         ]+a0,hpmcounter12h
> -[      ]+[0-9a-f]+:[   ]+c8d02573[     ]+csrr[         ]+a0,hpmcounter13h
> -[      ]+[0-9a-f]+:[   ]+c8e02573[     ]+csrr[         ]+a0,hpmcounter14h
> -[      ]+[0-9a-f]+:[   ]+c8f02573[     ]+csrr[         ]+a0,hpmcounter15h
> -[      ]+[0-9a-f]+:[   ]+c9002573[     ]+csrr[         ]+a0,hpmcounter16h
> -[      ]+[0-9a-f]+:[   ]+c9102573[     ]+csrr[         ]+a0,hpmcounter17h
> -[      ]+[0-9a-f]+:[   ]+c9202573[     ]+csrr[         ]+a0,hpmcounter18h
> -[      ]+[0-9a-f]+:[   ]+c9302573[     ]+csrr[         ]+a0,hpmcounter19h
> -[      ]+[0-9a-f]+:[   ]+c9402573[     ]+csrr[         ]+a0,hpmcounter20h
> -[      ]+[0-9a-f]+:[   ]+c9502573[     ]+csrr[         ]+a0,hpmcounter21h
> -[      ]+[0-9a-f]+:[   ]+c9602573[     ]+csrr[         ]+a0,hpmcounter22h
> -[      ]+[0-9a-f]+:[   ]+c9702573[     ]+csrr[         ]+a0,hpmcounter23h
> -[      ]+[0-9a-f]+:[   ]+c9802573[     ]+csrr[         ]+a0,hpmcounter24h
> -[      ]+[0-9a-f]+:[   ]+c9902573[     ]+csrr[         ]+a0,hpmcounter25h
> -[      ]+[0-9a-f]+:[   ]+c9a02573[     ]+csrr[         ]+a0,hpmcounter26h
> -[      ]+[0-9a-f]+:[   ]+c9b02573[     ]+csrr[         ]+a0,hpmcounter27h
> -[      ]+[0-9a-f]+:[   ]+c9c02573[     ]+csrr[         ]+a0,hpmcounter28h
> -[      ]+[0-9a-f]+:[   ]+c9d02573[     ]+csrr[         ]+a0,hpmcounter29h
> -[      ]+[0-9a-f]+:[   ]+c9e02573[     ]+csrr[         ]+a0,hpmcounter30h
> -[      ]+[0-9a-f]+:[   ]+c9f02573[     ]+csrr[         ]+a0,hpmcounter31h
> -[      ]+[0-9a-f]+:[   ]+10002573[     ]+csrr[         ]+a0,sstatus
> -[      ]+[0-9a-f]+:[   ]+10202573[     ]+csrr[         ]+a0,sedeleg
> -[      ]+[0-9a-f]+:[   ]+10302573[     ]+csrr[         ]+a0,sideleg
> -[      ]+[0-9a-f]+:[   ]+10402573[     ]+csrr[         ]+a0,sie
> -[      ]+[0-9a-f]+:[   ]+10502573[     ]+csrr[         ]+a0,stvec
> -[      ]+[0-9a-f]+:[   ]+10602573[     ]+csrr[         ]+a0,scounteren
> -[      ]+[0-9a-f]+:[   ]+14002573[     ]+csrr[         ]+a0,sscratch
> -[      ]+[0-9a-f]+:[   ]+14102573[     ]+csrr[         ]+a0,sepc
> -[      ]+[0-9a-f]+:[   ]+14202573[     ]+csrr[         ]+a0,scause
> -[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,stval
> -[      ]+[0-9a-f]+:[   ]+14402573[     ]+csrr[         ]+a0,sip
> -[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,satp
> -[      ]+[0-9a-f]+:[   ]+f1102573[     ]+csrr[         ]+a0,mvendorid
> -[      ]+[0-9a-f]+:[   ]+f1202573[     ]+csrr[         ]+a0,marchid
> -[      ]+[0-9a-f]+:[   ]+f1302573[     ]+csrr[         ]+a0,mimpid
> -[      ]+[0-9a-f]+:[   ]+f1402573[     ]+csrr[         ]+a0,mhartid
> -[      ]+[0-9a-f]+:[   ]+30002573[     ]+csrr[         ]+a0,mstatus
> -[      ]+[0-9a-f]+:[   ]+30102573[     ]+csrr[         ]+a0,misa
> -[      ]+[0-9a-f]+:[   ]+30202573[     ]+csrr[         ]+a0,medeleg
> -[      ]+[0-9a-f]+:[   ]+30302573[     ]+csrr[         ]+a0,mideleg
> -[      ]+[0-9a-f]+:[   ]+30402573[     ]+csrr[         ]+a0,mie
> -[      ]+[0-9a-f]+:[   ]+30502573[     ]+csrr[         ]+a0,mtvec
> -[      ]+[0-9a-f]+:[   ]+30602573[     ]+csrr[         ]+a0,mcounteren
> -[      ]+[0-9a-f]+:[   ]+34002573[     ]+csrr[         ]+a0,mscratch
> -[      ]+[0-9a-f]+:[   ]+34102573[     ]+csrr[         ]+a0,mepc
> -[      ]+[0-9a-f]+:[   ]+34202573[     ]+csrr[         ]+a0,mcause
> -[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mtval
> -[      ]+[0-9a-f]+:[   ]+34402573[     ]+csrr[         ]+a0,mip
> -[      ]+[0-9a-f]+:[   ]+3a002573[     ]+csrr[         ]+a0,pmpcfg0
> -[      ]+[0-9a-f]+:[   ]+3a102573[     ]+csrr[         ]+a0,pmpcfg1
> -[      ]+[0-9a-f]+:[   ]+3a202573[     ]+csrr[         ]+a0,pmpcfg2
> -[      ]+[0-9a-f]+:[   ]+3a302573[     ]+csrr[         ]+a0,pmpcfg3
> -[      ]+[0-9a-f]+:[   ]+3b002573[     ]+csrr[         ]+a0,pmpaddr0
> -[      ]+[0-9a-f]+:[   ]+3b102573[     ]+csrr[         ]+a0,pmpaddr1
> -[      ]+[0-9a-f]+:[   ]+3b202573[     ]+csrr[         ]+a0,pmpaddr2
> -[      ]+[0-9a-f]+:[   ]+3b302573[     ]+csrr[         ]+a0,pmpaddr3
> -[      ]+[0-9a-f]+:[   ]+3b402573[     ]+csrr[         ]+a0,pmpaddr4
> -[      ]+[0-9a-f]+:[   ]+3b502573[     ]+csrr[         ]+a0,pmpaddr5
> -[      ]+[0-9a-f]+:[   ]+3b602573[     ]+csrr[         ]+a0,pmpaddr6
> -[      ]+[0-9a-f]+:[   ]+3b702573[     ]+csrr[         ]+a0,pmpaddr7
> -[      ]+[0-9a-f]+:[   ]+3b802573[     ]+csrr[         ]+a0,pmpaddr8
> -[      ]+[0-9a-f]+:[   ]+3b902573[     ]+csrr[         ]+a0,pmpaddr9
> -[      ]+[0-9a-f]+:[   ]+3ba02573[     ]+csrr[         ]+a0,pmpaddr10
> -[      ]+[0-9a-f]+:[   ]+3bb02573[     ]+csrr[         ]+a0,pmpaddr11
> -[      ]+[0-9a-f]+:[   ]+3bc02573[     ]+csrr[         ]+a0,pmpaddr12
> -[      ]+[0-9a-f]+:[   ]+3bd02573[     ]+csrr[         ]+a0,pmpaddr13
> -[      ]+[0-9a-f]+:[   ]+3be02573[     ]+csrr[         ]+a0,pmpaddr14
> -[      ]+[0-9a-f]+:[   ]+3bf02573[     ]+csrr[         ]+a0,pmpaddr15
> -[      ]+[0-9a-f]+:[   ]+b0002573[     ]+csrr[         ]+a0,mcycle
> -[      ]+[0-9a-f]+:[   ]+b0202573[     ]+csrr[         ]+a0,minstret
> -[      ]+[0-9a-f]+:[   ]+b0302573[     ]+csrr[         ]+a0,mhpmcounter3
> -[      ]+[0-9a-f]+:[   ]+b0402573[     ]+csrr[         ]+a0,mhpmcounter4
> -[      ]+[0-9a-f]+:[   ]+b0502573[     ]+csrr[         ]+a0,mhpmcounter5
> -[      ]+[0-9a-f]+:[   ]+b0602573[     ]+csrr[         ]+a0,mhpmcounter6
> -[      ]+[0-9a-f]+:[   ]+b0702573[     ]+csrr[         ]+a0,mhpmcounter7
> -[      ]+[0-9a-f]+:[   ]+b0802573[     ]+csrr[         ]+a0,mhpmcounter8
> -[      ]+[0-9a-f]+:[   ]+b0902573[     ]+csrr[         ]+a0,mhpmcounter9
> -[      ]+[0-9a-f]+:[   ]+b0a02573[     ]+csrr[         ]+a0,mhpmcounter10
> -[      ]+[0-9a-f]+:[   ]+b0b02573[     ]+csrr[         ]+a0,mhpmcounter11
> -[      ]+[0-9a-f]+:[   ]+b0c02573[     ]+csrr[         ]+a0,mhpmcounter12
> -[      ]+[0-9a-f]+:[   ]+b0d02573[     ]+csrr[         ]+a0,mhpmcounter13
> -[      ]+[0-9a-f]+:[   ]+b0e02573[     ]+csrr[         ]+a0,mhpmcounter14
> -[      ]+[0-9a-f]+:[   ]+b0f02573[     ]+csrr[         ]+a0,mhpmcounter15
> -[      ]+[0-9a-f]+:[   ]+b1002573[     ]+csrr[         ]+a0,mhpmcounter16
> -[      ]+[0-9a-f]+:[   ]+b1102573[     ]+csrr[         ]+a0,mhpmcounter17
> -[      ]+[0-9a-f]+:[   ]+b1202573[     ]+csrr[         ]+a0,mhpmcounter18
> -[      ]+[0-9a-f]+:[   ]+b1302573[     ]+csrr[         ]+a0,mhpmcounter19
> -[      ]+[0-9a-f]+:[   ]+b1402573[     ]+csrr[         ]+a0,mhpmcounter20
> -[      ]+[0-9a-f]+:[   ]+b1502573[     ]+csrr[         ]+a0,mhpmcounter21
> -[      ]+[0-9a-f]+:[   ]+b1602573[     ]+csrr[         ]+a0,mhpmcounter22
> -[      ]+[0-9a-f]+:[   ]+b1702573[     ]+csrr[         ]+a0,mhpmcounter23
> -[      ]+[0-9a-f]+:[   ]+b1802573[     ]+csrr[         ]+a0,mhpmcounter24
> -[      ]+[0-9a-f]+:[   ]+b1902573[     ]+csrr[         ]+a0,mhpmcounter25
> -[      ]+[0-9a-f]+:[   ]+b1a02573[     ]+csrr[         ]+a0,mhpmcounter26
> -[      ]+[0-9a-f]+:[   ]+b1b02573[     ]+csrr[         ]+a0,mhpmcounter27
> -[      ]+[0-9a-f]+:[   ]+b1c02573[     ]+csrr[         ]+a0,mhpmcounter28
> -[      ]+[0-9a-f]+:[   ]+b1d02573[     ]+csrr[         ]+a0,mhpmcounter29
> -[      ]+[0-9a-f]+:[   ]+b1e02573[     ]+csrr[         ]+a0,mhpmcounter30
> -[      ]+[0-9a-f]+:[   ]+b1f02573[     ]+csrr[         ]+a0,mhpmcounter31
> -[      ]+[0-9a-f]+:[   ]+b8002573[     ]+csrr[         ]+a0,mcycleh
> -[      ]+[0-9a-f]+:[   ]+b8202573[     ]+csrr[         ]+a0,minstreth
> -[      ]+[0-9a-f]+:[   ]+b8302573[     ]+csrr[         ]+a0,mhpmcounter3h
> -[      ]+[0-9a-f]+:[   ]+b8402573[     ]+csrr[         ]+a0,mhpmcounter4h
> -[      ]+[0-9a-f]+:[   ]+b8502573[     ]+csrr[         ]+a0,mhpmcounter5h
> -[      ]+[0-9a-f]+:[   ]+b8602573[     ]+csrr[         ]+a0,mhpmcounter6h
> -[      ]+[0-9a-f]+:[   ]+b8702573[     ]+csrr[         ]+a0,mhpmcounter7h
> -[      ]+[0-9a-f]+:[   ]+b8802573[     ]+csrr[         ]+a0,mhpmcounter8h
> -[      ]+[0-9a-f]+:[   ]+b8902573[     ]+csrr[         ]+a0,mhpmcounter9h
> -[      ]+[0-9a-f]+:[   ]+b8a02573[     ]+csrr[         ]+a0,mhpmcounter10h
> -[      ]+[0-9a-f]+:[   ]+b8b02573[     ]+csrr[         ]+a0,mhpmcounter11h
> -[      ]+[0-9a-f]+:[   ]+b8c02573[     ]+csrr[         ]+a0,mhpmcounter12h
> -[      ]+[0-9a-f]+:[   ]+b8d02573[     ]+csrr[         ]+a0,mhpmcounter13h
> -[      ]+[0-9a-f]+:[   ]+b8e02573[     ]+csrr[         ]+a0,mhpmcounter14h
> -[      ]+[0-9a-f]+:[   ]+b8f02573[     ]+csrr[         ]+a0,mhpmcounter15h
> -[      ]+[0-9a-f]+:[   ]+b9002573[     ]+csrr[         ]+a0,mhpmcounter16h
> -[      ]+[0-9a-f]+:[   ]+b9102573[     ]+csrr[         ]+a0,mhpmcounter17h
> -[      ]+[0-9a-f]+:[   ]+b9202573[     ]+csrr[         ]+a0,mhpmcounter18h
> -[      ]+[0-9a-f]+:[   ]+b9302573[     ]+csrr[         ]+a0,mhpmcounter19h
> -[      ]+[0-9a-f]+:[   ]+b9402573[     ]+csrr[         ]+a0,mhpmcounter20h
> -[      ]+[0-9a-f]+:[   ]+b9502573[     ]+csrr[         ]+a0,mhpmcounter21h
> -[      ]+[0-9a-f]+:[   ]+b9602573[     ]+csrr[         ]+a0,mhpmcounter22h
> -[      ]+[0-9a-f]+:[   ]+b9702573[     ]+csrr[         ]+a0,mhpmcounter23h
> -[      ]+[0-9a-f]+:[   ]+b9802573[     ]+csrr[         ]+a0,mhpmcounter24h
> -[      ]+[0-9a-f]+:[   ]+b9902573[     ]+csrr[         ]+a0,mhpmcounter25h
> -[      ]+[0-9a-f]+:[   ]+b9a02573[     ]+csrr[         ]+a0,mhpmcounter26h
> -[      ]+[0-9a-f]+:[   ]+b9b02573[     ]+csrr[         ]+a0,mhpmcounter27h
> -[      ]+[0-9a-f]+:[   ]+b9c02573[     ]+csrr[         ]+a0,mhpmcounter28h
> -[      ]+[0-9a-f]+:[   ]+b9d02573[     ]+csrr[         ]+a0,mhpmcounter29h
> -[      ]+[0-9a-f]+:[   ]+b9e02573[     ]+csrr[         ]+a0,mhpmcounter30h
> -[      ]+[0-9a-f]+:[   ]+b9f02573[     ]+csrr[         ]+a0,mhpmcounter31h
> -[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mcountinhibit
> -[      ]+[0-9a-f]+:[   ]+32302573[     ]+csrr[         ]+a0,mhpmevent3
> -[      ]+[0-9a-f]+:[   ]+32402573[     ]+csrr[         ]+a0,mhpmevent4
> -[      ]+[0-9a-f]+:[   ]+32502573[     ]+csrr[         ]+a0,mhpmevent5
> -[      ]+[0-9a-f]+:[   ]+32602573[     ]+csrr[         ]+a0,mhpmevent6
> -[      ]+[0-9a-f]+:[   ]+32702573[     ]+csrr[         ]+a0,mhpmevent7
> -[      ]+[0-9a-f]+:[   ]+32802573[     ]+csrr[         ]+a0,mhpmevent8
> -[      ]+[0-9a-f]+:[   ]+32902573[     ]+csrr[         ]+a0,mhpmevent9
> -[      ]+[0-9a-f]+:[   ]+32a02573[     ]+csrr[         ]+a0,mhpmevent10
> -[      ]+[0-9a-f]+:[   ]+32b02573[     ]+csrr[         ]+a0,mhpmevent11
> -[      ]+[0-9a-f]+:[   ]+32c02573[     ]+csrr[         ]+a0,mhpmevent12
> -[      ]+[0-9a-f]+:[   ]+32d02573[     ]+csrr[         ]+a0,mhpmevent13
> -[      ]+[0-9a-f]+:[   ]+32e02573[     ]+csrr[         ]+a0,mhpmevent14
> -[      ]+[0-9a-f]+:[   ]+32f02573[     ]+csrr[         ]+a0,mhpmevent15
> -[      ]+[0-9a-f]+:[   ]+33002573[     ]+csrr[         ]+a0,mhpmevent16
> -[      ]+[0-9a-f]+:[   ]+33102573[     ]+csrr[         ]+a0,mhpmevent17
> -[      ]+[0-9a-f]+:[   ]+33202573[     ]+csrr[         ]+a0,mhpmevent18
> -[      ]+[0-9a-f]+:[   ]+33302573[     ]+csrr[         ]+a0,mhpmevent19
> -[      ]+[0-9a-f]+:[   ]+33402573[     ]+csrr[         ]+a0,mhpmevent20
> -[      ]+[0-9a-f]+:[   ]+33502573[     ]+csrr[         ]+a0,mhpmevent21
> -[      ]+[0-9a-f]+:[   ]+33602573[     ]+csrr[         ]+a0,mhpmevent22
> -[      ]+[0-9a-f]+:[   ]+33702573[     ]+csrr[         ]+a0,mhpmevent23
> -[      ]+[0-9a-f]+:[   ]+33802573[     ]+csrr[         ]+a0,mhpmevent24
> -[      ]+[0-9a-f]+:[   ]+33902573[     ]+csrr[         ]+a0,mhpmevent25
> -[      ]+[0-9a-f]+:[   ]+33a02573[     ]+csrr[         ]+a0,mhpmevent26
> -[      ]+[0-9a-f]+:[   ]+33b02573[     ]+csrr[         ]+a0,mhpmevent27
> -[      ]+[0-9a-f]+:[   ]+33c02573[     ]+csrr[         ]+a0,mhpmevent28
> -[      ]+[0-9a-f]+:[   ]+33d02573[     ]+csrr[         ]+a0,mhpmevent29
> -[      ]+[0-9a-f]+:[   ]+33e02573[     ]+csrr[         ]+a0,mhpmevent30
> -[      ]+[0-9a-f]+:[   ]+33f02573[     ]+csrr[         ]+a0,mhpmevent31
> -[      ]+[0-9a-f]+:[   ]+7a002573[     ]+csrr[         ]+a0,tselect
> -[      ]+[0-9a-f]+:[   ]+7a102573[     ]+csrr[         ]+a0,tdata1
> -[      ]+[0-9a-f]+:[   ]+7a202573[     ]+csrr[         ]+a0,tdata2
> -[      ]+[0-9a-f]+:[   ]+7a302573[     ]+csrr[         ]+a0,tdata3
> -[      ]+[0-9a-f]+:[   ]+7b002573[     ]+csrr[         ]+a0,dcsr
> -[      ]+[0-9a-f]+:[   ]+7b102573[     ]+csrr[         ]+a0,dpc
> -[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch0
> -[      ]+[0-9a-f]+:[   ]+7b302573[     ]+csrr[         ]+a0,dscratch1
> -[      ]+[0-9a-f]+:[   ]+04302573[     ]+csrr[         ]+a0,utval
> -[      ]+[0-9a-f]+:[   ]+14302573[     ]+csrr[         ]+a0,stval
> -[      ]+[0-9a-f]+:[   ]+18002573[     ]+csrr[         ]+a0,satp
> -[      ]+[0-9a-f]+:[   ]+34302573[     ]+csrr[         ]+a0,mtval
> -[      ]+[0-9a-f]+:[   ]+32002573[     ]+csrr[         ]+a0,mcountinhibit
> -[      ]+[0-9a-f]+:[   ]+7b202573[     ]+csrr[         ]+a0,dscratch0
> -[      ]+[0-9a-f]+:[   ]+20002573[     ]+csrr[         ]+a0,hstatus
> -[      ]+[0-9a-f]+:[   ]+20202573[     ]+csrr[         ]+a0,hedeleg
> -[      ]+[0-9a-f]+:[   ]+20302573[     ]+csrr[         ]+a0,hideleg
> -[      ]+[0-9a-f]+:[   ]+20402573[     ]+csrr[         ]+a0,hie
> -[      ]+[0-9a-f]+:[   ]+20502573[     ]+csrr[         ]+a0,htvec
> -[      ]+[0-9a-f]+:[   ]+24002573[     ]+csrr[         ]+a0,hscratch
> -[      ]+[0-9a-f]+:[   ]+24102573[     ]+csrr[         ]+a0,hepc
> -[      ]+[0-9a-f]+:[   ]+24202573[     ]+csrr[         ]+a0,hcause
> -[      ]+[0-9a-f]+:[   ]+24302573[     ]+csrr[         ]+a0,hbadaddr
> -[      ]+[0-9a-f]+:[   ]+24402573[     ]+csrr[         ]+a0,hip
> -[      ]+[0-9a-f]+:[   ]+38002573[     ]+csrr[         ]+a0,mbase
> -[      ]+[0-9a-f]+:[   ]+38102573[     ]+csrr[         ]+a0,mbound
> -[      ]+[0-9a-f]+:[   ]+38202573[     ]+csrr[         ]+a0,mibase
> -[      ]+[0-9a-f]+:[   ]+38302573[     ]+csrr[         ]+a0,mibound
> -[      ]+[0-9a-f]+:[   ]+38402573[     ]+csrr[         ]+a0,mdbase
> -[      ]+[0-9a-f]+:[   ]+38502573[     ]+csrr[         ]+a0,mdbound
> -[      ]+[0-9a-f]+:[   ]+32102573[     ]+csrr[         ]+a0,mscounteren
> -[      ]+[0-9a-f]+:[   ]+32202573[     ]+csrr[         ]+a0,mhcounteren
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index c36bf69..0f263ab 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -446,6 +446,8 @@ extern const struct riscv_opcode riscv_opcodes[];
>  extern const struct riscv_opcode riscv_insn_types[];
>  extern const struct riscv_ext_version riscv_ext_version_table[];
>
> +extern enum riscv_csr_vclass default_priv_spec;
> +
>  extern bfd_boolean
>  riscv_get_priv_version_class (const char *, enum riscv_csr_vclass *);
>  extern const char *
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 98302ff..38ae8ac 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -52,8 +52,8 @@ set_default_riscv_dis_options (void)
>    no_aliases = 0;
>  }
>
> -static void
> -parse_riscv_dis_option (const char *option)
> +static bfd_boolean
> +parse_riscv_dis_option_without_args (const char *option)
>  {
>    if (strcmp (option, "no-aliases") == 0)
>      no_aliases = 1;
> @@ -63,6 +63,44 @@ parse_riscv_dis_option (const char *option)
>        riscv_fpr_names = riscv_fpr_names_numeric;
>      }
>    else
> +    return FALSE;
> +  return TRUE;
> +}
> +
> +static void
> +parse_riscv_dis_option (const char *option)
> +{
> +  char *equal, *value;
> +
> +  if (parse_riscv_dis_option_without_args (option))
> +    return;
> +
> +  equal = strchr (option, '=');
> +  if (equal == NULL)
> +    {
> +      /* The option without '=' should be defined above.  */
> +      opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
> +      return;
> +    }
> +  if (equal == option
> +      || *(equal + 1) == '\0')
> +    {
> +      /* Invalid options with '=', no option name before '=',
> +        and no value after '='.  */
> +      opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
> +                            option);
> +      return;
> +    }
> +
> +  *equal = '\0';
> +  value = equal + 1;
> +  if (strcmp (option, "priv-spec") == 0)
> +    {
> +      if (!riscv_get_priv_version_class (value, &default_priv_spec))
> +       opcodes_error_handler (_("unsupported privilege version set by %s=%s"),
> +                              option, value);
> +    }
> +  else
>      {
>        /* xgettext:c-format */
>        opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
> @@ -322,17 +360,32 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
>
>         case 'E':
>           {
> -           const char* csr_name = NULL;
> +           static const char *riscv_csr_hash[4096];    /* Total 2^12 CSR */
> +           static bfd_boolean init_csr = FALSE;
>             unsigned int csr = EXTRACT_OPERAND (CSR, l);
> -           switch (csr)
> +
> +           if (!init_csr)
>               {
> +               unsigned int i;
> +               for (i = 0; i < 4096; i++)
> +                 riscv_csr_hash[i] = NULL;
> +
> +               /* Set to the newest privilege version.  */
> +               if (default_priv_spec == CSR_CLASS_VNONE)
> +                 default_priv_spec = CSR_CLASS_VDRAFT - 1;
> +
>  #define DECLARE_CSR(name, num, class, define_version, abort_version) \
> -  case num: csr_name = #name; break;
> +  if (default_priv_spec >= define_version \
> +      && default_priv_spec < abort_version) \
> +    riscv_csr_hash[num] = #name;
> +#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
> +  DECLARE_CSR(name, num, class, define_version, abort_version)
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>               }
> -           if (csr_name)
> -             print (info->stream, "%s", csr_name);
> +
> +           if (riscv_csr_hash[csr] != NULL)
> +             print (info->stream, "%s", riscv_csr_hash[csr]);
>             else
>               print (info->stream, "0x%x", csr);
>             break;
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index cfefd8e..ad568bb 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -938,6 +938,8 @@ const struct riscv_ext_version riscv_ext_version_table[] =
>  {NULL, NULL, 0, 0}
>  };
>
> +enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
> +
>  struct priv_version_t
>  {
>    const char *name;
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options.
  2020-04-18 11:07 ` [PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options Nelson Chu
@ 2020-04-18 11:19   ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:19 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

CC Palmer.

Thanks
Nelson

On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
>         gas/
>         * config/tc-riscv.c (md_show_usage): Add descriptions about
>         the new GAS options.
>         * doc/c-riscv.texi: Likewise.
>
>         opcodes/
>         * riscv-dis.c (print_riscv_disassembler_options): Add description
>         about the new OBJDUMP option.
> ---
>  gas/config/tc-riscv.c | 19 +++++++++++--------
>  gas/doc/c-riscv.texi  | 35 +++++++++++++++++++++++++++++++++++
>  opcodes/riscv-dis.c   |  9 ++++++---
>  3 files changed, 52 insertions(+), 11 deletions(-)
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 81bdfa8..95f787f 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -3490,14 +3490,17 @@ md_show_usage (FILE *stream)
>  {
>    fprintf (stream, _("\
>  RISC-V options:\n\
> -  -fpic          generate position-independent code\n\
> -  -fno-pic       don't generate position-independent code (default)\n\
> -  -march=ISA     set the RISC-V architecture\n\
> -  -mabi=ABI      set the RISC-V ABI\n\
> -  -mrelax        enable relax (default)\n\
> -  -mno-relax     disable relax\n\
> -  -march-attr    generate RISC-V arch attribute\n\
> -  -mno-arch-attr don't generate RISC-V arch attribute\n\
> +  -fpic                       generate position-independent code\n\
> +  -fno-pic                    don't generate position-independent code (default)\n\
> +  -march=ISA                  set the RISC-V architecture\n\
> +  -misa-spec=ISAspec          set the RISC-V ISA spec (2p0, 2p1, 2p2, 20190608, 20191213)\n\
> +  -mriscv-isa-version=ISAver  update the default version of RISC-V architecture\n\
> +  -mpriv-spec=PRIVspec        set the RISC-V privilege spec (1p9, 1p9p1, 1p10, 1p11)\n\
> +  -mabi=ABI                   set the RISC-V ABI\n\
> +  -mrelax                     enable relax (default)\n\
> +  -mno-relax                  disable relax\n\
> +  -march-attr                 generate RISC-V arch attribute\n\
> +  -mno-arch-attr              don't generate RISC-V arch attribute\n\
>  "));
>  }
>
> diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
> index 488cf56..559c87a 100644
> --- a/gas/doc/c-riscv.texi
> +++ b/gas/doc/c-riscv.texi
> @@ -42,6 +42,41 @@ Don't generate position-independent code (default)
>  @cindex @samp{-march=ISA} option, RISC-V
>  @item -march=ISA
>  Select the base isa, as specified by ISA.  For example -march=rv32ima.
> +If this option and the architecture attributes aren’t set, then assembler
> +will check the default configure setting --with-arch=ISA.
> +
> +@cindex @samp{-misa-spec=ISAspec} option, RISC-V
> +@item -misa-spec=ISAspec
> +Select the default isa spec version.  If the version of ISA isn't set
> +by -march, then assembler helps to set the version according to
> +the default chosen spec.  If this option isn't set, then assembler will
> +check the default configure setting --with-isa-spec=ISAspec.
> +
> +@cindex @samp{-mriscv-isa-version=ISAver} option, RISC-V
> +@item -mriscv-isa-version=ISAver
> +The syntax of ISAver is same as the ISA set by -march, but must set with
> +versions, and without the rv32 or rv64 prefix.  For example
> +-mriscv-isa-version=i2p0m2p0a2p0.  There are two reasons that you may need
> +this option,
> +
> +Some versions of extensions defined in the ISA spec are not matched to the
> +toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
> +ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
> +have to use this option to choose the correct version for V-ext.
> +
> +The other reason is that you want to update the version for the specific
> +standard extensions if the version are not set in the ELF architecture
> +attributes or -march option.
> +
> +If this option isn't set, then assembler will check the default configure
> +setting --with-riscv-isa-version=ISAver.
> +
> +@cindex @samp{-mpriv-spec=PRIVspec} option, RISC-V
> +@item -mpriv-spec=PRIVspec
> +Select the privileged spec version.  We can decide whether the CSR is valid or
> +not according to the chosen spec.  If this option and the privilege attributes
> +aren't set, then assembler will check the default configure setting
> +--with-priv-spec=PRIVspec.
>
>  @cindex @samp{-mabi=ABI} option, RISC-V
>  @item -mabi=ABI
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 38ae8ac..b558282 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -601,11 +601,14 @@ The following RISC-V-specific disassembler options are supported for use\n\
>  with the -M switch (multiple options should be separated by commas):\n"));
>
>    fprintf (stream, _("\n\
> -  numeric       Print numeric register names, rather than ABI names.\n"));
> +  numeric         Print numeric register names, rather than ABI names.\n"));
>
>    fprintf (stream, _("\n\
> -  no-aliases    Disassemble only into canonical instructions, rather\n\
> -                than into pseudoinstructions.\n"));
> +  no-aliases      Disassemble only into canonical instructions, rather\n\
> +                  than into pseudoinstructions.\n"));
> +
> +  fprintf (stream, _("\n\
> +  priv-spec=PRIV  Print the CSR according to the chosen privilege spec.\n"));
>
>    fprintf (stream, _("\n"));
>  }
> --
> 2.7.4
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/7] RISC-V: Remove the redundant gas test file.
  2020-04-18 11:17   ` Nelson Chu
@ 2020-04-18 11:20     ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-18 11:20 UTC (permalink / raw)
  To: Binutils, gdb-patches
  Cc: Andrew Burgess, Andrew Waterman, asb, Kito Cheng, Maxim Blinov,
	Jim Wilson, Palmer Dabbelt

Miss Palmer again...
Very sorry for the redundant mails...

Nelson

On Sat, Apr 18, 2020 at 7:17 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> CC Palmer.
>
> Thanks
> Nelson
>
> On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
> >
> >         gas/
> >         * testsuite/gas/riscv/march-fail-s-with-version: Removed.
> > ---
> >  gas/testsuite/gas/riscv/march-fail-s-with-version | 2 --
> >  1 file changed, 2 deletions(-)
> >  delete mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version
> >
> > diff --git a/gas/testsuite/gas/riscv/march-fail-s-with-version b/gas/testsuite/gas/riscv/march-fail-s-with-version
> > deleted file mode 100644
> > index a514d4a..0000000
> > --- a/gas/testsuite/gas/riscv/march-fail-s-with-version
> > +++ /dev/null
> > @@ -1,2 +0,0 @@
> > -Assembler messages:
> > -.*: Invalid or unknown s ISA extension: 'sfoo'
> > \ No newline at end of file
> > --
> > 2.7.4
> >

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR
  2020-04-18 11:17 ` [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
@ 2020-04-23 20:59   ` Palmer Dabbelt
  0 siblings, 0 replies; 25+ messages in thread
From: Palmer Dabbelt @ 2020-04-23 20:59 UTC (permalink / raw)
  To: nelson.chu
  Cc: binutils, gdb-patches, Andrew Waterman, asb, maxim.blinov, kito.cheng

On Sat, 18 Apr 2020 04:17:15 PDT (-0700), nelson.chu@sifive.com wrote:
> Sorry for not sending these patches to Palmer :)
> CC Palmer.

That's fine, I subscribe to the lists :)

>
> Thanks
> Nelson
>
> On Sat, Apr 18, 2020 at 7:08 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>>
>> Hi binutils and gdb,
>>
>> I know every RISCV contirbutors all do the best to maintain the compatibility
>> between different spec versions.  But the specs are changed frequently, and
>> sometimes it is very hard to keep the compatibility if we don't have a good
>> way to deal with versioning problems.  Since different ISA specs define
>> different instructions, and different privilege specs define different CSR,
>> both of them need the version checking and controling mechanism.
>>
>> For the ISA versions, you can set them by the RISCV ELF architecture attribute
>> and assembler option -march, but you have to set them one by one for each
>> extension.  It seems not so friendly for user, so Kito Cheng proposed a good
>> solution to resolve the problem.  That is, support the new assembler options and
>> default configure options to reduce the burdens when setting ISA versions.
>> The original idea and discussion are come from the following link,
>>
>> https://groups.google.com/a/groups.riscv.org/forum/#!msg/sw-dev/aZhMG7NIVTk/PTZEaTWiAwAJ)
>>
>> === New Assembler Options ===
>>
>> * -misa-spec = [2p0|2p1|2p2|20190608|20191213]
>> You can simply choose the ISA spec by this option, and then assembler will set
>> the version for the standard extensions if you don’t set in the ELF arch
>> attributes or -march option.
>>
>> * -mriscv-isa-version = <ISA-string>
>> The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
>> prefix.  There are two reasons that you may need this option,
>>
>> 1. Some versions of extensions defined in the ISA spec are not matched to the
>> toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
>> ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
>> have to use this option to choose the correct version for V-ext.
>>
>> 2. You want to update the version for the specific standard extensions if the
>> version are not set in the ELF arch attributes and -march option.
>>
>> === New Default Configure Options ===
>>
>> * --with-arch = <ISA-string>
>> The syntax of <ISA-string> is same as -march option.  Assembler will check this
>> if -march option and ELF arch attributes aren’t set.
>>
>> * --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
>> The syntax is same as -misa-spec option.  Assembler will check this if
>> -misa-spec option isn’t set.
>>
>> * --with-riscv-isa-version = <ISA-string>
>> The syntax of <ISA-string> is same as -mriscv-isa-version option.  Assembler
>> will check this if -mriscv-isa-version option isn’t set.
>>
>> === The Priority of these options ===
>>
>> * ELF arch attributes > Assembler options > Default configure options
>> * For GAS options, -march > -mriscv-isa-version > -misa-spec
>> * For configure options, --with-arch > --with-riscv-isa-version > --with-isa-spec
>>
>> === Example ===
>>
>> $ cat test.s
>> .attribute arch, "rv32i1p9fv_zicsr"
>>
>> $ riscv32-unknown-elf-as -march-attr -misa-spec=2p2 -mriscv-isa-version=i2p1a2p1v0p9 test.s -o test.o
>>
>> $ riscv32-unknown-elf-readelf -A test.o
>>  Attribute Section: riscv
>>  File Attributes
>>    Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
>> ...
>>
>> The above example covers most cases.
>>
>> * For i-ext, we already set the version 1p9 in elf attribute, so -misa-spec and
>> -mriscv-isa-version don't update the version to 2p0 and 2p1.
>>
>> * For f-ext, we don't set the version to it, so use the default version 2p0
>> according to the ISA spec 2p2.
>>
>> * For v-ext, the default version is 0p7 according to ISA spec 2p2, but we use
>> -mriscv-isa-version to update it to 0p9.
>>
>> * For a-ext, it isn't enabled by -march or elf attribute, so we don't update it's
>> version even if -mriscv-isa-version is set.
>>
>> * As for the zicsr extension, it is defined in the lastest ISA spec rather than 2p2,
>> so set it's version to 0p0.
>>
>>
>> As for the privilege version, I get the related request in the following link,
>> https://github.com/riscv/riscv-binutils-gdb/issues/202
>>
>> We also support new assembler options to choose the spec you want, and then
>> assembler will generate the correct CSR address according to the chosen spec.
>> If the obselete CSR name is used, then report the warning message when the
>> -mcsr-check is set, and use the latest defined address for the CSR.  Of course,
>> you can also choose the spec by setting the orginal RISCV ELF priv attributes.
>> Beside, the disassembler can show the CSR according to the chosen privilege spec
>> by the new disassmebler option.  However, the CSR address is showed directly if
>> it is invalid for the chosen spec.
>>
>> === New Assembler Option ===
>>
>> * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
>> This is used to set the privileged spec’s version, and we can decide whether
>> the CSR is valid or not.
>>
>> === New Default Configure Option ===
>>
>> * --with-priv-spec = [1p9|1p9p1|1p10|1p11]
>> The syntax is same as -mpriv-spec option.  Assembler will check this setting
>> if -mpriv-spec option isn’t set.
>>
>> === New Disassmebler Option ===
>>
>> * -Mpriv-spec=[1p9|1p9p1|1p10|1p11]
>> The syntax is same as -mpriv-spec option.  The disassembler can show the CSR
>> correctly according to the chosen privilege spec.
>>
>>
>> Notes,
>>
>> 1. I'm not sure if GDB needs the above version checking, but I think the current
>> modifications won't change the behavior of GDB.  We still use the DECLARE_CSR
>> to generate the gdb/features/riscv/[32|64]bit-csr.xml, that means we only generate
>> the CSR which are valid in the latest privilege spec.  Also, the objdump shows
>> the CSR according to the latest privilege spec by default.
>>
>> 2. The default ISA spec is set to 2p2 rather than the lastest version.  The reason
>> is that compiler generates the ISA string with fixed 2p0 verisons only for the
>> RISCV ELF architecture attributes, but not for the -march option.  Therefore, we
>> should update the compiler or linker to resolve this problem in the futrue patches.
>>
>> 3. How to extend the default versions and new ISA spec?
>> You only need to update the riscv_ext_version_table which is defined in the
>> opcodes/riscv-opc.c.
>>
>> const struct riscv_ext_version riscv_ext_version_table[] =
>> {
>> /* name, spec name,  major,  minor.  */
>> {"e",    "20191213",      1,     9},
>> {"e",    "20190608",      1,     9},
>> {"e",    "2p2",           1,     9},
>>
>> {"i",    "20191213",      2,     1},
>> {"i",    "20190608",      2,     1},
>> {"i",    "2p2",           2,     0},
>> ...
>> };
>>
>> 4. How to extend new privilege spec and new CSR?
>>
>> * include/opcode/riscv.h
>> enum riscv_csr_vclass
>> {
>>   CSR_CLASS_VNONE,     /* Default value */
>>
>>   CSR_CLASS_V1P9,       /* v1.9 */
>>   CSR_CLASS_V1P9P1,     /* v1.9.1 */
>>   CSR_CLASS_V1P10,      /* v1.10 */
>>   CSR_CLASS_V1P11,      /* v1.11 */
>>   CSR_CLASS_VDRAFT
>> };
>>
>> * opcodes/riscv-opc.c
>>
>> static const struct priv_version_t priv_versions[] =
>> {
>>   {"1p9", CSR_CLASS_V1P9},
>>   {"1p9p1", CSR_CLASS_V1P9P1},
>>   {"1p10", CSR_CLASS_V1P10},
>>   {"1p11", CSR_CLASS_V1P11},
>>
>> /* Terminate the list.  */
>>   {NULL, 0}
>> };
>>
>> * include/opcode/riscv-opc.h
>>
>> Format, DECLARE_CSR      (NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)
>>         DECLARE_CSR_ALIAS(NAME, VALUE, CLASS, DEFINE_VER, ABORT_VER)
>>
>> NAME:       CSR name.
>> VALUE:      CSR address
>> CLASS:      ISA dependency
>> DEFINE_VER: First defined in which privilege spec.
>> ABORT_VER:  Aborted in which privilege spec.  If the CSR is still valid in
>>             the lastest version, then it should be CSR_CLASS_VDRAFT.
>>
>> If the CSR is aborted in the latest spec, or has not only one information, then
>> use DECLARE_CSR_ALIAS.  Otherwise, use DECLARE_CSR.
>>
>> For example,
>> DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
>> DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
>>
>>
>> Thanks
>> Nelson
>>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions.
  2020-04-18 11:07 ` [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions Nelson Chu
  2020-04-18 11:18   ` Nelson Chu
@ 2020-04-23 22:58   ` Palmer Dabbelt
  2020-04-24  2:37     ` Nelson Chu
  1 sibling, 1 reply; 25+ messages in thread
From: Palmer Dabbelt @ 2020-04-23 22:58 UTC (permalink / raw)
  To: nelson.chu
  Cc: binutils, gdb-patches, Andrew Waterman, asb, maxim.blinov, kito.cheng

On Sat, 18 Apr 2020 04:07:51 PDT (-0700), nelson.chu@sifive.com wrote:
> For now, we can only use the GAS option -march and ELF arch attribute to set
> the versions for ISA extensions.  It seems not so friendly for user.
> Therefore, we support new GAS options and configure options to make it easiler
> for user.
>
> New Assembler Options,
>
> * -misa-spec = [2p0|2p1|2p2|20190608|20191213]
> You can simply choose the ISA spec by this option, and then assembler will set
> the version for the standard extensions if you don’t set in the ELF arch
> attributes or -march option.

This makes sense.

> * -mriscv-isa-version = <ISA-string>
> The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
> prefix.  There are two reasons that you may need this option,
>
> 1. Some versions of extensions defined in the ISA spec are not matched to the
> toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
> ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
> have to use this option to choose the correct version for V-ext.
>
> 2. You want to update the version for the specific standard extensions if the
> version are not set in the ELF arch attributes and -march option.

I don't buy the argument for this.  The V extension stuff isn't relevant: those
are all draft versions, and this is a perfect reason why we don't want to take
drafts upstream.   When we have a defined V ISA it'll be part of a versioned
RISC-V specification and any users that want it can just use at least that ISA
spec.

For the second argument, why not just provide those via -march?  I can buy that
it's a pain to build up valid -march strings in build scripts, but this just
fixes a specific instance of that problem (and that's not going to be that
common, as most users just want a single ISA version).

I haven't really looked at the code, as dropping this will change the patches
pretty drasticly.

> New Default Configure Options,
>
> * --with-arch = <ISA-string>
> The syntax of <ISA-string> is same as -march option.  Assembler will check this
> if -march option and ELF arch attributes aren’t set.

Ya, we should have had that a while ago :)

> * --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
> The syntax is same as -misa-spec option.  Assembler will check this if
> -misa-spec option isn’t set.
>
> * --with-riscv-isa-version = <ISA-string>
> The syntax of <ISA-string> is same as -mriscv-isa-version option.  Assembler
> will check this if -mriscv-isa-version option isn’t set.
>
> The Priority of these options,
>
> * ELF arch attributes > Assembler options > Default configure options
> * For GAS options, -march > -mriscv-isa-version > -misa-spec
> * For configure options, --with-arch > --with-riscv-isa-version > --with-isa-spec
>
> 	gas/
> 	* config/tc-riscv.c (DEFAULT_ARCH_WITH_EXT, DEFAULT_ISA_SPEC,
> 	DEFAULT_RISCV_ISA_VERSION): Default configure option settings.
> 	You can set them by new configure options --with-arch,
> 	--with-isa-spec and --with-riscv-isa-version.
>
> 	(default_arch_with_ext, default_isa_spec, default_riscv_isa_version):
> 	const char strings which are used to set the ISA extensions. You can
> 	use gas options -march (or ELF build attributes), and new gas options
> 	-misa-spec and -mriscv-isa-version to set them, respectively.  If the
> 	gas options and attributes are not set, then assembler will check the
> 	default configure option settings.
>
> 	(ext_version_hash): The hash table used to handle the extensions
> 	with versions.
> 	(init_ext_version_hash): Initialize the ext_version_hash according
> 	to riscv_ext_version_table.
>
> 	(riscv_get_default_ext_version): The callback function of
> 	riscv_parse_subset_t.  According to the choosed ISA spec,
> 	get the default version for the specific extension.
>
> 	(riscv_set_arch): Add new bfd_boolean parameter update_version.
> 	The update_version is TRUE means we just want to update the version
> 	according to default_riscv_isa_version, so don't call the
> 	riscv_release_subset_list to reset the subset list.  Pass two new
> 	arguments to riscv_parse_subset, one is update_version mentioned above,
> 	the other is the default_isa_spec.  We use the default_isa_spec to
> 	choose the default version for the extensions.
>
> 	(enum options, struct option md_longopts): Add new gas options,
> 	-misa-spec and -mriscv-isa-version.
> 	(md_parse_option): Handle the above new gas options.
> 	(riscv_after_parse_args): Call init_ext_version_hash to initialize the
> 	ext_version_hash, and then always call riscv_set_arch twice to set and
> 	update the architecture with versions according to default_arch_with_ext
> 	and default_riscv_isa_version.
> 	(s_riscv_attribute): Same as riscv_after_parse_args, we need to call
> 	riscv_set_arch twice.
>
> 	* testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2p2.  Set 0p0
> 	as default version for x extensions.
> 	* testsuite/gas/riscv/attribute-02.d: Likewise.
> 	* testsuite/gas/riscv/attribute-03.d: Likewise.
> 	* testsuite/gas/riscv/attribute-04.d: Likewise.
> 	* testsuite/gas/riscv/attribute-05.d: Likewise.
> 	* testsuite/gas/riscv/attribute-06.d: Likewise.
> 	* testsuite/gas/riscv/attribute-07.d: Likewise.
> 	* testsuite/gas/riscv/attribute-08.d: Likewise.
> 	* testsuite/gas/riscv/attribute-09.d: New testcase.  For i-ext, we
> 	already set the version 1p9 in elf attribute, so -misa-spec and
> 	-mriscv-isa-version don't update the version to 2p0 and 2p1.
> 	For f-ext, we don't set the version to it, so use the default version
> 	2p0 according to the ISA spec 2p2.  For v-ext, the default version is
> 	0p7 according to ISA spec 2p2, but we use -mriscv-isa-version to update
> 	it to 0p9.  For a-ext, it isn't enabled by -march or elf attribute, so
> 	we don't update it's version even if -mriscv-isa-version is set.
> 	As for the zicsr extension, it is defined in the lastest ISA spec
> 	rather than 2p2, so set it's version to 0p0.
> 	* testsuite/gas/riscv/attribute-09.s: Likewise.
> 	* testsuite/gas/riscv/attribute-10.d: New testcase.  The version of
> 	zicsr is 2p0 according to ISA spec 20191213.
> 	* testsuite/gas/riscv/attribute-11.d: New testcase.  We can also update
> 	the z* extension by -mriscv-isa-version.
>
> 	* configure.ac: Add new configure options, --with-arch, --with-isa-spec
> 	and --with-riscv-isa-version.
> 	* configure: Regenerated.
> 	* config.in: Regenerated.
>
> 	bfd/
> 	* elfxx-riscv.h (struct riscv_subset_t): Add new bfd_boolean field
> 	use_default_version, which is used to record whether the default
> 	version is used for the extension.
> 	(struct riscv_parse_subset_t): Add new callback function
> 	get_default_version.  It is used to find the default version for
> 	the specific extension.
> 	(riscv_add_subset, riscv_parse_subset): Update function declaration.
>
> 	* elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters
> 	default_major_version and default_minor_version.  Add new bfd_boolean
> 	parameter *use_default_version.  Set it to TRUE if we need to call
> 	the callback rps->get_default_version to find the default version.
>
> 	(riscv_update_subset_version): Only update the version of existin
> 	standard extensions and their Z* sub extensions, if -mriscv-isa-version
> 	or --with-riscv-isa-version are set, and the default version are used.
>
> 	(riscv_add_subset): New parameter use_default_version.  Record whether
> 	the default version is used.  riscv_update_subset_version only update
> 	the version of extensions if the default versions are used.
>
> 	(riscv_parse_subset): Add two parameters isa_spec_name and
> 	update_version.  Pass them to riscv_parse_std_ext and
> 	riscv_parse_prefixed_ext.  The string set by -mriscv-isa-version or
> 	--with-riscv-isa-version doesn't have to start with rv32/rv64, so
> 	skip the checking if update_version is TRUE.
> 	(riscv_parse_std_ext): If update_version is TRUE, then we just call
> 	riscv_update_subset_version to update the default version.  Otherwise,
> 	Call rps->get_default_version if we fail to find the default version
> 	in riscv_parsing_subset_version, and then call riscv_add_subset to add
> 	the subset into subset list.
> 	(riscv_parse_prefixed_ext): Same as the riscv_parse_std_ext.
> 	(riscv_std_z_ext_strtab): Support Zicsr extensions.
>
> 	* elfnn-riscv.c (riscv_merge_std_ext, riscv_merge_multi_letter_ext):
> 	Updated.  Pass update_version as FALSE to riscv_add_subset, the
> 	update_version is only needed for assembler, not linker.
> 	(riscv_merge_arch_attr_info): The callback function get_default_version
> 	is only needed for assembler, so set it to NULL in linker.  Also, Pass
> 	isa_spec_name as NULL and update_version as FALSE to riscv_parse_subset.
>
> 	include/
> 	* opcode/riscv.h (struct riscv_ext_version): New structure holds
> 	version information for the specific ISA.
>
> 	opcodes/
> 	* riscv-opc.c (riscv_ext_version_table): The table used to store
> 	all information about the supported spec and the corresponding ISA
> 	versions.  Currently, only Zicsr is supported to verify the
> 	correctness of Z sub extension settings.  Others will be supported
> 	in the future patches.
> ---
>  bfd/elfnn-riscv.c                      |  24 ++-
>  bfd/elfxx-riscv.c                      | 350 ++++++++++++++++++++++++---------
>  bfd/elfxx-riscv.h                      |  12 +-
>  gas/config.in                          |   9 +
>  gas/config/tc-riscv.c                  | 128 +++++++++++-
>  gas/configure                          |  53 ++++-
>  gas/configure.ac                       |  35 +++-
>  gas/testsuite/gas/riscv/attribute-01.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-02.d |   4 +-
>  gas/testsuite/gas/riscv/attribute-03.d |   4 +-
>  gas/testsuite/gas/riscv/attribute-04.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-05.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-06.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-07.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-08.d |   2 +-
>  gas/testsuite/gas/riscv/attribute-09.d |   6 +
>  gas/testsuite/gas/riscv/attribute-09.s |   1 +
>  gas/testsuite/gas/riscv/attribute-10.d |   6 +
>  gas/testsuite/gas/riscv/attribute-11.d |   6 +
>  include/opcode/riscv.h                 |  11 ++
>  opcodes/riscv-opc.c                    |  53 +++++
>  21 files changed, 585 insertions(+), 129 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/attribute-09.d
>  create mode 100644 gas/testsuite/gas/riscv/attribute-09.s
>  create mode 100644 gas/testsuite/gas/riscv/attribute-10.d
>  create mode 100644 gas/testsuite/gas/riscv/attribute-11.d
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 8fcb106..4ca49e0 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -2802,7 +2802,7 @@ riscv_merge_std_ext (bfd *ibfd,
>    if (!riscv_i_or_e_p (ibfd, out_arch, out))
>      return FALSE;
>
> -  if (in->name[0] != out->name[0])
> +  if (strcasecmp (in->name, out->name) != 0)
>      {
>        /* TODO: We might allow merge 'i' with 'e'.  */
>        _bfd_error_handler
> @@ -2818,8 +2818,8 @@ riscv_merge_std_ext (bfd *ibfd,
>        return FALSE;
>      }
>    else
> -    riscv_add_subset (&merged_subsets,
> -		      in->name, in->major_version, in->minor_version);
> +    riscv_add_subset (&merged_subsets, in->name, in->major_version,
> +		      in->minor_version, FALSE);
>
>    in = in->next;
>    out = out->next;
> @@ -2848,7 +2848,7 @@ riscv_merge_std_ext (bfd *ibfd,
>
>        struct riscv_subset_t *merged = find_in ? find_in : find_out;
>        riscv_add_subset (&merged_subsets, merged->name,
> -			merged->major_version, merged->minor_version);
> +			merged->major_version, merged->minor_version, FALSE);
>      }
>
>    /* Skip all standard extensions.  */
> @@ -2917,14 +2917,14 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
>  	{
>  	  /* `in' comes before `out', append `in' and increment.  */
>  	  riscv_add_subset (&merged_subsets, in->name, in->major_version,
> -			    in->minor_version);
> +			    in->minor_version, FALSE);
>  	  in = in->next;
>  	}
>        else if (cmp > 0)
>  	{
>  	  /* `out' comes before `in', append `out' and increment.  */
>  	  riscv_add_subset (&merged_subsets, out->name, out->major_version,
> -			    out->minor_version);
> +			    out->minor_version, FALSE);
>  	  out = out->next;
>  	}
>        else
> @@ -2938,7 +2938,7 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
>  	    }
>
>  	  riscv_add_subset (&merged_subsets, out->name, out->major_version,
> -			    out->minor_version);
> +			    out->minor_version, FALSE);
>  	  out = out->next;
>  	  in = in->next;
>  	}
> @@ -2952,7 +2952,7 @@ riscv_merge_multi_letter_ext (bfd *ibfd,
>      while (tail)
>        {
>  	riscv_add_subset (&merged_subsets, tail->name, tail->major_version,
> -			  tail->minor_version);
> +			  tail->minor_version, FALSE);
>  	tail = tail->next;
>        }
>    }
> @@ -2975,13 +2975,17 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
>    riscv_parse_subset_t rpe_in;
>    riscv_parse_subset_t rpe_out;
>
> +  /* Only assembler needs to check the default version of ISA, so just set
> +     the rpe_in.get_default_version and rpe_out.get_default_version to NULL.  */
>    rpe_in.subset_list = &in_subsets;
>    rpe_in.error_handler = _bfd_error_handler;
>    rpe_in.xlen = &xlen_in;
> +  rpe_in.get_default_version = NULL;
>
>    rpe_out.subset_list = &out_subsets;
>    rpe_out.error_handler = _bfd_error_handler;
>    rpe_out.xlen = &xlen_out;
> +  rpe_out.get_default_version = NULL;
>
>    if (in_arch == NULL && out_arch == NULL)
>      return NULL;
> @@ -2993,10 +2997,10 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
>      return in_arch;
>
>    /* Parse subset from arch string.  */
> -  if (!riscv_parse_subset (&rpe_in, in_arch))
> +  if (!riscv_parse_subset (&rpe_in, in_arch, NULL, FALSE))
>      return NULL;
>
> -  if (!riscv_parse_subset (&rpe_out, out_arch))
> +  if (!riscv_parse_subset (&rpe_out, out_arch, NULL, FALSE))
>      return NULL;
>
>    /* Checking XLEN.  */
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index b15fdee..3a6aaf3 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1025,9 +1025,8 @@ riscv_elf_add_sub_reloc (bfd *abfd,
>       `minor_version`: Parsing result of minor version, set to 0 if version is
>       not present in arch string, but set to `default_minor_version` if
>       `major_version` using default_major_version.
> -     `default_major_version`: Default major version.
> -     `default_minor_version`: Default minor version.
> -     `std_ext_p`: True if parsing std extension.  */
> +     `std_ext_p`: True if parsing std extension.
> +     `use_default_version`: Set it to True if we need the default version.  */
>
>  static const char *
>  riscv_parsing_subset_version (riscv_parse_subset_t *rps,
> @@ -1035,17 +1034,16 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>  			      const char *p,
>  			      unsigned *major_version,
>  			      unsigned *minor_version,
> -			      unsigned default_major_version,
> -			      unsigned default_minor_version,
> -			      bfd_boolean std_ext_p)
> +			      bfd_boolean std_ext_p,
> +			      bfd_boolean *use_default_version)
>  {
>    bfd_boolean major_p = TRUE;
>    unsigned version = 0;
> -  unsigned major = 0;
> -  unsigned minor = 0;
>    char np;
>
> -  for (;*p; ++p)
> +  *major_version = 0;
> +  *minor_version = 0;
> +  for (; *p; ++p)
>      {
>        if (*p == 'p')
>  	{
> @@ -1057,7 +1055,6 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>  	      if (std_ext_p)
>  		{
>  		  *major_version = version;
> -		  *minor_version = 0;
>  		  return p;
>  		}
>  	      else
> @@ -1068,7 +1065,7 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>  		}
>  	    }
>
> -	  major = version;
> +	  *major_version = version;
>  	  major_p = FALSE;
>  	  version = 0;
>  	}
> @@ -1079,21 +1076,15 @@ riscv_parsing_subset_version (riscv_parse_subset_t *rps,
>      }
>
>    if (major_p)
> -    major = version;
> +    *major_version = version;
>    else
> -    minor = version;
> +    *minor_version = version;
>
> -  if (major == 0 && minor == 0)
> -    {
> -      /* We don't found any version string, use default version.  */
> -      *major_version = default_major_version;
> -      *minor_version = default_minor_version;
> -    }
> -  else
> -    {
> -      *major_version = major;
> -      *minor_version = minor;
> -    }
> +  /* We can not find any version in string, need to parse default version.  */
> +  if (use_default_version != NULL
> +      && *major_version == 0
> +      && *minor_version == 0)
> +    *use_default_version = TRUE;
>    return p;
>  }
>
> @@ -1106,6 +1097,41 @@ riscv_supported_std_ext (void)
>    return "mafdqlcbjtpvn";
>  }
>
> +/* Update the version of standard extensions and their Z* sub extensions
> +   if -mriscv-isa-version is set.  */
> +
> +static bfd_boolean
> +riscv_update_subset_version (riscv_parse_subset_t *rps,
> +			     const char *ext_with_version,
> +			     char *ext,
> +                             unsigned major_version,
> +			     unsigned minor_version,
> +			     bfd_boolean use_default_version)
> +{
> +  riscv_subset_t *subset = riscv_lookup_subset (rps->subset_list, ext);;
> +
> +  /* The extension doesn't exist, so just return.  */
> +  if (subset == NULL)
> +    return TRUE;
> +
> +  /* This means we can not find the version in the string.  */
> +  if (use_default_version)
> +    {
> +      rps->error_handler ("-mriscv-isa-version=%s: unexpected version "
> +			  "setting for subset `%s'", ext_with_version, ext);
> +      return FALSE;
> +    }
> +
> +  /* We only update the extension which use the default version.  */
> +  if (subset->use_default_version)
> +    {
> +      subset->major_version = major_version;
> +      subset->minor_version = minor_version;
> +    }
> +
> +  return TRUE;
> +}
> +
>  /* Parsing function for standard extensions.
>
>     Return Value:
> @@ -1114,46 +1140,95 @@ riscv_supported_std_ext (void)
>     Arguments:
>       `rps`: Hooks and status for parsing subset.
>       `march`: Full arch string.
> -     `p`: Curent parsing position.  */
> +     `p`: Curent parsing position.
> +     `isa_spec_name`: The ISA spec name.  We set the default ISA versions
> +     according to it.
> +     `update_version`: True if the -mriscv-isa-version is set, and we need
> +     to update the version for the existing extensions.  */
>
>  static const char *
>  riscv_parse_std_ext (riscv_parse_subset_t *rps,
> -		     const char *march, const char *p)
> +		     const char *march,
> +		     const char *p,
> +		     const char *isa_spec_name,
> +		     bfd_boolean update_version)
>  {
>    const char *all_std_exts = riscv_supported_std_ext ();
>    const char *std_exts = all_std_exts;
> -
>    unsigned major_version = 0;
>    unsigned minor_version = 0;
>    char std_ext = '\0';
> +  bfd_boolean use_default_version = FALSE;
>
>    /* First letter must start with i, e or g.  */
>    switch (*p)
>      {
>        case 'i':
> -	p++;
> -	p = riscv_parsing_subset_version (
> -	      rps,
> -	      march,
> -	      p, &major_version, &minor_version,
> -	      /* default_major_version= */ 2,
> -	      /* default_minor_version= */ 0,
> -	      /* std_ext_p= */TRUE);
> -	riscv_add_subset (rps->subset_list, "i", major_version, minor_version);
> +	p = riscv_parsing_subset_version (rps,
> +					  march,
> +					  ++p,
> +					  &major_version,
> +					  &minor_version,
> +					  /* std_ext_p= */TRUE,
> +					  &use_default_version);
> +
> +	/* Update the version for exsiting extension.  */
> +	if (update_version)
> +	  {
> +	    if (!riscv_update_subset_version (rps, march, "i",
> +					      major_version,
> +					      minor_version,
> +					      use_default_version))
> +	      return NULL;
> +	    break;
> +	  }
> +
> +	/* Find the default version if needed.  */
> +	if (use_default_version)
> +	  rps->get_default_version ("i",
> +				    isa_spec_name,
> +				    &major_version,
> +				    &minor_version);
> +	riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
> +			  use_default_version);
>  	break;
>
>        case 'e':
> -	p++;
> -	p = riscv_parsing_subset_version (
> -	      rps,
> -	      march,
> -	      p, &major_version, &minor_version,
> -	      /* default_major_version= */ 1,
> -	      /* default_minor_version= */ 9,
> -	      /* std_ext_p= */TRUE);
> -
> -	riscv_add_subset (rps->subset_list, "e", major_version, minor_version);
> -	riscv_add_subset (rps->subset_list, "i", 2, 0);
> +	p = riscv_parsing_subset_version (rps,
> +					  march,
> +					  ++p,
> +					  &major_version,
> +					  &minor_version,
> +					  /* std_ext_p= */TRUE,
> +					  &use_default_version);
> +
> +	/* Update the version for exsiting extension.  */
> +	if (update_version)
> +	  {
> +	    if (!riscv_update_subset_version (rps, march, "e",
> +					      major_version,
> +					      minor_version,
> +					      use_default_version))
> +	      return NULL;
> +	    break;
> +	  }
> +
> +	/* Find the default version if needed.  */
> +	if (use_default_version)
> +	  rps->get_default_version ("e",
> +				    isa_spec_name,
> +				    &major_version,
> +				    &minor_version);
> +	riscv_add_subset (rps->subset_list, "e", major_version, minor_version,
> +			  use_default_version);
> +
> +	/* i-ext must be enabled.  */
> +	rps->get_default_version ("i",
> +				  isa_spec_name,
> +				  &major_version,
> +				  &minor_version);
> +	riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
> +			  TRUE);
>
>  	if (*rps->xlen > 32)
>  	  {
> @@ -1161,35 +1236,58 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps,
>  				march, *rps->xlen);
>  	    return NULL;
>  	  }
> -
>  	break;
>
>        case 'g':
> -	p++;
> -	p = riscv_parsing_subset_version (
> -	      rps,
> -	      march,
> -	      p, &major_version, &minor_version,
> -	      /* default_major_version= */ 2,
> -	      /* default_minor_version= */ 0,
> -	      /* std_ext_p= */TRUE);
> -	riscv_add_subset (rps->subset_list, "i", major_version, minor_version);
> +	/* The g-ext shouldn't has the version, so we just skip the setting if
> +	   user set a version to it.  */
> +	p = riscv_parsing_subset_version (rps,
> +					  march,
> +					  ++p,
> +					  &major_version,
> +					  &minor_version,
> +					  TRUE,
> +					  &use_default_version);
> +
> +	/* Set the version of g in -mriscv-isa-version is meaningless,
> +	   so just skip it.  */
> +	if (update_version)
> +	  break;
> +
> +	/* i-ext must be enabled.  */
> +	rps->get_default_version ("i",
> +				  isa_spec_name,
> +				  &major_version,
> +				  &minor_version);
> +	riscv_add_subset (rps->subset_list, "i", major_version, minor_version,
> +			  TRUE);
>
>  	for ( ; *std_exts != 'q'; std_exts++)
>  	  {
>  	    const char subset[] = {*std_exts, '\0'};
> -	    riscv_add_subset (
> -	      rps->subset_list, subset, major_version, minor_version);
> +	    rps->get_default_version (subset,
> +				      isa_spec_name,
> +				      &major_version,
> +				      &minor_version);
> +	    riscv_add_subset (rps->subset_list, subset, major_version,
> +			      minor_version, TRUE);
>  	  }
>  	break;
>
>        default:
> -	rps->error_handler (
> -	  "-march=%s: first ISA subset must be `e', `i' or `g'", march);
> -	return NULL;
> +	/* The first ISA subset of -mriscv-isa-version will not necessarily
> +	   be e/i/g.  */
> +	if (!update_version)
> +	  {
> +	    rps->error_handler (
> +	    "-march=%s: first ISA subset must be `e', `i' or `g'", march);
> +	    return NULL;
> +	  }
>      }
>
> -  while (*p)
> +  /* The riscv_parsing_subset_version may set `p` to NULL, so I think we should
> +     skip parsing the string if `p` is NULL or value of `p` is `\0`.  */
> +  while (p != NULL && *p != '\0')
>      {
>        char subset[2] = {0, 0};
>
> @@ -1218,21 +1316,37 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps,
>  	      march, *p);
>  	  return NULL;
>  	}
> -
>        std_exts++;
>
> -      p++;
> -      p = riscv_parsing_subset_version (
> -	    rps,
> -	    march,
> -	    p, &major_version, &minor_version,
> -	    /* default_major_version= */ 2,
> -	    /* default_minor_version= */ 0,
> -	    /* std_ext_p= */TRUE);
> -
> +      use_default_version = FALSE;
>        subset[0] = std_ext;
> +      p = riscv_parsing_subset_version (rps,
> +					march,
> +					++p,
> +					&major_version,
> +					&minor_version,
> +					TRUE,
> +					&use_default_version);
> +
> +      /* Update the version for exsiting extension.  */
> +      if (update_version)
> +	{
> +	  if (!riscv_update_subset_version (rps, march, subset,
> +					    major_version,
> +					    minor_version,
> +					    use_default_version))
> +	    return NULL;
> +	  continue;
> +	}
>
> -      riscv_add_subset (rps->subset_list, subset, major_version, minor_version);
> +      /* Find the default version if needed.  */
> +      if (use_default_version)
> +	rps->get_default_version (subset,
> +				  isa_spec_name,
> +				  &major_version,
> +				  &minor_version);
> +      riscv_add_subset (rps->subset_list, subset, major_version, minor_version,
> +			use_default_version);
>      }
>    return p;
>  }
> @@ -1272,21 +1386,28 @@ typedef struct riscv_parse_config
>  } riscv_parse_config_t;
>
>  /* Parse a generic prefixed extension.
> -   march: The full architecture string as passed in by "-march=...".
> -   p: Point from which to start parsing the -march string.
> -   config: What class of extensions to parse, predicate funcs,
> -   and strings to use in error reporting.  */
> +   `march`: The full architecture string as passed in by "-march=...".
> +   `p`: Point from which to start parsing the -march string.
> +   `config`: What class of extensions to parse, predicate funcs,
> +   and strings to use in error reporting.
> +   `isa_spec_name`: ISA spec name.  We set the default ISA versions
> +   according to it.
> +   `update_version`: True if the -mriscv-isa-version is set, and we need
> +   update the version for the existing extensions.  */
>
>  static const char *
>  riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>  			  const char *march,
>  			  const char *p,
> -			  const riscv_parse_config_t *config)
> +			  const riscv_parse_config_t *config,
> +			  const char *isa_spec_name,
> +			  bfd_boolean update_version)
>  {
>    unsigned major_version = 0;
>    unsigned minor_version = 0;
>    const char *last_name;
>    riscv_isa_ext_class_t class;
> +  bfd_boolean use_default_version;
>
>    while (*p)
>      {
> @@ -1309,15 +1430,11 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>        while (*++q != '\0' && *q != '_' && !ISDIGIT (*q))
>  	;
>
> +      use_default_version = FALSE;
>        end_of_version =
> -	riscv_parsing_subset_version (
> -	  rps,
> -	  march,
> -	  q, &major_version, &minor_version,
> -	  /* default_major_version= */ 2,
> -	  /* default_minor_version= */ 0,
> -	  /* std_ext_p= */FALSE);
> -
> +	riscv_parsing_subset_version (rps, march, q, &major_version,
> +				      &minor_version, FALSE,
> +				      &use_default_version);
>        *q = '\0';
>
>        /* Check that the name is valid.
> @@ -1335,10 +1452,11 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>  	  return NULL;
>  	}
>
> -      /* Check that the last item is not the same as this.  */
> +      /* Check that the last item is not the same as this.  Just skip this
> +	 check when updating the version.  */
>        last_name = rps->subset_list->tail->name;
> -
> -      if (!strcasecmp (last_name, subset))
> +      if (!update_version
> +	  && !strcasecmp (last_name, subset))
>  	{
>  	  rps->error_handler ("-march=%s: Duplicate %s ISA extension: \'%s\'",
>  			      march, config->prefix, subset);
> @@ -1357,7 +1475,30 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>  	  return NULL;
>  	}
>
> -      riscv_add_subset (rps->subset_list, subset, major_version, minor_version);
> +      if (update_version)
> +	{
> +	  /* Update the version for exsiting extension.  */
> +	  if (!riscv_update_subset_version (rps, march, subset,
> +					    major_version,
> +					    minor_version,
> +					    use_default_version))
> +	    {
> +	      free (subset);
> +	      return NULL;
> +	    }
> +	}
> +      else
> +	{
> +	  /* Find the default version if needed.  */
> +	  if (use_default_version)
> +	    rps->get_default_version (subset,
> +				      isa_spec_name,
> +				      &major_version,
> +				      &minor_version);
> +	  riscv_add_subset (rps->subset_list, subset, major_version,
> +			    minor_version, use_default_version);
> +	}
> +
>        free (subset);
>        p += end_of_version - subset;
>
> @@ -1384,7 +1525,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps,
>
>  static const char * const riscv_std_z_ext_strtab[] =
>    {
> -    NULL
> +    "zicsr", NULL
>    };
>
>  /* Same as `riscv_std_z_ext_strtab', but for S-class extensions.  */
> @@ -1457,11 +1598,17 @@ static const riscv_parse_config_t parse_config[] =
>
>     Arguments:
>       `rps`: Hooks and status for parsing subset.
> -     `arch`: Arch string.  */
> +     `arch`: Arch string.
> +     `isa_spec_name`: The ISA spec name.   We set the default ISA versions
> +     according to it.
> +     `update_version`: True if the -mriscv-isa-version is set, and we need
> +     update the version for the existing extensions.  */
>
>  bfd_boolean
>  riscv_parse_subset (riscv_parse_subset_t *rps,
> -		    const char *arch)
> +		    const char *arch,
> +		    const char *isa_spec_name,
> +		    bfd_boolean update_version)
>  {
>    const char *p = arch;
>    size_t i;
> @@ -1476,15 +1623,17 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
>        *rps->xlen = 64;
>        p += 4;
>      }
> -  else
> +  else if (!update_version)
>      {
> +      /* The string set by -mriscv-isa-version doesn't have to start
> +	 with rv32/rv64.  */
>        rps->error_handler ("-march=%s: ISA string must begin with rv32 or rv64",
>  			  arch);
>        return FALSE;
>      }
>
>    /* Parsing standard extension.  */
> -  p = riscv_parse_std_ext (rps, arch, p);
> +  p = riscv_parse_std_ext (rps, arch, p, isa_spec_name, update_version);
>
>    if (p == NULL)
>      return FALSE;
> @@ -1492,7 +1641,8 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
>    /* Parse the different classes of extensions in the specified order.  */
>
>    for (i = 0; i < ARRAY_SIZE (parse_config); ++i) {
> -    p = riscv_parse_prefixed_ext (rps, arch, p, &parse_config[i]);
> +    p = riscv_parse_prefixed_ext (rps, arch, p, &parse_config[i],
> +				  isa_spec_name, update_version);
>
>      if (p == NULL)
>        return FALSE;
> @@ -1543,7 +1693,8 @@ riscv_parse_subset (riscv_parse_subset_t *rps,
>  void
>  riscv_add_subset (riscv_subset_list_t *subset_list,
>  		  const char *subset,
> -		  int major, int minor)
> +		  int major, int minor,
> +		  bfd_boolean use_default_version)
>  {
>    riscv_subset_t *s = xmalloc (sizeof *s);
>
> @@ -1553,6 +1704,9 @@ riscv_add_subset (riscv_subset_list_t *subset_list,
>    s->name = xstrdup (subset);
>    s->major_version = major;
>    s->minor_version = minor;
> +  /* Record whether the default version is used.  The -mriscv-isa-version
> +     only update the ISA which use the default version.  */
> +  s->use_default_version = use_default_version;
>    s->next = NULL;
>
>    if (subset_list->tail != NULL)
> diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h
> index 76ee274..e3d5177 100644
> --- a/bfd/elfxx-riscv.h
> +++ b/bfd/elfxx-riscv.h
> @@ -40,6 +40,7 @@ struct riscv_subset_t
>    const char *name;
>    int major_version;
>    int minor_version;
> +  bfd_boolean use_default_version;
>    struct riscv_subset_t *next;
>  };
>
> @@ -56,7 +57,8 @@ riscv_release_subset_list (riscv_subset_list_t *);
>  extern void
>  riscv_add_subset (riscv_subset_list_t *,
>  		  const char *,
> -		  int, int);
> +		  int, int,
> +		  bfd_boolean);
>
>  extern riscv_subset_t *
>  riscv_lookup_subset (const riscv_subset_list_t *,
> @@ -72,11 +74,17 @@ typedef struct {
>    void (*error_handler) (const char *,
>  			 ...) ATTRIBUTE_PRINTF_1;
>    unsigned *xlen;
> +  void (*get_default_version) (const char *,
> +			       const char *,
> +			       unsigned int *,
> +			       unsigned int *);
>  } riscv_parse_subset_t;
>
>  extern bfd_boolean
>  riscv_parse_subset (riscv_parse_subset_t *,
> -		    const char *);
> +		    const char *,
> +		    const char *,
> +		    bfd_boolean);
>
>  extern const char *
>  riscv_supported_std_ext (void);
> diff --git a/gas/config.in b/gas/config.in
> index 8724eb1..935bd9b 100644
> --- a/gas/config.in
> +++ b/gas/config.in
> @@ -30,6 +30,9 @@
>  /* Default architecture. */
>  #undef DEFAULT_ARCH
>
> +/* Define default value for -march */
> +#undef DEFAULT_ARCH_WITH_EXT
> +
>  /* Default CRIS architecture. */
>  #undef DEFAULT_CRIS_ARCH
>
> @@ -50,12 +53,18 @@
>  /* Define to 1 if you want to generate x86 relax relocations by default. */
>  #undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS
>
> +/* Define default value for -misa-spec */
> +#undef DEFAULT_ISA_SPEC
> +
>  /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
>  #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
>
>  /* Define to 1 if you want to generate RISC-V arch attribute by default. */
>  #undef DEFAULT_RISCV_ATTR
>
> +/* Define default isa version which are not covered by --with-isa-spec */
> +#undef DEFAULT_RISCV_ISA_VERSION
> +
>  /* Define to 1 if you want to generate GNU x86 used ISA and feature properties
>     by default. */
>  #undef DEFAULT_X86_USED_NOTE
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 168561e..bfcf2f0 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -63,7 +63,22 @@ struct riscv_cl_insn
>  #define DEFAULT_RISCV_ATTR 0
>  #endif
>
> +#ifndef DEFAULT_ARCH_WITH_EXT
> +#define DEFAULT_ARCH_WITH_EXT NULL
> +#endif
> +
> +#ifndef DEFAULT_ISA_SPEC
> +#define DEFAULT_ISA_SPEC "2p2"
> +#endif
> +
> +#ifndef DEFAULT_RISCV_ISA_VERSION
> +#define DEFAULT_RISCV_ISA_VERSION NULL
> +#endif
> +
>  static const char default_arch[] = DEFAULT_ARCH;
> +static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
> +static const char *default_isa_spec = DEFAULT_ISA_SPEC;
> +static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
>
>  static unsigned xlen = 0; /* width of an x-register */
>  static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
> @@ -147,18 +162,87 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class)
>      }
>  }
>
> +/* Handle of the extension with version hash table.  */
> +static struct hash_control *ext_version_hash = NULL;
> +
> +static struct hash_control *
> +init_ext_version_hash (const struct riscv_ext_version *table)
> +{
> +  int i = 0;
> +  struct hash_control *hash = hash_new ();
> +
> +  while (table[i].name)
> +    {
> +      const char *name = table[i].name;
> +      const char *hash_error =
> +	hash_insert (hash, name, (void *) &table[i]);
> +
> +      if (hash_error != NULL)
> +	{
> +	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> +		   table[i].name, hash_error);
> +	  /* Probably a memory allocation problem?  Give up now.  */
> +	  as_fatal (_("Broken assembler.  No assembly attempted."));
> +	  return NULL;
> +	}
> +
> +      i++;
> +      while (table[i].name
> +	     && strcmp (table[i].name, name) == 0)
> +	i++;
> +    }
> +
> +  return hash;
> +}
> +
> +static void
> +riscv_get_default_ext_version (const char *name,
> +			       const char *spec_name,
> +			       unsigned int *major_version,
> +			       unsigned int *minor_version)
> +{
> +  struct riscv_ext_version *ext;
> +
> +  *major_version = 0;
> +  *minor_version = 0;
> +
> +  if (name == NULL
> +      || spec_name == NULL)
> +    return;
> +
> +  ext = (struct riscv_ext_version *) hash_find (ext_version_hash, name);
> +  while (ext
> +	 && ext->name
> +	 && strcmp (ext->name, name) == 0)
> +    {
> +      if (ext->spec_name
> +	  && strcmp (ext->spec_name, spec_name) == 0)
> +	{
> +	  *major_version = ext->major_version;
> +	  *minor_version = ext->minor_version;
> +	  return;
> +	}
> +      ext++;
> +    }
> +}
> +
>  /* Set which ISA and extensions are available.  */
>
>  static void
> -riscv_set_arch (const char *s)
> +riscv_set_arch (const char *s, bfd_boolean update_version)
>  {
>    riscv_parse_subset_t rps;
>    rps.subset_list = &riscv_subsets;
>    rps.error_handler = as_fatal;
>    rps.xlen = &xlen;
> +  rps.get_default_version = riscv_get_default_ext_version;
>
> -  riscv_release_subset_list (&riscv_subsets);
> -  riscv_parse_subset (&rps, s);
> +  if (s == NULL)
> +    return;
> +
> +  if (!update_version)
> +    riscv_release_subset_list (&riscv_subsets);
> +  riscv_parse_subset (&rps, s, default_isa_spec, update_version);
>  }
>
>  /* Handle of the OPCODE hash table.  */
> @@ -2348,6 +2432,8 @@ enum options
>    OPTION_NO_ARCH_ATTR,
>    OPTION_CSR_CHECK,
>    OPTION_NO_CSR_CHECK,
> +  OPTION_MISA_SPEC,
> +  OPTION_MRISCV_ISA_VERSION,
>    OPTION_END_OF_ENUM
>  };
>
> @@ -2364,6 +2450,8 @@ struct option md_longopts[] =
>    {"mno-arch-attr", no_argument, NULL, OPTION_NO_ARCH_ATTR},
>    {"mcsr-check", no_argument, NULL, OPTION_CSR_CHECK},
>    {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
> +  {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
> +  {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
>
>    {NULL, no_argument, NULL, 0}
>  };
> @@ -2392,7 +2480,9 @@ md_parse_option (int c, const char *arg)
>    switch (c)
>      {
>      case OPTION_MARCH:
> -      riscv_set_arch (arg);
> +      /* riscv_after_parse_args will call riscv_set_arch to parse
> +	 the architecture.  */
> +      default_arch_with_ext = arg;
>        break;
>
>      case OPTION_NO_PIC:
> @@ -2450,6 +2540,14 @@ md_parse_option (int c, const char *arg)
>        riscv_opts.csr_check = FALSE;
>        break;
>
> +    case OPTION_MISA_SPEC:
> +      default_isa_spec = arg;
> +      break;
> +
> +    case OPTION_MRISCV_ISA_VERSION:
> +      default_riscv_isa_version = arg;
> +      break;
> +
>      default:
>        return 0;
>      }
> @@ -2460,6 +2558,13 @@ md_parse_option (int c, const char *arg)
>  void
>  riscv_after_parse_args (void)
>  {
> +  /* Initialize the hash table for extensions with default version.  */
> +  ext_version_hash = init_ext_version_hash (riscv_ext_version_table);
> +
> +  /* The --with-arch is optional for now, so we have to set the xlen
> +     according to the default_arch, which is set by the --targte, first.
> +     Then, we use the xlen to set the default_arch_with_ext if the
> +     -march and --with-arch are not set.  */
>    if (xlen == 0)
>      {
>        if (strcmp (default_arch, "riscv32") == 0)
> @@ -2469,9 +2574,15 @@ riscv_after_parse_args (void)
>        else
>  	as_bad ("unknown default architecture `%s'", default_arch);
>      }
> +  if (default_arch_with_ext == NULL)
> +    default_arch_with_ext = xlen == 64 ? "rv64g" : "rv32g";
> +
> +  /* Set the architecture according to -march or --with-arch.  */
> +  riscv_set_arch (default_arch_with_ext, FALSE);
>
> -  if (riscv_subsets.head == NULL)
> -    riscv_set_arch (xlen == 64 ? "rv64g" : "rv32g");
> +  /* Update the version info according to -mriscv-isa-spec or
> +     --with-riscv-isa-spec.  */
> +  riscv_set_arch (default_riscv_isa_version, TRUE);
>
>    /* Add the RVC extension, regardless of -march, to support .option rvc.  */
>    riscv_set_rvc (FALSE);
> @@ -3366,7 +3477,7 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
>        obj_attribute *attr;
>        attr = elf_known_obj_attributes_proc (stdoutput);
>        if (!start_assemble)
> -	riscv_set_arch (attr[Tag_RISCV_arch].s);
> +	riscv_set_arch (attr[Tag_RISCV_arch].s, FALSE);
>        else
>  	as_fatal (_(".attribute arch must set before any instructions"));
>
> @@ -3379,6 +3490,9 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
>  	  if (! bfd_set_arch_mach (stdoutput, bfd_arch_riscv, mach))
>  	    as_warn (_("Could not set architecture and machine"));
>  	}
> +
> +      /* We also need to update the version of ISA here.  */
> +      riscv_set_arch (default_riscv_isa_version, TRUE);
>      }
>  }
>
> diff --git a/gas/configure b/gas/configure
> index 1515787..bce847a 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -13009,7 +13009,7 @@ $as_echo "#define NDS32_DEFAULT_ZOL_EXT 1" >>confdefs.h
>  $as_echo "$enable_zol_ext" >&6; }
>  	;;
>
> -      aarch64 | i386 | riscv | s390 | sparc)
> +      aarch64 | i386 | s390 | sparc)
>  	if test $this_target = $target ; then
>
>  cat >>confdefs.h <<_ACEOF
> @@ -13019,6 +13019,57 @@ _ACEOF
>  	fi
>  	;;
>
> +      riscv)
> +	# --target=riscv[32|64]-*-*.  */
> +	if test $this_target = $target ; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_ARCH "${arch}"
> +_ACEOF
> +
> +	fi
> +
> +	# --with-arch=<value>.  The syntax of <value> is same as Gas option -march.
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
> +$as_echo_n "checking for default configuration of --with-arch... " >&6; }
> +	if test "x${with_arch}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_ARCH_WITH_EXT "$with_arch"
> +_ACEOF
> +
> +	fi
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
> +$as_echo "$with_arch" >&6; }
> +
> +	# --with-isa-spec=[2p0|2p1|2p2|20190608|20191213].
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-isa-spec" >&5
> +$as_echo_n "checking for default configuration of --with-isa-spec... " >&6; }
> +	if test "x${with_isa_spec}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_ISA_SPEC "$with_isa_spec"
> +_ACEOF
> +
> +	fi
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_isa_spec" >&5
> +$as_echo "$with_isa_spec" >&6; }
> +
> +	# --with-riscv-isa-version=<value>.  The syntax of <value> is same as Gas
> +	# -march, but without the rv[32|64] prefix.
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-riscv-isa-version" >&5
> +$as_echo_n "checking for default configuration of --with-riscv-isa-version... " >&6; }
> +	if test "x${with_riscv_isa_version}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_RISCV_ISA_VERSION "$with_riscv_isa_version"
> +_ACEOF
> +
> +	fi
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
> +$as_echo "$with_riscv_isa_version" >&6; }
> +	;;
> +
>        rl78)
>  	f=rl78-parse.o
>  	case " $extra_objects " in
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 6f32e55..be4ba20 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -569,12 +569,45 @@ changequote([,])dnl
>  	AC_MSG_RESULT($enable_zol_ext)
>  	;;
>
> -      aarch64 | i386 | riscv | s390 | sparc)
> +      aarch64 | i386 | s390 | sparc)
>  	if test $this_target = $target ; then
>  	  AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
>  	fi
>  	;;
>
> +      riscv)
> +	# --target=riscv[32|64]-*-*.  */
> +	if test $this_target = $target ; then
> +	  AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
> +	fi
> +
> +	# --with-arch=<value>.  The syntax of <value> is same as Gas option -march.
> +	AC_MSG_CHECKING(for default configuration of --with-arch)
> +	if test "x${with_arch}" != x; then
> +	  AC_DEFINE_UNQUOTED(DEFAULT_ARCH_WITH_EXT, "$with_arch",
> +			     [Define default value for -march])
> +	fi
> +	AC_MSG_RESULT($with_arch)
> +
> +	# --with-isa-spec=[2p0|2p1|2p2|20190608|20191213].
> +	AC_MSG_CHECKING(for default configuration of --with-isa-spec)
> +	if test "x${with_isa_spec}" != x; then
> +	  AC_DEFINE_UNQUOTED(DEFAULT_ISA_SPEC, "$with_isa_spec",
> +			     [Define default value for -misa-spec])
> +	fi
> +	AC_MSG_RESULT($with_isa_spec)
> +
> +	# --with-riscv-isa-version=<value>.  The syntax of <value> is same as Gas
> +	# -march, but without the rv[32|64] prefix.
> +	AC_MSG_CHECKING(for default configuration of --with-riscv-isa-version)
> +	if test "x${with_riscv_isa_version}" != x; then
> +	  AC_DEFINE_UNQUOTED(DEFAULT_RISCV_ISA_VERSION, "$with_riscv_isa_version",
> +			     [Define default isa version which are not
> +			      covered by --with-isa-spec])
> +	fi
> +	AC_MSG_RESULT($with_riscv_isa_version)
> +	;;
> +
>        rl78)
>  	f=rl78-parse.o
>  	case " $extra_objects " in
> diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
> index e22773e..3f9e841 100644
> --- a/gas/testsuite/gas/riscv/attribute-01.d
> +++ b/gas/testsuite/gas/riscv/attribute-01.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv32g -march-attr
> +#as: -march=rv32g -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: empty.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
> index bc3295b..a58248e 100644
> --- a/gas/testsuite/gas/riscv/attribute-02.d
> +++ b/gas/testsuite/gas/riscv/attribute-02.d
> @@ -1,6 +1,6 @@
> -#as: -march=rv32gxargle -march-attr
> +#as: -march=rv32gxargle -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: empty.s
>  Attribute Section: riscv
>  File Attributes
> -  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0"
> +  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
> index 78b706a..04b9ab5 100644
> --- a/gas/testsuite/gas/riscv/attribute-03.d
> +++ b/gas/testsuite/gas/riscv/attribute-03.d
> @@ -1,6 +1,6 @@
> -#as: -march=rv32gxargle_xfoo -march-attr
> +#as: -march=rv32gxargle_xfoo -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: empty.s
>  Attribute Section: riscv
>  File Attributes
> -  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0_xfoo2p0"
> +  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle0p0_xfoo0p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
> index c97bf03..8a3f51b 100644
> --- a/gas/testsuite/gas/riscv/attribute-04.d
> +++ b/gas/testsuite/gas/riscv/attribute-04.d
> @@ -1,4 +1,4 @@
> -#as: -march-attr
> +#as: -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-04.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
> index f9b65f2..3309ff3 100644
> --- a/gas/testsuite/gas/riscv/attribute-05.d
> +++ b/gas/testsuite/gas/riscv/attribute-05.d
> @@ -1,4 +1,4 @@
> -#as: -march-attr
> +#as: -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-05.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-06.d b/gas/testsuite/gas/riscv/attribute-06.d
> index 1abeb47..5c8a5c6 100644
> --- a/gas/testsuite/gas/riscv/attribute-06.d
> +++ b/gas/testsuite/gas/riscv/attribute-06.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv32g2p0 -march-attr
> +#as: -march=rv32g2p1 -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-06.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-07.d b/gas/testsuite/gas/riscv/attribute-07.d
> index dfd7e6b..20ac9be 100644
> --- a/gas/testsuite/gas/riscv/attribute-07.d
> +++ b/gas/testsuite/gas/riscv/attribute-07.d
> @@ -1,4 +1,4 @@
> -#as: -march=rv64g2p0 -march-attr
> +#as: -march=rv64g2p1 -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-07.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-08.d b/gas/testsuite/gas/riscv/attribute-08.d
> index c10ac0c..7f580d3 100644
> --- a/gas/testsuite/gas/riscv/attribute-08.d
> +++ b/gas/testsuite/gas/riscv/attribute-08.d
> @@ -1,4 +1,4 @@
> -#as: -march-attr
> +#as: -march-attr -misa-spec=2p2
>  #readelf: -A
>  #source: attribute-08.s
>  Attribute Section: riscv
> diff --git a/gas/testsuite/gas/riscv/attribute-09.d b/gas/testsuite/gas/riscv/attribute-09.d
> new file mode 100644
> index 0000000..77c7ef3
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-09.d
> @@ -0,0 +1,6 @@
> +#as: -march-attr -misa-spec=2p2 -mriscv-isa-version=i2p1a2p1v0p9
> +#readelf: -A
> +#source: attribute-09.s
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: "rv32i1p9_f2p0_v0p9_zicsr0p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-09.s b/gas/testsuite/gas/riscv/attribute-09.s
> new file mode 100644
> index 0000000..0b1b16c
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-09.s
> @@ -0,0 +1 @@
> +	.attribute arch, "rv32i1p9fv_zicsr"
> diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
> new file mode 100644
> index 0000000..9c72035
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-10.d
> @@ -0,0 +1,6 @@
> +#as: -march-attr -march=rv32i_zicsr -misa-spec=20191213
> +#readelf: -A
> +#source: empty.s
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: "rv32i2p1_zicsr2p0"
> diff --git a/gas/testsuite/gas/riscv/attribute-11.d b/gas/testsuite/gas/riscv/attribute-11.d
> new file mode 100644
> index 0000000..bc7f986
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/attribute-11.d
> @@ -0,0 +1,6 @@
> +#as: -march-attr -march=rv32i_zicsr -misa-spec=20191213 -mriscv-isa-version=zicsr2p1
> +#readelf: -A
> +#source: empty.s
> +Attribute Section: riscv
> +File Attributes
> +  Tag_RISCV_arch: "rv32i2p1_zicsr2p1"
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index ac6e861..f8b0de3 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -343,6 +343,16 @@ struct riscv_opcode
>    unsigned long pinfo;
>  };
>
> +/* This structure holds version information for specific ISA.  */
> +
> +struct riscv_ext_version
> +{
> +  const char *name;
> +  const char *spec_name;
> +  unsigned int major_version;
> +  unsigned int minor_version;
> +};
> +
>  /* Instruction is a simple alias (e.g. "mv" for "addi").  */
>  #define	INSN_ALIAS		0x00000001
>
> @@ -420,5 +430,6 @@ extern const char * const riscv_fpr_names_abi[NFPR];
>
>  extern const struct riscv_opcode riscv_opcodes[];
>  extern const struct riscv_opcode riscv_insn_types[];
> +extern const struct riscv_ext_version riscv_ext_version_table[];
>
>  #endif /* _RISCV_H_ */
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index ceedcaf..7b885bf 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -884,3 +884,56 @@ const struct riscv_opcode riscv_insn_types[] =
>  /* Terminate the list.  */
>  {0, 0, INSN_CLASS_NONE, 0, 0, 0, 0, 0}
>  };
> +
> +const struct riscv_ext_version riscv_ext_version_table[] =
> +{
> +/* name, spec name,  major,  minor.  */
> +{"e",    "20191213",      1,     9},
> +{"e",    "20190608",      1,     9},
> +{"e",    "2p2",           1,     9},
> +
> +{"i",    "20191213",      2,     1},
> +{"i",    "20190608",      2,     1},
> +{"i",    "2p2",           2,     0},
> +
> +{"m",    "20191213",      2,     0},
> +{"m",    "20190608",      2,     0},
> +{"m",    "2p2",           2,     0},
> +
> +{"a",    "20191213",      2,     1},
> +{"a",    "20190608",      2,     0},
> +{"a",    "2p2",           2,     0},
> +
> +{"f",    "20191213",      2,     2},
> +{"f",    "20190608",      2,     2},
> +{"f",    "2p2",           2,     0},
> +
> +{"d",    "20191213",      2,     2},
> +{"d",    "20190608",      2,     2},
> +{"d",    "2p2",           2,     0},
> +
> +{"q",    "20191213",      2,     2},
> +{"q",    "20190608",      2,     2},
> +{"q",    "2p2",           2,     0},
> +
> +{"c",    "20191213",      2,     0},
> +{"c",    "20190608",      2,     0},
> +{"c",    "2p2",           2,     0},
> +
> +{"p",    "20191213",      0,     2},
> +{"p",    "20190608",      0,     2},
> +{"p",    "2p2",           0,     1},
> +
> +{"v",    "20191213",      0,     7},
> +{"v",    "20190608",      0,     7},
> +{"v",    "2p2",           0,     7},
> +
> +{"n",    "20190608",      1,     1},
> +{"n",    "2p2",           1,     1},
> +
> +{"zicsr","20191213",      2,     0},
> +{"zicsr","20190608",      2,     0},
> +
> +/* Terminate the list.  */
> +{NULL, NULL, 0, 0}
> +};

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions.
  2020-04-23 22:58   ` Palmer Dabbelt
@ 2020-04-24  2:37     ` Nelson Chu
  2020-04-24  6:43       ` Nelson Chu
  0 siblings, 1 reply; 25+ messages in thread
From: Nelson Chu @ 2020-04-24  2:37 UTC (permalink / raw)
  To: Palmer Dabbelt
  Cc: Binutils, gdb-patches, Andrew Waterman, asb, Maxim Blinov, Kito Cheng

Hi Palmer,

On Fri, Apr 24, 2020 at 6:59 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
> > * -mriscv-isa-version = <ISA-string>
> > The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
> > prefix.  There are two reasons that you may need this option,
> >
> > 1. Some versions of extensions defined in the ISA spec are not matched to the
> > toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
> > ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
> > have to use this option to choose the correct version for V-ext.
> >
> > 2. You want to update the version for the specific standard extensions if the
> > version are not set in the ELF arch attributes and -march option.
>
> I don't buy the argument for this.  The V extension stuff isn't relevant: those
> are all draft versions, and this is a perfect reason why we don't want to take
> drafts upstream.   When we have a defined V ISA it'll be part of a versioned
> RISC-V specification and any users that want it can just use at least that ISA
> spec.

I think I got your point, we all have reached consensus that it's
better not to take draft spec upstream.  The v-extension might be a
little different, the latest released ISA spec defines the v-ext as
0.7, even if the released riscv-v-spec is up to 0.8.  According to our
consensus, we should accept the 0.8 and 0.9 v-ext on upstream until we
have a released ISA spec defining them.  Otherwise, we can just accept
the 0.7 v-ext for now.  I guess that is why we just have v-ext 0.8 and
0.9 on riscv/riscv-binutils-gdb rather than upstream.  This makes
sense, thank you :)

And we can still use -march to choose the version we want, including
v-ext.  If users use the rvv-0.9.x in riscv/riscv-binutils-gdb, they
have to set the v-ext with version 0.9 by -march.  Otherwise, we will
give them v0p0 if they only set -misa-spec=20191213.

> For the second argument, why not just provide those via -march?  I can buy that
> it's a pain to build up valid -march strings in build scripts, but this just
> fixes a specific instance of that problem (and that's not going to be that
> common, as most users just want a single ISA version).

Umm I have to think about this again.

> I haven't really looked at the code, as dropping this will change the patches pretty drasticly.

Yes dropping this need to rewrite the code structure.  I must think
about that if we can have a better solution to reduce the overhead of
-march setting in the build script.


Thanks for the suggestions, they are really helpful :)
Nelson

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions.
  2020-04-24  2:37     ` Nelson Chu
@ 2020-04-24  6:43       ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-24  6:43 UTC (permalink / raw)
  To: Palmer Dabbelt
  Cc: Binutils, gdb-patches, Andrew Waterman, asb, Maxim Blinov, Kito Cheng

On Fri, Apr 24, 2020 at 10:37 AM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> Hi Palmer,
>
> On Fri, Apr 24, 2020 at 6:59 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
> > > * -mriscv-isa-version = <ISA-string>
> > > The syntax of <ISA-string> is same as -march option, but without rv32 or rv64
> > > prefix.  There are two reasons that you may need this option,
> > >
> > > 1. Some versions of extensions defined in the ISA spec are not matched to the
> > > toolchain’s implementation.  For example, V-ext is defined to version 0.7 in
> > > ISA spec, but we only have implementations for 0.8 and 0.9.  Therefore, you
> > > have to use this option to choose the correct version for V-ext.
> > >
> > > 2. You want to update the version for the specific standard extensions if the
> > > version are not set in the ELF arch attributes and -march option.
> >
> > I don't buy the argument for this.  The V extension stuff isn't relevant: those
> > are all draft versions, and this is a perfect reason why we don't want to take
> > drafts upstream.   When we have a defined V ISA it'll be part of a versioned
> > RISC-V specification and any users that want it can just use at least that ISA
> > spec.
>
> I think I got your point, we all have reached consensus that it's
> better not to take draft spec upstream.  The v-extension might be a
> little different, the latest released ISA spec defines the v-ext as
> 0.7, even if the released riscv-v-spec is up to 0.8.  According to our
> consensus, we should accept the 0.8 and 0.9 v-ext on upstream until we
> have a released ISA spec defining them.  Otherwise, we can just accept
> the 0.7 v-ext for now.  I guess that is why we just have v-ext 0.8 and
> 0.9 on riscv/riscv-binutils-gdb rather than upstream.  This makes
> sense, thank you :)

Correct the information.  The version of extensions before 2.0 should
be draft, not release.

> And we can still use -march to choose the version we want, including
> v-ext.  If users use the rvv-0.9.x in riscv/riscv-binutils-gdb, they
> have to set the v-ext with version 0.9 by -march.  Otherwise, we will
> give them v0p0 if they only set -misa-spec=20191213.

Give them v0p0, or we should give an error to make sure the valid
version is set by march.  The latter seems more safe.  We give 0p0
when the user sets x extension without version.

Thanks
Nelson

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version.
  2020-04-18 11:07 ` [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version Nelson Chu
  2020-04-18 11:18   ` Nelson Chu
@ 2020-04-24 10:21   ` Andrew Burgess
  2020-04-27  1:35     ` Nelson Chu
  1 sibling, 1 reply; 25+ messages in thread
From: Andrew Burgess @ 2020-04-24 10:21 UTC (permalink / raw)
  To: Nelson Chu
  Cc: binutils, gdb-patches, andrew, asb, kito.cheng, maxim.blinov, jimw

The gdb/* parts of this patch are approved.  I can't approve anything
else.

Thanks,
Andrew


* Nelson Chu <nelson.chu@sifive.com> [2020-04-18 04:07:52 -0700]:

> Support new gas option -mpriv-spec and configure option --with-priv-spec. You
> can use these options to choose the privilege spec version, and then assembler
> will generates the correct CSR address.  If the obselete CSR name is used, then
> report the warning message when the -mcsr-check is set, and use the latest
> defined address for the CSR (Since we build hash table by the DECLARE_CSR first,
> and then use the DECLARE_CSR_ALIAS).  Maybe we can insert the CSR hash entries
> in version's order, then we probably don't need the DECLARE_CSR_ALIAS any more.
> 
> New Assembler Options,
> 
> * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
> This is used to set the privileged spec’s version, and we can decide whether
> the CSR is valid or not.
> 
> New Default Configure Options,
> 
> * --with-priv-spec = [1p9|1p9p1|1p10|1p11]
> The syntax is same as -mpriv-spec option.  Assembler will check this setting
> if -mpriv-spec option isn’t set.
> 
> 	gas/
> 	* config/tc-riscv.c (DEFAULT_PRIV_SPEC): Default configure option.
> 	You can set it by new configure option --with-priv-spec.
> 	(enum riscv_csr_vclass default_priv_spec): You can set gas option
> 	-mpriv-spec or --with-priv-spec, and then assembler will call
> 	riscv_set_default_priv_version to set the default_priv_spec.
> 	(riscv_set_default_priv_version): New function.  Set the
> 	default_priv_spec.  Return 0 if the input privilege name isn't
> 	supported.  Otherwise, return 1.
> 
> 	(struct riscv_csr_extra): Add new fields to store more information about
> 	the CSR.  We use these information to find the suitable CSR address when
> 	user choosing a specific privilege version.
> 	(enum reg_class): We now get the CSR address from csr_extra_hash rather
> 	than reg_names_hash.  Therefore, move RCLASS_CSR behind RCLASS_MAX.
> 	(riscv_init_csr_hashes): Only need to initialize one hash table
> 	csr_extra_hash.
> 	(riscv_csr_class_check): Change the return type to void.  Don't check
> 	the ISA dependency if -mcsr-check isn't set.
> 	(riscv_csr_version_check): New function.  Check and find the CSR address
> 	from csr_extra_hash, according to default_priv_spec.  Report warning
> 	for the invalid CSR if -mcsr-check is set.
> 	(reg_csr_lookup_internal): Updated.
> 	(reg_lookup_internal): Likewise.
> 	(md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
> 
> 	(enum options, struct option md_longopts): Add new gas option -mpriv-spec.
> 	(md_parse_option): Call riscv_set_default_priv_version to set
> 	default_priv_spec.
> 	(riscv_after_parse_args): If -mpriv-spec isn't set, then call
> 	riscv_set_default_priv_version with DEFAULT_PRIV_SPEC to set the default
> 	privilege verison.
> 
> 	* testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
> 	to check the ISA dependency for CSR, so fix the version by adding
> 	-mpriv-spec=1p11.
> 	* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.  There are some
> 	version warnings for the test case.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
> 	Check whether the CSR is valid when privilege version 1.9 is choosed.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
> 	Check whether the CSR is valid when privilege version 1.9.1 is choosed.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
> 	Check whether the CSR is valid when privilege version 1.10 is choosed.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
> 	Check whether the CSR is valid when privilege version 1.11 is choosed.
> 	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
> 
> 	* configure.ac: Add new configure option --with-priv-spec.
> 	* configure: Regenerated.
> 	* config.in: Regenerated.
> 
> 	include/
> 	* opcode/riscv-opc.h (DECLARE_CSR): Store two version information,
> 	define_version and abort_version for the CSR, which is valid in the
> 	current privilege spec.  The define_version means which privilege spec
> 	started to define the CSR, and the abort_version means which privilege
> 	spec started to abort the CSR.  If the CSR is valid for the newest spec,
> 	then the abort_version is set to CSR_CLASS_VDRAFT.
> 	(DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
> 	* opcode/riscv.h: Include "bfd.h" to define bfd_boolean type.
> 	(enum riscv_csr_vclass): New enum classes.  Define the current supported
> 	privilege versions.
> 
> 	opcodes/
> 	* riscv-opc.c (struct priv_version_t): New structure.
> 	(struct priv_version_t priv_versions): Store the supported privilege
> 	versions' classes and their corresponding version string.
> 	(riscv_get_priv_version_class): New function.  Get the corresponding
> 	CSR version class by giving a privilege version string.
> 	(riscv_get_priv_version_name): New function.  Get the corresponding
> 	privilege version string by giving a CSR version class.
> 
> 	* riscv-dis.c: Updated since DECLARE_CSR is changed.
> 
> 	gdb/
> 	* riscv-tdep.c: Updated since DECLARE_CSR is changed.
> 	* riscv-tdep.h: Likewise.
> 
> 	binutils/
> 	* dwarf.c: Updated since DECLARE_CSR is changed.
> ---
>  binutils/dwarf.c                                   |   3 +-
>  gas/config.in                                      |   3 +
>  gas/config/tc-riscv.c                              | 213 +++++++--
>  gas/configure                                      |  13 +
>  gas/configure.ac                                   |   8 +
>  gas/testsuite/gas/riscv/priv-reg-fail-fext.d       |   2 +-
>  gas/testsuite/gas/riscv/priv-reg-fail-fext.l       |  25 +
>  .../gas/riscv/priv-reg-fail-read-only-01.d         |   2 +-
>  .../gas/riscv/priv-reg-fail-read-only-01.l         |  25 +
>  gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d  |   2 +-
>  gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l  |  25 +
>  .../gas/riscv/priv-reg-fail-version-1p10.d         |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p10.l         |  27 ++
>  .../gas/riscv/priv-reg-fail-version-1p11.d         |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p11.l         |  25 +
>  .../gas/riscv/priv-reg-fail-version-1p9.d          |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p9.l          |  30 ++
>  .../gas/riscv/priv-reg-fail-version-1p9p1.d        |   3 +
>  .../gas/riscv/priv-reg-fail-version-1p9p1.l        |  30 ++
>  gdb/riscv-tdep.c                                   |   6 +-
>  gdb/riscv-tdep.h                                   |   2 +-
>  include/opcode/riscv-opc.h                         | 509 ++++++++++-----------
>  include/opcode/riscv.h                             |  19 +
>  opcodes/riscv-dis.c                                |   3 +-
>  opcodes/riscv-opc.c                                |  55 +++
>  25 files changed, 728 insertions(+), 311 deletions(-)
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
>  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> 
> diff --git a/binutils/dwarf.c b/binutils/dwarf.c
> index c75059b..a972c60 100644
> --- a/binutils/dwarf.c
> +++ b/binutils/dwarf.c
> @@ -7378,7 +7378,8 @@ regname_internal_riscv (unsigned int regno)
>  	 document.  */
>        switch (regno)
>  	{
> -#define DECLARE_CSR(NAME,VALUE,CLASS) case VALUE + 4096: name = #NAME; break;
> +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
> +  case VALUE + 4096: name = #NAME; break;
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>  
> diff --git a/gas/config.in b/gas/config.in
> index 935bd9b..093f474 100644
> --- a/gas/config.in
> +++ b/gas/config.in
> @@ -59,6 +59,9 @@
>  /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
>  #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
>  
> +/* Define default value for -mpriv-spec */
> +#undef DEFAULT_PRIV_SPEC
> +
>  /* Define to 1 if you want to generate RISC-V arch attribute by default. */
>  #undef DEFAULT_RISCV_ATTR
>  
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index bfcf2f0..6528a03 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -75,10 +75,15 @@ struct riscv_cl_insn
>  #define DEFAULT_RISCV_ISA_VERSION NULL
>  #endif
>  
> +#ifndef DEFAULT_PRIV_SPEC
> +#define DEFAULT_PRIV_SPEC "1p11"
> +#endif
> +
>  static const char default_arch[] = DEFAULT_ARCH;
>  static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
>  static const char *default_isa_spec = DEFAULT_ISA_SPEC;
>  static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
> +static enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
>  
>  static unsigned xlen = 0; /* width of an x-register */
>  static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
> @@ -536,8 +541,9 @@ enum reg_class
>  {
>    RCLASS_GPR,
>    RCLASS_FPR,
> -  RCLASS_CSR,
> -  RCLASS_MAX
> +  RCLASS_MAX,
> +
> +  RCLASS_CSR
>  };
>  
>  static struct hash_control *reg_names_hash = NULL;
> @@ -585,84 +591,197 @@ struct riscv_csr_extra
>    /* Class to which this CSR belongs.  Used to decide whether or
>       not this CSR is legal in the current -march context.  */
>    enum riscv_csr_class csr_class;
> +
> +  /* CSR may have differnet numbers in the previous priv spec.  */
> +  unsigned address;
> +
> +  /* Record the CSR is defined/valid in which versions.  */
> +  enum riscv_csr_vclass define_version;
> +
> +  /* Record the CSR is aborted/invalid from which versions.  If it isn't
> +     aborted in the current version, then it should be CSR_CLASS_VDRAFT.  */
> +  enum riscv_csr_vclass abort_version;
> +
> +  /* The CSR may have more than one setting.  */
> +  struct riscv_csr_extra *next;
>  };
>  
> -/* Init two hashes, csr_extra_hash and reg_names_hash, for CSR.  */
> +/* Set the default_priv_spec, assembler will find the suitable CSR address
> +   according to default_priv_spec.  Return 0 if the input priv name isn't
> +   supported.  Otherwise, return 1.  */
>  
> -static void
> -riscv_init_csr_hashes (const char *name,
> -		       unsigned address,
> -		       enum riscv_csr_class class)
> +static int
> +riscv_set_default_priv_version (const char *s)
>  {
> -  struct riscv_csr_extra *entry = XNEW (struct riscv_csr_extra);
> -  entry->csr_class = class;
> +  enum riscv_csr_vclass class;
> +  if (!riscv_get_priv_version_class (s, &class))
> +    {
> +      as_bad (_("Unsupported RISC-V privilege version set by "
> +		"-mpriv-spec=%s."), s);
> +      return 0;
> +    }
> +  else
> +    default_priv_spec = class;
> +  return 1;
> +}
> +
> +/* Init hash table csr_extra_hash to handle CSR.  */
>  
> -  const char *hash_error =
> -    hash_insert (csr_extra_hash, name, (void *) entry);
> -  if (hash_error != NULL)
> +static void
> +riscv_init_csr_hash (const char *name,
> +		     unsigned address,
> +		     enum riscv_csr_class class,
> +		     enum riscv_csr_vclass define_version,
> +		     enum riscv_csr_vclass abort_version)
> +{
> +  struct riscv_csr_extra *entry, *pre_entry;
> +  const char *hash_error = NULL;
> +  bfd_boolean need_enrty = TRUE;
> +
> +  pre_entry = NULL;
> +  entry = (struct riscv_csr_extra *) hash_find (csr_extra_hash, name);
> +  while (need_enrty && entry != NULL)
>      {
> -      fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> -		      name, hash_error);
> -      /* Probably a memory allocation problem?  Give up now.  */
> -	as_fatal (_("Broken assembler.  No assembly attempted."));
> +      if (entry->csr_class == class
> +	  && entry->address == address
> +	  && entry->define_version == define_version
> +	  && entry->abort_version == abort_version)
> +	need_enrty = FALSE;
> +      pre_entry = entry;
> +      entry = entry->next;
>      }
>  
> -  hash_reg_name (RCLASS_CSR, name, address);
> +  /* Duplicate setting for the CSR, just return and do nothing.  */
> +  if (!need_enrty)
> +    return;
> +
> +  entry = XNEW (struct riscv_csr_extra);
> +  entry->csr_class = class;
> +  entry->address = address;
> +  entry->define_version = define_version;
> +  entry->abort_version = abort_version;
> +
> +  /* If the CSR hasn't been inserted in the hash table, then insert it.
> +     Otherwise, attach the extra information to the entry which is already
> +     in the hash table.  */
> +  if (pre_entry == NULL)
> +    {
> +      hash_error = hash_insert (csr_extra_hash, name, (void *) entry);
> +      if (hash_error != NULL)
> +	{
> +	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> +		   name, hash_error);
> +	  /* Probably a memory allocation problem?  Give up now.  */
> +	  as_fatal (_("Broken assembler.  No assembly attempted."));
> +	}
> +    }
> +  else
> +    pre_entry->next = entry;
>  }
>  
>  /* Check wether the CSR is valid according to the ISA.  */
>  
> -static bfd_boolean
> -riscv_csr_class_check (enum riscv_csr_class csr_class)
> +static void
> +riscv_csr_class_check (const char *s,
> +		       enum riscv_csr_class csr_class)
>  {
> +  bfd_boolean result = TRUE;
> +
> +  /* Don't check the ISA dependency when -mcsr-check isn't set.  */
> +  if (!riscv_opts.csr_check)
> +    return;
> +
>    switch (csr_class)
>      {
> -    case CSR_CLASS_I: return riscv_subset_supports ("i");
> -    case CSR_CLASS_F: return riscv_subset_supports ("f");
> +    case CSR_CLASS_I:
> +      result = riscv_subset_supports ("i");
> +      break;
> +    case CSR_CLASS_F:
> +      result = riscv_subset_supports ("f");
> +      break;
>      case CSR_CLASS_I_32:
> -      return (xlen == 32 && riscv_subset_supports ("i"));
> -
> +      result = (xlen == 32 && riscv_subset_supports ("i"));
> +      break;
>      default:
> -      return FALSE;
> +      as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
>      }
> +  if (!result)
> +    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
>  }
>  
> -/* If the CSR is defined, then we call `riscv_csr_class_check` to do the
> -   further checking.  Return FALSE if the CSR is not defined.  Otherwise,
> -   return TRUE.  */
> +/* Check and find the CSR address according to the privilege spec version.  */
>  
> -static bfd_boolean
> +static void
> +riscv_csr_version_check (const char *csr_name,
> +			 struct riscv_csr_extra **entryP)
> +{
> +  struct riscv_csr_extra *entry = *entryP;
> +  while (entry != NULL)
> +    {
> +      if (default_priv_spec >= entry->define_version
> +	  && default_priv_spec < entry->abort_version)
> +	{
> +	  /* Find the suitable CSR according to the specific version.  */
> +	  *entryP = entry;
> +	  return;
> +	}
> +      entry = entry->next;
> +    }
> +
> +  /* We can not find the suitable CSR address according to the privilege
> +     version.  Therefore, we use the last defined value.  Report the warning
> +     only when the -mcsr-check is set.  Enable the -mcsr-check is recommended,
> +     otherwise, you may get the unexpected CSR address.  */
> +  if (riscv_opts.csr_check)
> +    {
> +      const char *priv_name = riscv_get_priv_version_name (default_priv_spec);
> +      if (priv_name != NULL)
> +	as_warn (_("Invalid CSR `%s' for the privilege version `%s'"),
> +		 csr_name, priv_name);
> +    }
> +}
> +
> +/* Once the CSR is defined, including the old privilege spec, then we call
> +   riscv_csr_class_check and riscv_csr_version_check to do the further
> +   checking and get the corresponding address.  Return -1 if the CSR is never
> +   been defined.  Otherwise, return the address.  */
> +
> +static unsigned int
>  reg_csr_lookup_internal (const char *s)
>  {
>    struct riscv_csr_extra *r =
>      (struct riscv_csr_extra *) hash_find (csr_extra_hash, s);
>  
>    if (r == NULL)
> -    return FALSE;
> +    return -1;
>  
> -  /* We just report the warning when the CSR is invalid.  */
> -  if (!riscv_csr_class_check (r->csr_class))
> -    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
> +  /* We just report the warning when the CSR is invalid.  "Invalid CSR" means
> +     the CSR was defined, but isn't allowed for the current ISA setting or
> +     the privilege version.  If the CSR is never been defined, then assembler
> +     will regard it as a "Unknown CSR" and report error.  If user use number
> +     to set the CSR, but over the range (> 0xfff), then assembler will report
> +     "Improper CSR" error for it.  */
> +  riscv_csr_class_check (s, r->csr_class);
> +  riscv_csr_version_check (s, &r);
>  
> -  return TRUE;
> +  return r->address;
>  }
>  
>  static unsigned int
>  reg_lookup_internal (const char *s, enum reg_class class)
>  {
> -  void *r = hash_find (reg_names_hash, s);
> +  void *r;
> +
> +  if (class == RCLASS_CSR)
> +    return reg_csr_lookup_internal (s);
>  
> +  r = hash_find (reg_names_hash, s);
>    if (r == NULL || DECODE_REG_CLASS (r) != class)
>      return -1;
>  
>    if (riscv_opts.rve && class == RCLASS_GPR && DECODE_REG_NUM (r) > 15)
>      return -1;
>  
> -  if (class == RCLASS_CSR
> -      && riscv_opts.csr_check
> -      && !reg_csr_lookup_internal (s))
> -    return -1;
> -
>    return DECODE_REG_NUM (r);
>  }
>  
> @@ -946,8 +1065,10 @@ md_begin (void)
>  
>    /* Create and insert CSR hash tables.  */
>    csr_extra_hash = hash_new ();
> -#define DECLARE_CSR(name, num, class) riscv_init_csr_hashes (#name, num, class);
> -#define DECLARE_CSR_ALIAS(name, num, class) DECLARE_CSR(name, num, class);
> +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> +  riscv_init_csr_hash (#name, num, class, define_version, abort_version);
> +#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
> +  DECLARE_CSR(name, num, class, define_version, abort_version);
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>  
> @@ -2434,6 +2555,7 @@ enum options
>    OPTION_NO_CSR_CHECK,
>    OPTION_MISA_SPEC,
>    OPTION_MRISCV_ISA_VERSION,
> +  OPTION_MPRIV_SPEC,
>    OPTION_END_OF_ENUM
>  };
>  
> @@ -2452,6 +2574,7 @@ struct option md_longopts[] =
>    {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
>    {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
>    {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
> +  {"mpriv-spec", required_argument, NULL, OPTION_MPRIV_SPEC},
>  
>    {NULL, no_argument, NULL, 0}
>  };
> @@ -2548,6 +2671,9 @@ md_parse_option (int c, const char *arg)
>        default_riscv_isa_version = arg;
>        break;
>  
> +    case OPTION_MPRIV_SPEC:
> +      return riscv_set_default_priv_version (arg);
> +
>      default:
>        return 0;
>      }
> @@ -2594,6 +2720,11 @@ riscv_after_parse_args (void)
>    if (riscv_subset_supports ("e"))
>      riscv_set_rve (TRUE);
>  
> +  /* If the -mpriv-spec isn't set, then we set the default privilege version
> +     according to DEFAULT_PRIV_SPEC,  */
> +  if (default_priv_spec == CSR_CLASS_VNONE)
> +    riscv_set_default_priv_version (DEFAULT_PRIV_SPEC);
> +
>    /* Infer ABI from ISA if not specified on command line.  */
>    if (abi_xlen == 0)
>      abi_xlen = xlen;
> diff --git a/gas/configure b/gas/configure
> index bce847a..0911152 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -13068,6 +13068,19 @@ _ACEOF
>  	fi
>  	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
>  $as_echo "$with_riscv_isa_version" >&6; }
> +
> +	 # --with-priv-spec=[1p9p1|1p10|1p11].
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-priv-spec" >&5
> +$as_echo_n "checking for default configuration of --with-priv-spec... " >&6; }
> +	if test "x${with_priv_spec}" != x; then
> +
> +cat >>confdefs.h <<_ACEOF
> +#define DEFAULT_PRIV_SPEC "$with_priv_spec"
> +_ACEOF
> +
> +	fi
> +	{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_priv_spec" >&5
> +$as_echo "$with_priv_spec" >&6; }
>  	;;
>  
>        rl78)
> diff --git a/gas/configure.ac b/gas/configure.ac
> index be4ba20..c3d3639 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -606,6 +606,14 @@ changequote([,])dnl
>  			      covered by --with-isa-spec])
>  	fi
>  	AC_MSG_RESULT($with_riscv_isa_version)
> +
> +	 # --with-priv-spec=[1p9p1|1p10|1p11].
> +	AC_MSG_CHECKING(for default configuration of --with-priv-spec)
> +	if test "x${with_priv_spec}" != x; then
> +	  AC_DEFINE_UNQUOTED(DEFAULT_PRIV_SPEC, "$with_priv_spec",
> +			     [Define default value for -mpriv-spec])
> +	fi
> +	AC_MSG_RESULT($with_priv_spec)
>  	;;
>  
>        rl78)
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> index da53566..0033e3c 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> @@ -1,3 +1,3 @@
> -#as: -march=rv32i -mcsr-check
> +#as: -march=rv32i -mcsr-check -mpriv-spec=1p11
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-fext.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> index 76818c8..d3b1bad 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> @@ -2,3 +2,28 @@
>  .*Warning: Invalid CSR `fflags' for the current ISA
>  .*Warning: Invalid CSR `frm' for the current ISA
>  .*Warning: Invalid CSR `fcsr' for the current ISA
> +
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> index ae190c0..bbf83b5 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> @@ -1,3 +1,3 @@
> -#as: -march=rv32if -mcsr-check
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
>  #source: priv-reg-fail-read-only-01.s
>  #warning_output: priv-reg-fail-read-only-01.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> index 7e52bd7..e8355f1 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> @@ -67,3 +67,28 @@
>  .*Warning: Read-only CSR is written `csrw marchid,a1'
>  .*Warning: Read-only CSR is written `csrw mimpid,a1'
>  .*Warning: Read-only CSR is written `csrw mhartid,a1'
> +
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> index d71b261..a0b88cf 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> @@ -1,3 +1,3 @@
> -#as: -march=rv64if -mcsr-check
> +#as: -march=rv64if -mcsr-check -mpriv-spec=1p11
>  #source: priv-reg.s
>  #warning_output: priv-reg-fail-rv32-only.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> index fa5a1b4..5e96a85 100644
> --- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> @@ -64,3 +64,28 @@
>  .*Warning: Invalid CSR `mhpmcounter29h' for the current ISA
>  .*Warning: Invalid CSR `mhpmcounter30h' for the current ISA
>  .*Warning: Invalid CSR `mhpmcounter31h' for the current ISA
> +
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> new file mode 100644
> index 0000000..d7a788a
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p10
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p10.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> new file mode 100644
> index 0000000..f532962
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> @@ -0,0 +1,27 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p10'
> +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p10'
> +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p10'
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p10'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p10'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p10'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p10'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> new file mode 100644
> index 0000000..2830c83
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p11.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> new file mode 100644
> index 0000000..252f96a
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> @@ -0,0 +1,25 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> new file mode 100644
> index 0000000..70c405f
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p9.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> new file mode 100644
> index 0000000..92e1463
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> @@ -0,0 +1,30 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `utval' for the privilege version `1p9'
> +.*Warning: Invalid CSR `scounteren' for the privilege version `1p9'
> +.*Warning: Invalid CSR `stval' for the privilege version `1p9'
> +.*Warning: Invalid CSR `satp' for the privilege version `1p9'
> +.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9'
> +.*Warning: Invalid CSR `mtval' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9'
> +.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9'
> +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9'
> +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9'
> +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9'
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> new file mode 100644
> index 0000000..2bd4bbf
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> @@ -0,0 +1,3 @@
> +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1
> +#source: priv-reg.s
> +#warning_output: priv-reg-fail-version-1p9p1.l
> diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> new file mode 100644
> index 0000000..6cde0b3
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> @@ -0,0 +1,30 @@
> +.*Assembler messages:
> +.*Warning: Invalid CSR `utval' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `scounteren' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `stval' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `satp' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `mtval' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9p1'
> +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9p1'
> diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
> index 1bb824e..e67f661 100644
> --- a/gdb/riscv-tdep.c
> +++ b/gdb/riscv-tdep.c
> @@ -240,7 +240,7 @@ static struct riscv_register_feature riscv_csr_feature =
>  {
>   "org.gnu.gdb.riscv.csr",
>   {
> -#define DECLARE_CSR(NAME,VALUE,CLASS) \
> +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
>    { RISCV_ ## VALUE ## _REGNUM, { # NAME }, false },
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
> @@ -498,7 +498,7 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum)
>  
>    if (regnum >= RISCV_FIRST_CSR_REGNUM && regnum <= RISCV_LAST_CSR_REGNUM)
>      {
> -#define DECLARE_CSR(NAME,VALUE,CLASS) \
> +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
>        case RISCV_ ## VALUE ## _REGNUM: return # NAME;
>  
>        switch (regnum)
> @@ -828,7 +828,7 @@ riscv_is_regnum_a_named_csr (int regnum)
>  
>    switch (regnum)
>      {
> -#define DECLARE_CSR(name, num, class) case RISCV_ ## num ## _REGNUM:
> +#define DECLARE_CSR(name, num, class, define_ver, abort_ver) case RISCV_ ## num ## _REGNUM:
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>        return true;
> diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
> index 90bae08..e415fb4 100644
> --- a/gdb/riscv-tdep.h
> +++ b/gdb/riscv-tdep.h
> @@ -44,7 +44,7 @@ enum
>    RISCV_LAST_FP_REGNUM = 64,	/* Last Floating Point Register */
>  
>    RISCV_FIRST_CSR_REGNUM = 65,  /* First CSR */
> -#define DECLARE_CSR(name, num, class) \
> +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
>    RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num,
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index fe00bb6..ab11c31 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -656,7 +656,6 @@
>  #define CSR_SIDELEG 0x103
>  #define CSR_SIE 0x104
>  #define CSR_STVEC 0x105
> -/* scounteren is present int priv spec 1.10.  */
>  #define CSR_SCOUNTEREN 0x106
>  #define CSR_SSCRATCH 0x140
>  #define CSR_SEPC 0x141
> @@ -669,20 +668,17 @@
>  #define CSR_MIMPID 0xf13
>  #define CSR_MHARTID 0xf14
>  #define CSR_MSTATUS 0x300
> -/* misa is 0xf10 in 1.9, but 0x301 in 1.9.1.  */
>  #define CSR_MISA 0x301
>  #define CSR_MEDELEG 0x302
>  #define CSR_MIDELEG 0x303
>  #define CSR_MIE 0x304
>  #define CSR_MTVEC 0x305
> -/* mcounteren is present in priv spec 1.10.  */
>  #define CSR_MCOUNTEREN 0x306
>  #define CSR_MSCRATCH 0x340
>  #define CSR_MEPC 0x341
>  #define CSR_MCAUSE 0x342
>  #define CSR_MTVAL 0x343
>  #define CSR_MIP 0x344
> -/* pmpcfg0 to pmpcfg3, pmpaddr0 to pmpaddr15 are present in priv spec 1.10.  */
>  #define CSR_PMPCFG0 0x3a0
>  #define CSR_PMPCFG1 0x3a1
>  #define CSR_PMPCFG2 0x3a2
> @@ -765,7 +761,6 @@
>  #define CSR_MHPMCOUNTER29H 0xb9d
>  #define CSR_MHPMCOUNTER30H 0xb9e
>  #define CSR_MHPMCOUNTER31H 0xb9f
> -/* mcountinhibit is present in priv spec 1.11.  */
>  #define CSR_MCOUNTINHIBIT 0x320
>  #define CSR_MHPMEVENT3 0x323
>  #define CSR_MHPMEVENT4 0x324
> @@ -802,10 +797,8 @@
>  #define CSR_TDATA3 0x7a3
>  #define CSR_DCSR 0x7b0
>  #define CSR_DPC 0x7b1
> -/* dscratch0 and dscratch1 are present in priv spec 1.11.  */
>  #define CSR_DSCRATCH0 0x7b2
>  #define CSR_DSCRATCH1 0x7b3
> -/* These registers are present in priv spec 1.9.1, but are dropped in 1.10.  */
>  #define CSR_HSTATUS 0x200
>  #define CSR_HEDELEG 0x202
>  #define CSR_HIDELEG 0x203
> @@ -1124,262 +1117,256 @@ DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
>  DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
>  #endif
>  #ifdef DECLARE_CSR
> -DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I)
> -DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I)
> -DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I)
> -DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I)
> -DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I)
> -DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I)
> -DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F)
> -DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F)
> -DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F)
> -DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I)
> -DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I)
> -DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I)
> -DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I)
> -DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32)
> -DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32)
> -DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32)
> -DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32)
> -DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I)
> -DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I)
> -DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I)
> -DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I)
> -DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I)
> -DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I)
> -DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I)
> -DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I)
> -DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I)
> -DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I)
> -DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I)
> -DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I)
> -DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I)
> -DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I)
> -DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I)
> -DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I)
> -DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I)
> -DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I)
> -DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I)
> -DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I)
> -DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I)
> -DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I)
> -DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I)
> -DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I)
> -DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I)
> -DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32)
> -DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I)
> -DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32)
> -DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I)
> -DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I)
> -DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I)
> -DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I)
> -DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I)
> -DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32)
> -DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32)
> -DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32)
> -DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I)
> -DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I)
> -DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I)
> -DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I)
> -DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I)
> -DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I)
> -DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I)
> -DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I)
> -DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I)
> -DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I)
> -/* These registers are present in priv spec 1.9.1, dropped in 1.10.  */
> -DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I)
> -DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I)
> -DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I)
> -DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I)
> -DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I)
> -DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I)
> -DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I)
> -DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I)
> -DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I)
> -DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I)
> -DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I)
> -DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I)
> -DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I)
> -DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I)
> -DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I)
> -DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I)
> -DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I)
> -DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I)
> +DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I, CSR_CLASS_V1P9P1, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> +DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
>  #endif
>  #ifdef DECLARE_CSR_ALIAS
> -/* Ubadaddr is 0x043 in 1.9.1, but 0x043 is utval in 1.10.  */
> -DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I)
> -/* Sbadaddr is 0x143 in 1.9.1, but 0x143 is stval in 1.10.  */
> -DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I)
> -/* Sptbr is 0x180 in 1.9.1, but 0x180 is satp in 1.10.  */
> -DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I)
> -/* Mbadaddr is 0x343 in 1.9.1, but 0x343 is mtval in 1.10.  */
> -DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I)
> -/* Mucounteren is 0x320 in 1.10, but 0x320 is mcountinhibit in 1.11.  */
> -DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
> -/* Dscratch is 0x7b2 in 1.10, but 0x7b2 is dscratch0 in 1.11.  */
> -DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I)
> +DECLARE_CSR_ALIAS(misa, 0xf10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P9P1)
> +DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> +DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P11)
>  #endif
>  #ifdef DECLARE_CAUSE
>  DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index f8b0de3..c36bf69 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -24,6 +24,7 @@
>  #include "riscv-opc.h"
>  #include <stdlib.h>
>  #include <stdint.h>
> +#include "bfd.h"
>  
>  typedef uint64_t insn_t;
>  
> @@ -353,6 +354,19 @@ struct riscv_ext_version
>    unsigned int minor_version;
>  };
>  
> +/* The current supported privilege versions.  */
> +
> +enum riscv_csr_vclass
> +{
> +  CSR_CLASS_VNONE,	/* Default value */
> +
> +  CSR_CLASS_V1P9,       /* v1.9 */
> +  CSR_CLASS_V1P9P1,     /* v1.9.1 */
> +  CSR_CLASS_V1P10,      /* v1.10 */
> +  CSR_CLASS_V1P11,      /* v1.11 */
> +  CSR_CLASS_VDRAFT
> +};
> +
>  /* Instruction is a simple alias (e.g. "mv" for "addi").  */
>  #define	INSN_ALIAS		0x00000001
>  
> @@ -432,4 +446,9 @@ extern const struct riscv_opcode riscv_opcodes[];
>  extern const struct riscv_opcode riscv_insn_types[];
>  extern const struct riscv_ext_version riscv_ext_version_table[];
>  
> +extern bfd_boolean
> +riscv_get_priv_version_class (const char *, enum riscv_csr_vclass *);
> +extern const char *
> +riscv_get_priv_version_name (enum riscv_csr_vclass);
> +
>  #endif /* _RISCV_H_ */
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index d7a184c..98302ff 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -326,7 +326,8 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
>  	    unsigned int csr = EXTRACT_OPERAND (CSR, l);
>  	    switch (csr)
>  	      {
> -#define DECLARE_CSR(name, num, class) case num: csr_name = #name; break;
> +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> +  case num: csr_name = #name; break;
>  #include "opcode/riscv-opc.h"
>  #undef DECLARE_CSR
>  	      }
> diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> index 7b885bf..cfefd8e 100644
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -937,3 +937,58 @@ const struct riscv_ext_version riscv_ext_version_table[] =
>  /* Terminate the list.  */
>  {NULL, NULL, 0, 0}
>  };
> +
> +struct priv_version_t
> +{
> +  const char *name;
> +  enum riscv_csr_vclass vclass;
> +};
> +
> +/* List for all supported CSR versions.  */
> +static const struct priv_version_t priv_versions[] =
> +{
> +  {"1p9", CSR_CLASS_V1P9},
> +  {"1p9p1", CSR_CLASS_V1P9P1},
> +  {"1p10", CSR_CLASS_V1P10},
> +  {"1p11", CSR_CLASS_V1P11},
> +
> +/* Terminate the list.  */
> +  {NULL, 0}
> +};
> +
> +/* Get the corresponding CSR version class by giving a privilege
> +   version string.  */
> +
> +bfd_boolean
> +riscv_get_priv_version_class (const char *s,
> +			      enum riscv_csr_vclass *class)
> +{
> +  const struct priv_version_t *version;
> +
> +  if (s == NULL)
> +    return FALSE;
> +
> +  for (version = &priv_versions[0]; version->name != NULL; ++version)
> +    if (strcmp (version->name, s) == 0)
> +      {
> +	*class = version->vclass;
> +	return TRUE;
> +      }
> +
> +  /* Can not find the supported privilege version.  */
> +  return FALSE;
> +}
> +
> +/* Get the corresponding privilege version string by giving a CSR
> +   version class.  */
> +
> +const char *
> +riscv_get_priv_version_name (enum riscv_csr_vclass class)
> +{
> +  const struct priv_version_t *version;
> +  for (version = &priv_versions[0]; version->name != NULL; ++version)
> +    if (class == version->vclass)
> +      return version->name;
> +  /* This shouldn't happen.  */
> +  return NULL;
> +}
> -- 
> 2.7.4
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version.
  2020-04-24 10:21   ` Andrew Burgess
@ 2020-04-27  1:35     ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-04-27  1:35 UTC (permalink / raw)
  To: Andrew Burgess
  Cc: Binutils, gdb-patches, Andrew Waterman, asb, Kito Cheng,
	Maxim Blinov, Jim Wilson

Thanks Andrew :)
Appreciate your help.

Nelson

On Fri, Apr 24, 2020 at 6:21 PM Andrew Burgess
<andrew.burgess@embecosm.com> wrote:
>
> The gdb/* parts of this patch are approved.  I can't approve anything
> else.
>
> Thanks,
> Andrew
>
>
> * Nelson Chu <nelson.chu@sifive.com> [2020-04-18 04:07:52 -0700]:
>
> > Support new gas option -mpriv-spec and configure option --with-priv-spec. You
> > can use these options to choose the privilege spec version, and then assembler
> > will generates the correct CSR address.  If the obselete CSR name is used, then
> > report the warning message when the -mcsr-check is set, and use the latest
> > defined address for the CSR (Since we build hash table by the DECLARE_CSR first,
> > and then use the DECLARE_CSR_ALIAS).  Maybe we can insert the CSR hash entries
> > in version's order, then we probably don't need the DECLARE_CSR_ALIAS any more.
> >
> > New Assembler Options,
> >
> > * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
> > This is used to set the privileged spec’s version, and we can decide whether
> > the CSR is valid or not.
> >
> > New Default Configure Options,
> >
> > * --with-priv-spec = [1p9|1p9p1|1p10|1p11]
> > The syntax is same as -mpriv-spec option.  Assembler will check this setting
> > if -mpriv-spec option isn’t set.
> >
> >       gas/
> >       * config/tc-riscv.c (DEFAULT_PRIV_SPEC): Default configure option.
> >       You can set it by new configure option --with-priv-spec.
> >       (enum riscv_csr_vclass default_priv_spec): You can set gas option
> >       -mpriv-spec or --with-priv-spec, and then assembler will call
> >       riscv_set_default_priv_version to set the default_priv_spec.
> >       (riscv_set_default_priv_version): New function.  Set the
> >       default_priv_spec.  Return 0 if the input privilege name isn't
> >       supported.  Otherwise, return 1.
> >
> >       (struct riscv_csr_extra): Add new fields to store more information about
> >       the CSR.  We use these information to find the suitable CSR address when
> >       user choosing a specific privilege version.
> >       (enum reg_class): We now get the CSR address from csr_extra_hash rather
> >       than reg_names_hash.  Therefore, move RCLASS_CSR behind RCLASS_MAX.
> >       (riscv_init_csr_hashes): Only need to initialize one hash table
> >       csr_extra_hash.
> >       (riscv_csr_class_check): Change the return type to void.  Don't check
> >       the ISA dependency if -mcsr-check isn't set.
> >       (riscv_csr_version_check): New function.  Check and find the CSR address
> >       from csr_extra_hash, according to default_priv_spec.  Report warning
> >       for the invalid CSR if -mcsr-check is set.
> >       (reg_csr_lookup_internal): Updated.
> >       (reg_lookup_internal): Likewise.
> >       (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
> >
> >       (enum options, struct option md_longopts): Add new gas option -mpriv-spec.
> >       (md_parse_option): Call riscv_set_default_priv_version to set
> >       default_priv_spec.
> >       (riscv_after_parse_args): If -mpriv-spec isn't set, then call
> >       riscv_set_default_priv_version with DEFAULT_PRIV_SPEC to set the default
> >       privilege verison.
> >
> >       * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
> >       to check the ISA dependency for CSR, so fix the version by adding
> >       -mpriv-spec=1p11.
> >       * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.  There are some
> >       version warnings for the test case.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
> >       Check whether the CSR is valid when privilege version 1.9 is choosed.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
> >       Check whether the CSR is valid when privilege version 1.9.1 is choosed.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
> >       Check whether the CSR is valid when privilege version 1.10 is choosed.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
> >       Check whether the CSR is valid when privilege version 1.11 is choosed.
> >       * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
> >
> >       * configure.ac: Add new configure option --with-priv-spec.
> >       * configure: Regenerated.
> >       * config.in: Regenerated.
> >
> >       include/
> >       * opcode/riscv-opc.h (DECLARE_CSR): Store two version information,
> >       define_version and abort_version for the CSR, which is valid in the
> >       current privilege spec.  The define_version means which privilege spec
> >       started to define the CSR, and the abort_version means which privilege
> >       spec started to abort the CSR.  If the CSR is valid for the newest spec,
> >       then the abort_version is set to CSR_CLASS_VDRAFT.
> >       (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
> >       * opcode/riscv.h: Include "bfd.h" to define bfd_boolean type.
> >       (enum riscv_csr_vclass): New enum classes.  Define the current supported
> >       privilege versions.
> >
> >       opcodes/
> >       * riscv-opc.c (struct priv_version_t): New structure.
> >       (struct priv_version_t priv_versions): Store the supported privilege
> >       versions' classes and their corresponding version string.
> >       (riscv_get_priv_version_class): New function.  Get the corresponding
> >       CSR version class by giving a privilege version string.
> >       (riscv_get_priv_version_name): New function.  Get the corresponding
> >       privilege version string by giving a CSR version class.
> >
> >       * riscv-dis.c: Updated since DECLARE_CSR is changed.
> >
> >       gdb/
> >       * riscv-tdep.c: Updated since DECLARE_CSR is changed.
> >       * riscv-tdep.h: Likewise.
> >
> >       binutils/
> >       * dwarf.c: Updated since DECLARE_CSR is changed.
> > ---
> >  binutils/dwarf.c                                   |   3 +-
> >  gas/config.in                                      |   3 +
> >  gas/config/tc-riscv.c                              | 213 +++++++--
> >  gas/configure                                      |  13 +
> >  gas/configure.ac                                   |   8 +
> >  gas/testsuite/gas/riscv/priv-reg-fail-fext.d       |   2 +-
> >  gas/testsuite/gas/riscv/priv-reg-fail-fext.l       |  25 +
> >  .../gas/riscv/priv-reg-fail-read-only-01.d         |   2 +-
> >  .../gas/riscv/priv-reg-fail-read-only-01.l         |  25 +
> >  gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d  |   2 +-
> >  gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l  |  25 +
> >  .../gas/riscv/priv-reg-fail-version-1p10.d         |   3 +
> >  .../gas/riscv/priv-reg-fail-version-1p10.l         |  27 ++
> >  .../gas/riscv/priv-reg-fail-version-1p11.d         |   3 +
> >  .../gas/riscv/priv-reg-fail-version-1p11.l         |  25 +
> >  .../gas/riscv/priv-reg-fail-version-1p9.d          |   3 +
> >  .../gas/riscv/priv-reg-fail-version-1p9.l          |  30 ++
> >  .../gas/riscv/priv-reg-fail-version-1p9p1.d        |   3 +
> >  .../gas/riscv/priv-reg-fail-version-1p9p1.l        |  30 ++
> >  gdb/riscv-tdep.c                                   |   6 +-
> >  gdb/riscv-tdep.h                                   |   2 +-
> >  include/opcode/riscv-opc.h                         | 509 ++++++++++-----------
> >  include/opcode/riscv.h                             |  19 +
> >  opcodes/riscv-dis.c                                |   3 +-
> >  opcodes/riscv-opc.c                                |  55 +++
> >  25 files changed, 728 insertions(+), 311 deletions(-)
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> >  create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> >
> > diff --git a/binutils/dwarf.c b/binutils/dwarf.c
> > index c75059b..a972c60 100644
> > --- a/binutils/dwarf.c
> > +++ b/binutils/dwarf.c
> > @@ -7378,7 +7378,8 @@ regname_internal_riscv (unsigned int regno)
> >        document.  */
> >        switch (regno)
> >       {
> > -#define DECLARE_CSR(NAME,VALUE,CLASS) case VALUE + 4096: name = #NAME; break;
> > +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
> > +  case VALUE + 4096: name = #NAME; break;
> >  #include "opcode/riscv-opc.h"
> >  #undef DECLARE_CSR
> >
> > diff --git a/gas/config.in b/gas/config.in
> > index 935bd9b..093f474 100644
> > --- a/gas/config.in
> > +++ b/gas/config.in
> > @@ -59,6 +59,9 @@
> >  /* Define to 1 if you want to fix Loongson3 LLSC Errata by default. */
> >  #undef DEFAULT_MIPS_FIX_LOONGSON3_LLSC
> >
> > +/* Define default value for -mpriv-spec */
> > +#undef DEFAULT_PRIV_SPEC
> > +
> >  /* Define to 1 if you want to generate RISC-V arch attribute by default. */
> >  #undef DEFAULT_RISCV_ATTR
> >
> > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> > index bfcf2f0..6528a03 100644
> > --- a/gas/config/tc-riscv.c
> > +++ b/gas/config/tc-riscv.c
> > @@ -75,10 +75,15 @@ struct riscv_cl_insn
> >  #define DEFAULT_RISCV_ISA_VERSION NULL
> >  #endif
> >
> > +#ifndef DEFAULT_PRIV_SPEC
> > +#define DEFAULT_PRIV_SPEC "1p11"
> > +#endif
> > +
> >  static const char default_arch[] = DEFAULT_ARCH;
> >  static const char *default_arch_with_ext = DEFAULT_ARCH_WITH_EXT;
> >  static const char *default_isa_spec = DEFAULT_ISA_SPEC;
> >  static const char *default_riscv_isa_version = DEFAULT_RISCV_ISA_VERSION;
> > +static enum riscv_csr_vclass default_priv_spec = CSR_CLASS_VNONE;
> >
> >  static unsigned xlen = 0; /* width of an x-register */
> >  static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
> > @@ -536,8 +541,9 @@ enum reg_class
> >  {
> >    RCLASS_GPR,
> >    RCLASS_FPR,
> > -  RCLASS_CSR,
> > -  RCLASS_MAX
> > +  RCLASS_MAX,
> > +
> > +  RCLASS_CSR
> >  };
> >
> >  static struct hash_control *reg_names_hash = NULL;
> > @@ -585,84 +591,197 @@ struct riscv_csr_extra
> >    /* Class to which this CSR belongs.  Used to decide whether or
> >       not this CSR is legal in the current -march context.  */
> >    enum riscv_csr_class csr_class;
> > +
> > +  /* CSR may have differnet numbers in the previous priv spec.  */
> > +  unsigned address;
> > +
> > +  /* Record the CSR is defined/valid in which versions.  */
> > +  enum riscv_csr_vclass define_version;
> > +
> > +  /* Record the CSR is aborted/invalid from which versions.  If it isn't
> > +     aborted in the current version, then it should be CSR_CLASS_VDRAFT.  */
> > +  enum riscv_csr_vclass abort_version;
> > +
> > +  /* The CSR may have more than one setting.  */
> > +  struct riscv_csr_extra *next;
> >  };
> >
> > -/* Init two hashes, csr_extra_hash and reg_names_hash, for CSR.  */
> > +/* Set the default_priv_spec, assembler will find the suitable CSR address
> > +   according to default_priv_spec.  Return 0 if the input priv name isn't
> > +   supported.  Otherwise, return 1.  */
> >
> > -static void
> > -riscv_init_csr_hashes (const char *name,
> > -                    unsigned address,
> > -                    enum riscv_csr_class class)
> > +static int
> > +riscv_set_default_priv_version (const char *s)
> >  {
> > -  struct riscv_csr_extra *entry = XNEW (struct riscv_csr_extra);
> > -  entry->csr_class = class;
> > +  enum riscv_csr_vclass class;
> > +  if (!riscv_get_priv_version_class (s, &class))
> > +    {
> > +      as_bad (_("Unsupported RISC-V privilege version set by "
> > +             "-mpriv-spec=%s."), s);
> > +      return 0;
> > +    }
> > +  else
> > +    default_priv_spec = class;
> > +  return 1;
> > +}
> > +
> > +/* Init hash table csr_extra_hash to handle CSR.  */
> >
> > -  const char *hash_error =
> > -    hash_insert (csr_extra_hash, name, (void *) entry);
> > -  if (hash_error != NULL)
> > +static void
> > +riscv_init_csr_hash (const char *name,
> > +                  unsigned address,
> > +                  enum riscv_csr_class class,
> > +                  enum riscv_csr_vclass define_version,
> > +                  enum riscv_csr_vclass abort_version)
> > +{
> > +  struct riscv_csr_extra *entry, *pre_entry;
> > +  const char *hash_error = NULL;
> > +  bfd_boolean need_enrty = TRUE;
> > +
> > +  pre_entry = NULL;
> > +  entry = (struct riscv_csr_extra *) hash_find (csr_extra_hash, name);
> > +  while (need_enrty && entry != NULL)
> >      {
> > -      fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> > -                   name, hash_error);
> > -      /* Probably a memory allocation problem?  Give up now.  */
> > -     as_fatal (_("Broken assembler.  No assembly attempted."));
> > +      if (entry->csr_class == class
> > +       && entry->address == address
> > +       && entry->define_version == define_version
> > +       && entry->abort_version == abort_version)
> > +     need_enrty = FALSE;
> > +      pre_entry = entry;
> > +      entry = entry->next;
> >      }
> >
> > -  hash_reg_name (RCLASS_CSR, name, address);
> > +  /* Duplicate setting for the CSR, just return and do nothing.  */
> > +  if (!need_enrty)
> > +    return;
> > +
> > +  entry = XNEW (struct riscv_csr_extra);
> > +  entry->csr_class = class;
> > +  entry->address = address;
> > +  entry->define_version = define_version;
> > +  entry->abort_version = abort_version;
> > +
> > +  /* If the CSR hasn't been inserted in the hash table, then insert it.
> > +     Otherwise, attach the extra information to the entry which is already
> > +     in the hash table.  */
> > +  if (pre_entry == NULL)
> > +    {
> > +      hash_error = hash_insert (csr_extra_hash, name, (void *) entry);
> > +      if (hash_error != NULL)
> > +     {
> > +       fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
> > +                name, hash_error);
> > +       /* Probably a memory allocation problem?  Give up now.  */
> > +       as_fatal (_("Broken assembler.  No assembly attempted."));
> > +     }
> > +    }
> > +  else
> > +    pre_entry->next = entry;
> >  }
> >
> >  /* Check wether the CSR is valid according to the ISA.  */
> >
> > -static bfd_boolean
> > -riscv_csr_class_check (enum riscv_csr_class csr_class)
> > +static void
> > +riscv_csr_class_check (const char *s,
> > +                    enum riscv_csr_class csr_class)
> >  {
> > +  bfd_boolean result = TRUE;
> > +
> > +  /* Don't check the ISA dependency when -mcsr-check isn't set.  */
> > +  if (!riscv_opts.csr_check)
> > +    return;
> > +
> >    switch (csr_class)
> >      {
> > -    case CSR_CLASS_I: return riscv_subset_supports ("i");
> > -    case CSR_CLASS_F: return riscv_subset_supports ("f");
> > +    case CSR_CLASS_I:
> > +      result = riscv_subset_supports ("i");
> > +      break;
> > +    case CSR_CLASS_F:
> > +      result = riscv_subset_supports ("f");
> > +      break;
> >      case CSR_CLASS_I_32:
> > -      return (xlen == 32 && riscv_subset_supports ("i"));
> > -
> > +      result = (xlen == 32 && riscv_subset_supports ("i"));
> > +      break;
> >      default:
> > -      return FALSE;
> > +      as_bad (_("internal: bad RISC-V CSR class (0x%x)"), csr_class);
> >      }
> > +  if (!result)
> > +    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
> >  }
> >
> > -/* If the CSR is defined, then we call `riscv_csr_class_check` to do the
> > -   further checking.  Return FALSE if the CSR is not defined.  Otherwise,
> > -   return TRUE.  */
> > +/* Check and find the CSR address according to the privilege spec version.  */
> >
> > -static bfd_boolean
> > +static void
> > +riscv_csr_version_check (const char *csr_name,
> > +                      struct riscv_csr_extra **entryP)
> > +{
> > +  struct riscv_csr_extra *entry = *entryP;
> > +  while (entry != NULL)
> > +    {
> > +      if (default_priv_spec >= entry->define_version
> > +       && default_priv_spec < entry->abort_version)
> > +     {
> > +       /* Find the suitable CSR according to the specific version.  */
> > +       *entryP = entry;
> > +       return;
> > +     }
> > +      entry = entry->next;
> > +    }
> > +
> > +  /* We can not find the suitable CSR address according to the privilege
> > +     version.  Therefore, we use the last defined value.  Report the warning
> > +     only when the -mcsr-check is set.  Enable the -mcsr-check is recommended,
> > +     otherwise, you may get the unexpected CSR address.  */
> > +  if (riscv_opts.csr_check)
> > +    {
> > +      const char *priv_name = riscv_get_priv_version_name (default_priv_spec);
> > +      if (priv_name != NULL)
> > +     as_warn (_("Invalid CSR `%s' for the privilege version `%s'"),
> > +              csr_name, priv_name);
> > +    }
> > +}
> > +
> > +/* Once the CSR is defined, including the old privilege spec, then we call
> > +   riscv_csr_class_check and riscv_csr_version_check to do the further
> > +   checking and get the corresponding address.  Return -1 if the CSR is never
> > +   been defined.  Otherwise, return the address.  */
> > +
> > +static unsigned int
> >  reg_csr_lookup_internal (const char *s)
> >  {
> >    struct riscv_csr_extra *r =
> >      (struct riscv_csr_extra *) hash_find (csr_extra_hash, s);
> >
> >    if (r == NULL)
> > -    return FALSE;
> > +    return -1;
> >
> > -  /* We just report the warning when the CSR is invalid.  */
> > -  if (!riscv_csr_class_check (r->csr_class))
> > -    as_warn (_("Invalid CSR `%s' for the current ISA"), s);
> > +  /* We just report the warning when the CSR is invalid.  "Invalid CSR" means
> > +     the CSR was defined, but isn't allowed for the current ISA setting or
> > +     the privilege version.  If the CSR is never been defined, then assembler
> > +     will regard it as a "Unknown CSR" and report error.  If user use number
> > +     to set the CSR, but over the range (> 0xfff), then assembler will report
> > +     "Improper CSR" error for it.  */
> > +  riscv_csr_class_check (s, r->csr_class);
> > +  riscv_csr_version_check (s, &r);
> >
> > -  return TRUE;
> > +  return r->address;
> >  }
> >
> >  static unsigned int
> >  reg_lookup_internal (const char *s, enum reg_class class)
> >  {
> > -  void *r = hash_find (reg_names_hash, s);
> > +  void *r;
> > +
> > +  if (class == RCLASS_CSR)
> > +    return reg_csr_lookup_internal (s);
> >
> > +  r = hash_find (reg_names_hash, s);
> >    if (r == NULL || DECODE_REG_CLASS (r) != class)
> >      return -1;
> >
> >    if (riscv_opts.rve && class == RCLASS_GPR && DECODE_REG_NUM (r) > 15)
> >      return -1;
> >
> > -  if (class == RCLASS_CSR
> > -      && riscv_opts.csr_check
> > -      && !reg_csr_lookup_internal (s))
> > -    return -1;
> > -
> >    return DECODE_REG_NUM (r);
> >  }
> >
> > @@ -946,8 +1065,10 @@ md_begin (void)
> >
> >    /* Create and insert CSR hash tables.  */
> >    csr_extra_hash = hash_new ();
> > -#define DECLARE_CSR(name, num, class) riscv_init_csr_hashes (#name, num, class);
> > -#define DECLARE_CSR_ALIAS(name, num, class) DECLARE_CSR(name, num, class);
> > +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> > +  riscv_init_csr_hash (#name, num, class, define_version, abort_version);
> > +#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
> > +  DECLARE_CSR(name, num, class, define_version, abort_version);
> >  #include "opcode/riscv-opc.h"
> >  #undef DECLARE_CSR
> >
> > @@ -2434,6 +2555,7 @@ enum options
> >    OPTION_NO_CSR_CHECK,
> >    OPTION_MISA_SPEC,
> >    OPTION_MRISCV_ISA_VERSION,
> > +  OPTION_MPRIV_SPEC,
> >    OPTION_END_OF_ENUM
> >  };
> >
> > @@ -2452,6 +2574,7 @@ struct option md_longopts[] =
> >    {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
> >    {"misa-spec", required_argument, NULL, OPTION_MISA_SPEC},
> >    {"mriscv-isa-version", required_argument, NULL, OPTION_MRISCV_ISA_VERSION},
> > +  {"mpriv-spec", required_argument, NULL, OPTION_MPRIV_SPEC},
> >
> >    {NULL, no_argument, NULL, 0}
> >  };
> > @@ -2548,6 +2671,9 @@ md_parse_option (int c, const char *arg)
> >        default_riscv_isa_version = arg;
> >        break;
> >
> > +    case OPTION_MPRIV_SPEC:
> > +      return riscv_set_default_priv_version (arg);
> > +
> >      default:
> >        return 0;
> >      }
> > @@ -2594,6 +2720,11 @@ riscv_after_parse_args (void)
> >    if (riscv_subset_supports ("e"))
> >      riscv_set_rve (TRUE);
> >
> > +  /* If the -mpriv-spec isn't set, then we set the default privilege version
> > +     according to DEFAULT_PRIV_SPEC,  */
> > +  if (default_priv_spec == CSR_CLASS_VNONE)
> > +    riscv_set_default_priv_version (DEFAULT_PRIV_SPEC);
> > +
> >    /* Infer ABI from ISA if not specified on command line.  */
> >    if (abi_xlen == 0)
> >      abi_xlen = xlen;
> > diff --git a/gas/configure b/gas/configure
> > index bce847a..0911152 100755
> > --- a/gas/configure
> > +++ b/gas/configure
> > @@ -13068,6 +13068,19 @@ _ACEOF
> >       fi
> >       { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_riscv_isa_version" >&5
> >  $as_echo "$with_riscv_isa_version" >&6; }
> > +
> > +      # --with-priv-spec=[1p9p1|1p10|1p11].
> > +     { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-priv-spec" >&5
> > +$as_echo_n "checking for default configuration of --with-priv-spec... " >&6; }
> > +     if test "x${with_priv_spec}" != x; then
> > +
> > +cat >>confdefs.h <<_ACEOF
> > +#define DEFAULT_PRIV_SPEC "$with_priv_spec"
> > +_ACEOF
> > +
> > +     fi
> > +     { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_priv_spec" >&5
> > +$as_echo "$with_priv_spec" >&6; }
> >       ;;
> >
> >        rl78)
> > diff --git a/gas/configure.ac b/gas/configure.ac
> > index be4ba20..c3d3639 100644
> > --- a/gas/configure.ac
> > +++ b/gas/configure.ac
> > @@ -606,6 +606,14 @@ changequote([,])dnl
> >                             covered by --with-isa-spec])
> >       fi
> >       AC_MSG_RESULT($with_riscv_isa_version)
> > +
> > +      # --with-priv-spec=[1p9p1|1p10|1p11].
> > +     AC_MSG_CHECKING(for default configuration of --with-priv-spec)
> > +     if test "x${with_priv_spec}" != x; then
> > +       AC_DEFINE_UNQUOTED(DEFAULT_PRIV_SPEC, "$with_priv_spec",
> > +                          [Define default value for -mpriv-spec])
> > +     fi
> > +     AC_MSG_RESULT($with_priv_spec)
> >       ;;
> >
> >        rl78)
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> > index da53566..0033e3c 100644
> > --- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.d
> > @@ -1,3 +1,3 @@
> > -#as: -march=rv32i -mcsr-check
> > +#as: -march=rv32i -mcsr-check -mpriv-spec=1p11
> >  #source: priv-reg.s
> >  #warning_output: priv-reg-fail-fext.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> > index 76818c8..d3b1bad 100644
> > --- a/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-fext.l
> > @@ -2,3 +2,28 @@
> >  .*Warning: Invalid CSR `fflags' for the current ISA
> >  .*Warning: Invalid CSR `frm' for the current ISA
> >  .*Warning: Invalid CSR `fcsr' for the current ISA
> > +
> > +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> > index ae190c0..bbf83b5 100644
> > --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d
> > @@ -1,3 +1,3 @@
> > -#as: -march=rv32if -mcsr-check
> > +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
> >  #source: priv-reg-fail-read-only-01.s
> >  #warning_output: priv-reg-fail-read-only-01.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> > index 7e52bd7..e8355f1 100644
> > --- a/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l
> > @@ -67,3 +67,28 @@
> >  .*Warning: Read-only CSR is written `csrw marchid,a1'
> >  .*Warning: Read-only CSR is written `csrw mimpid,a1'
> >  .*Warning: Read-only CSR is written `csrw mhartid,a1'
> > +
> > +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> > index d71b261..a0b88cf 100644
> > --- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d
> > @@ -1,3 +1,3 @@
> > -#as: -march=rv64if -mcsr-check
> > +#as: -march=rv64if -mcsr-check -mpriv-spec=1p11
> >  #source: priv-reg.s
> >  #warning_output: priv-reg-fail-rv32-only.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> > index fa5a1b4..5e96a85 100644
> > --- a/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l
> > @@ -64,3 +64,28 @@
> >  .*Warning: Invalid CSR `mhpmcounter29h' for the current ISA
> >  .*Warning: Invalid CSR `mhpmcounter30h' for the current ISA
> >  .*Warning: Invalid CSR `mhpmcounter31h' for the current ISA
> > +
> > +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> > new file mode 100644
> > index 0000000..d7a788a
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d
> > @@ -0,0 +1,3 @@
> > +#as: -march=rv32if -mcsr-check -mpriv-spec=1p10
> > +#source: priv-reg.s
> > +#warning_output: priv-reg-fail-version-1p10.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> > new file mode 100644
> > index 0000000..f532962
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l
> > @@ -0,0 +1,27 @@
> > +.*Assembler messages:
> > +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `sptbr' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hstatus' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hideleg' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hie' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `htvec' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hscratch' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hepc' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hcause' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `hip' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mbase' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mbound' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mibase' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mibound' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mdbase' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mdbound' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p10'
> > +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p10'
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> > new file mode 100644
> > index 0000000..2830c83
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d
> > @@ -0,0 +1,3 @@
> > +#as: -march=rv32if -mcsr-check -mpriv-spec=1p11
> > +#source: priv-reg.s
> > +#warning_output: priv-reg-fail-version-1p11.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> > new file mode 100644
> > index 0000000..252f96a
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l
> > @@ -0,0 +1,25 @@
> > +.*Assembler messages:
> > +.*Warning: Invalid CSR `ubadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `sptbr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mucounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `dscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hstatus' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hedeleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hideleg' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hie' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `htvec' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hscratch' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hepc' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hcause' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hbadaddr' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `hip' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mibound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbase' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mdbound' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mscounteren' for the privilege version `1p11'
> > +.*Warning: Invalid CSR `mhcounteren' for the privilege version `1p11'
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> > new file mode 100644
> > index 0000000..70c405f
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d
> > @@ -0,0 +1,3 @@
> > +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9
> > +#source: priv-reg.s
> > +#warning_output: priv-reg-fail-version-1p9.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> > new file mode 100644
> > index 0000000..92e1463
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l
> > @@ -0,0 +1,30 @@
> > +.*Assembler messages:
> > +.*Warning: Invalid CSR `utval' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `scounteren' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `stval' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `satp' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `mtval' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9'
> > +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9'
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> > new file mode 100644
> > index 0000000..2bd4bbf
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d
> > @@ -0,0 +1,3 @@
> > +#as: -march=rv32if -mcsr-check -mpriv-spec=1p9p1
> > +#source: priv-reg.s
> > +#warning_output: priv-reg-fail-version-1p9p1.l
> > diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> > new file mode 100644
> > index 0000000..6cde0b3
> > --- /dev/null
> > +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l
> > @@ -0,0 +1,30 @@
> > +.*Assembler messages:
> > +.*Warning: Invalid CSR `utval' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `scounteren' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `stval' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `satp' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `mcounteren' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `mtval' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpcfg0' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpcfg1' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpcfg2' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpcfg3' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr0' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr1' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr2' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr3' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr4' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr5' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr6' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr7' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr8' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr9' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr10' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr11' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr12' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr13' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr14' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `pmpaddr15' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `mcountinhibit' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `dscratch0' for the privilege version `1p9p1'
> > +.*Warning: Invalid CSR `dscratch1' for the privilege version `1p9p1'
> > diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
> > index 1bb824e..e67f661 100644
> > --- a/gdb/riscv-tdep.c
> > +++ b/gdb/riscv-tdep.c
> > @@ -240,7 +240,7 @@ static struct riscv_register_feature riscv_csr_feature =
> >  {
> >   "org.gnu.gdb.riscv.csr",
> >   {
> > -#define DECLARE_CSR(NAME,VALUE,CLASS) \
> > +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
> >    { RISCV_ ## VALUE ## _REGNUM, { # NAME }, false },
> >  #include "opcode/riscv-opc.h"
> >  #undef DECLARE_CSR
> > @@ -498,7 +498,7 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum)
> >
> >    if (regnum >= RISCV_FIRST_CSR_REGNUM && regnum <= RISCV_LAST_CSR_REGNUM)
> >      {
> > -#define DECLARE_CSR(NAME,VALUE,CLASS) \
> > +#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
> >        case RISCV_ ## VALUE ## _REGNUM: return # NAME;
> >
> >        switch (regnum)
> > @@ -828,7 +828,7 @@ riscv_is_regnum_a_named_csr (int regnum)
> >
> >    switch (regnum)
> >      {
> > -#define DECLARE_CSR(name, num, class) case RISCV_ ## num ## _REGNUM:
> > +#define DECLARE_CSR(name, num, class, define_ver, abort_ver) case RISCV_ ## num ## _REGNUM:
> >  #include "opcode/riscv-opc.h"
> >  #undef DECLARE_CSR
> >        return true;
> > diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
> > index 90bae08..e415fb4 100644
> > --- a/gdb/riscv-tdep.h
> > +++ b/gdb/riscv-tdep.h
> > @@ -44,7 +44,7 @@ enum
> >    RISCV_LAST_FP_REGNUM = 64, /* Last Floating Point Register */
> >
> >    RISCV_FIRST_CSR_REGNUM = 65,  /* First CSR */
> > -#define DECLARE_CSR(name, num, class) \
> > +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> >    RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num,
> >  #include "opcode/riscv-opc.h"
> >  #undef DECLARE_CSR
> > diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> > index fe00bb6..ab11c31 100644
> > --- a/include/opcode/riscv-opc.h
> > +++ b/include/opcode/riscv-opc.h
> > @@ -656,7 +656,6 @@
> >  #define CSR_SIDELEG 0x103
> >  #define CSR_SIE 0x104
> >  #define CSR_STVEC 0x105
> > -/* scounteren is present int priv spec 1.10.  */
> >  #define CSR_SCOUNTEREN 0x106
> >  #define CSR_SSCRATCH 0x140
> >  #define CSR_SEPC 0x141
> > @@ -669,20 +668,17 @@
> >  #define CSR_MIMPID 0xf13
> >  #define CSR_MHARTID 0xf14
> >  #define CSR_MSTATUS 0x300
> > -/* misa is 0xf10 in 1.9, but 0x301 in 1.9.1.  */
> >  #define CSR_MISA 0x301
> >  #define CSR_MEDELEG 0x302
> >  #define CSR_MIDELEG 0x303
> >  #define CSR_MIE 0x304
> >  #define CSR_MTVEC 0x305
> > -/* mcounteren is present in priv spec 1.10.  */
> >  #define CSR_MCOUNTEREN 0x306
> >  #define CSR_MSCRATCH 0x340
> >  #define CSR_MEPC 0x341
> >  #define CSR_MCAUSE 0x342
> >  #define CSR_MTVAL 0x343
> >  #define CSR_MIP 0x344
> > -/* pmpcfg0 to pmpcfg3, pmpaddr0 to pmpaddr15 are present in priv spec 1.10.  */
> >  #define CSR_PMPCFG0 0x3a0
> >  #define CSR_PMPCFG1 0x3a1
> >  #define CSR_PMPCFG2 0x3a2
> > @@ -765,7 +761,6 @@
> >  #define CSR_MHPMCOUNTER29H 0xb9d
> >  #define CSR_MHPMCOUNTER30H 0xb9e
> >  #define CSR_MHPMCOUNTER31H 0xb9f
> > -/* mcountinhibit is present in priv spec 1.11.  */
> >  #define CSR_MCOUNTINHIBIT 0x320
> >  #define CSR_MHPMEVENT3 0x323
> >  #define CSR_MHPMEVENT4 0x324
> > @@ -802,10 +797,8 @@
> >  #define CSR_TDATA3 0x7a3
> >  #define CSR_DCSR 0x7b0
> >  #define CSR_DPC 0x7b1
> > -/* dscratch0 and dscratch1 are present in priv spec 1.11.  */
> >  #define CSR_DSCRATCH0 0x7b2
> >  #define CSR_DSCRATCH1 0x7b3
> > -/* These registers are present in priv spec 1.9.1, but are dropped in 1.10.  */
> >  #define CSR_HSTATUS 0x200
> >  #define CSR_HEDELEG 0x202
> >  #define CSR_HIDELEG 0x203
> > @@ -1124,262 +1117,256 @@ DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
> >  DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
> >  #endif
> >  #ifdef DECLARE_CSR
> > -DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I)
> > -DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I)
> > -DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I)
> > -DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I)
> > -DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I)
> > -DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I)
> > -DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I)
> > -DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I)
> > -DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F)
> > -DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F)
> > -DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F)
> > -DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I)
> > -DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I)
> > -DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I)
> > -DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I)
> > -DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32)
> > -DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32)
> > -DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32)
> > -DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32)
> > -DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I)
> > -DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I)
> > -DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I)
> > -DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I)
> > -DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I)
> > -DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I)
> > -DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I)
> > -DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I)
> > -DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I)
> > -DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I)
> > -DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I)
> > -DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I)
> > -DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I)
> > -DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I)
> > -DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I)
> > -DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I)
> > -DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I)
> > -DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I)
> > -DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I)
> > -DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I)
> > -DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I)
> > -DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I)
> > -DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I)
> > -DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I)
> > -DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I)
> > -DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I)
> > -DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I)
> > -DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I)
> > -DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I)
> > -DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32)
> > -DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I)
> > -DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32)
> > -DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I)
> > -DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I)
> > -DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I)
> > -DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I)
> > -DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32)
> > -DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32)
> > -DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I)
> > -DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I)
> > -DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I)
> > -DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I)
> > -DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I)
> > -DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I)
> > -DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I)
> > -DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I)
> > -DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I)
> > -DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I)
> > -/* These registers are present in priv spec 1.9.1, dropped in 1.10.  */
> > -DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I)
> > -DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I)
> > -DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I)
> > -DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I)
> > -DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I)
> > -DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I)
> > -DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I)
> > -DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I)
> > -DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I)
> > -DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I)
> > -DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I)
> > -DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I)
> > -DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I)
> > -DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I)
> > -DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I)
> > -DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I)
> > -DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I)
> > -DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I)
> > +DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(uscratch, CSR_USCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(uepc, CSR_UEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(ucause, CSR_UCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(utval, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(uip, CSR_UIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(fflags, CSR_FFLAGS, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(frm, CSR_FRM, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(fcsr, CSR_FCSR, CSR_CLASS_F, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(cycle, CSR_CYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(time, CSR_TIME, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(instret, CSR_INSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(cycleh, CSR_CYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(timeh, CSR_TIMEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(instreth, CSR_INSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sstatus, CSR_SSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sedeleg, CSR_SEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sideleg, CSR_SIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sie, CSR_SIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(stvec, CSR_STVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(scounteren, CSR_SCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sscratch, CSR_SSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sepc, CSR_SEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(scause, CSR_SCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(stval, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(sip, CSR_SIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(satp, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mvendorid, CSR_MVENDORID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(marchid, CSR_MARCHID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mimpid, CSR_MIMPID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhartid, CSR_MHARTID, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mstatus, CSR_MSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(misa, CSR_MISA, CSR_CLASS_I, CSR_CLASS_V1P9P1, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(medeleg, CSR_MEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mideleg, CSR_MIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mie, CSR_MIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mtvec, CSR_MTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mcounteren, CSR_MCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mscratch, CSR_MSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mepc, CSR_MEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mcause, CSR_MCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mtval, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mip, CSR_MIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpcfg3, CSR_PMPCFG3, CSR_CLASS_I_32, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr0, CSR_PMPADDR0, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr1, CSR_PMPADDR1, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr2, CSR_PMPADDR2, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr3, CSR_PMPADDR3, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr4, CSR_PMPADDR4, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr5, CSR_PMPADDR5, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr6, CSR_PMPADDR6, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr7, CSR_PMPADDR7, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr8, CSR_PMPADDR8, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr9, CSR_PMPADDR9, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr10, CSR_PMPADDR10, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr11, CSR_PMPADDR11, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr12, CSR_PMPADDR12, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr13, CSR_PMPADDR13, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr14, CSR_PMPADDR14, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(pmpaddr15, CSR_PMPADDR15, CSR_CLASS_I, CSR_CLASS_V1P10, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mcycleh, CSR_MCYCLEH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(minstreth, CSR_MINSTRETH, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H, CSR_CLASS_I_32, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(tselect, CSR_TSELECT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(tdata1, CSR_TDATA1, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(tdata2, CSR_TDATA2, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(tdata3, CSR_TDATA3, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(dcsr, CSR_DCSR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(dpc, CSR_DPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(dscratch0, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(dscratch1, CSR_DSCRATCH1, CSR_CLASS_I, CSR_CLASS_V1P11, CSR_CLASS_VDRAFT)
> > +DECLARE_CSR(hstatus, CSR_HSTATUS, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hedeleg, CSR_HEDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hideleg, CSR_HIDELEG, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hie, CSR_HIE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(htvec, CSR_HTVEC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hscratch, CSR_HSCRATCH, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hepc, CSR_HEPC, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hcause, CSR_HCAUSE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hbadaddr, CSR_HBADADDR, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(hip, CSR_HIP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> >  #endif
> >  #ifdef DECLARE_CSR_ALIAS
> > -/* Ubadaddr is 0x043 in 1.9.1, but 0x043 is utval in 1.10.  */
> > -DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I)
> > -/* Sbadaddr is 0x143 in 1.9.1, but 0x143 is stval in 1.10.  */
> > -DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I)
> > -/* Sptbr is 0x180 in 1.9.1, but 0x180 is satp in 1.10.  */
> > -DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I)
> > -/* Mbadaddr is 0x343 in 1.9.1, but 0x343 is mtval in 1.10.  */
> > -DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I)
> > -/* Mucounteren is 0x320 in 1.10, but 0x320 is mcountinhibit in 1.11.  */
> > -DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I)
> > -/* Dscratch is 0x7b2 in 1.10, but 0x7b2 is dscratch0 in 1.11.  */
> > -DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I)
> > +DECLARE_CSR_ALIAS(misa, 0xf10, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P9P1)
> > +DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR_ALIAS(sptbr, CSR_SATP, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR_ALIAS(mucounteren, CSR_MCOUNTINHIBIT, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P10)
> > +DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_I, CSR_CLASS_V1P9, CSR_CLASS_V1P11)
> >  #endif
> >  #ifdef DECLARE_CAUSE
> >  DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
> > diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> > index f8b0de3..c36bf69 100644
> > --- a/include/opcode/riscv.h
> > +++ b/include/opcode/riscv.h
> > @@ -24,6 +24,7 @@
> >  #include "riscv-opc.h"
> >  #include <stdlib.h>
> >  #include <stdint.h>
> > +#include "bfd.h"
> >
> >  typedef uint64_t insn_t;
> >
> > @@ -353,6 +354,19 @@ struct riscv_ext_version
> >    unsigned int minor_version;
> >  };
> >
> > +/* The current supported privilege versions.  */
> > +
> > +enum riscv_csr_vclass
> > +{
> > +  CSR_CLASS_VNONE,   /* Default value */
> > +
> > +  CSR_CLASS_V1P9,       /* v1.9 */
> > +  CSR_CLASS_V1P9P1,     /* v1.9.1 */
> > +  CSR_CLASS_V1P10,      /* v1.10 */
> > +  CSR_CLASS_V1P11,      /* v1.11 */
> > +  CSR_CLASS_VDRAFT
> > +};
> > +
> >  /* Instruction is a simple alias (e.g. "mv" for "addi").  */
> >  #define      INSN_ALIAS              0x00000001
> >
> > @@ -432,4 +446,9 @@ extern const struct riscv_opcode riscv_opcodes[];
> >  extern const struct riscv_opcode riscv_insn_types[];
> >  extern const struct riscv_ext_version riscv_ext_version_table[];
> >
> > +extern bfd_boolean
> > +riscv_get_priv_version_class (const char *, enum riscv_csr_vclass *);
> > +extern const char *
> > +riscv_get_priv_version_name (enum riscv_csr_vclass);
> > +
> >  #endif /* _RISCV_H_ */
> > diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> > index d7a184c..98302ff 100644
> > --- a/opcodes/riscv-dis.c
> > +++ b/opcodes/riscv-dis.c
> > @@ -326,7 +326,8 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
> >           unsigned int csr = EXTRACT_OPERAND (CSR, l);
> >           switch (csr)
> >             {
> > -#define DECLARE_CSR(name, num, class) case num: csr_name = #name; break;
> > +#define DECLARE_CSR(name, num, class, define_version, abort_version) \
> > +  case num: csr_name = #name; break;
> >  #include "opcode/riscv-opc.h"
> >  #undef DECLARE_CSR
> >             }
> > diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
> > index 7b885bf..cfefd8e 100644
> > --- a/opcodes/riscv-opc.c
> > +++ b/opcodes/riscv-opc.c
> > @@ -937,3 +937,58 @@ const struct riscv_ext_version riscv_ext_version_table[] =
> >  /* Terminate the list.  */
> >  {NULL, NULL, 0, 0}
> >  };
> > +
> > +struct priv_version_t
> > +{
> > +  const char *name;
> > +  enum riscv_csr_vclass vclass;
> > +};
> > +
> > +/* List for all supported CSR versions.  */
> > +static const struct priv_version_t priv_versions[] =
> > +{
> > +  {"1p9", CSR_CLASS_V1P9},
> > +  {"1p9p1", CSR_CLASS_V1P9P1},
> > +  {"1p10", CSR_CLASS_V1P10},
> > +  {"1p11", CSR_CLASS_V1P11},
> > +
> > +/* Terminate the list.  */
> > +  {NULL, 0}
> > +};
> > +
> > +/* Get the corresponding CSR version class by giving a privilege
> > +   version string.  */
> > +
> > +bfd_boolean
> > +riscv_get_priv_version_class (const char *s,
> > +                           enum riscv_csr_vclass *class)
> > +{
> > +  const struct priv_version_t *version;
> > +
> > +  if (s == NULL)
> > +    return FALSE;
> > +
> > +  for (version = &priv_versions[0]; version->name != NULL; ++version)
> > +    if (strcmp (version->name, s) == 0)
> > +      {
> > +     *class = version->vclass;
> > +     return TRUE;
> > +      }
> > +
> > +  /* Can not find the supported privilege version.  */
> > +  return FALSE;
> > +}
> > +
> > +/* Get the corresponding privilege version string by giving a CSR
> > +   version class.  */
> > +
> > +const char *
> > +riscv_get_priv_version_name (enum riscv_csr_vclass class)
> > +{
> > +  const struct priv_version_t *version;
> > +  for (version = &priv_versions[0]; version->name != NULL; ++version)
> > +    if (class == version->vclass)
> > +      return version->name;
> > +  /* This shouldn't happen.  */
> > +  return NULL;
> > +}
> > --
> > 2.7.4
> >

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR
  2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
                   ` (7 preceding siblings ...)
  2020-04-18 11:17 ` [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
@ 2020-04-30 16:10 ` Kito Cheng
  2020-05-01  9:29   ` Nelson Chu
  8 siblings, 1 reply; 25+ messages in thread
From: Kito Cheng @ 2020-04-30 16:10 UTC (permalink / raw)
  To: Nelson Chu; +Cc: Binutils, gdb-patches, Alex Bradbury, Kito Cheng

>
> * -misa-spec = [2p0|2p1|2p2|20190608|20191213]
> You can simply choose the ISA spec by this option, and then assembler will set
> the version for the standard extensions if you don’t set in the ELF arch
> attributes or -march option.

Could you change this into 2.0|2.1|... instead of 2p0|2p1|... ?
Unlike arch string has specified by spec, it must use `p` instead of `.`.
so I think there is no necessary to use `p` here.

> * --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
> The syntax is same as -misa-spec option.  Assembler will check this if
> -misa-spec option isn’t set.

Same comment as -misa-spec.

> * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
> This is used to set the privileged spec’s version, and we can decide whether
> the CSR is valid or not.

Change to 1.9 instead of 1p9.

>
> === New Default Configure Option ===
>
> * --with-priv-spec = [1p9|1p9p1|1p10|1p11]

Same comment as -mpriv-spec=

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR
  2020-04-30 16:10 ` Kito Cheng
@ 2020-05-01  9:29   ` Nelson Chu
  0 siblings, 0 replies; 25+ messages in thread
From: Nelson Chu @ 2020-05-01  9:29 UTC (permalink / raw)
  To: Kito Cheng; +Cc: Binutils, gdb-patches, Alex Bradbury, Kito Cheng

OK got it, I will fix this :)

Thanks
Nelson

On Fri, May 1, 2020 at 12:10 AM Kito Cheng <kito.cheng@gmail.com> wrote:
>
> >
> > * -misa-spec = [2p0|2p1|2p2|20190608|20191213]
> > You can simply choose the ISA spec by this option, and then assembler will set
> > the version for the standard extensions if you don’t set in the ELF arch
> > attributes or -march option.
>
> Could you change this into 2.0|2.1|... instead of 2p0|2p1|... ?
> Unlike arch string has specified by spec, it must use `p` instead of `.`.
> so I think there is no necessary to use `p` here.
>
> > * --with-isa-spec = [2p0|2p1|2p2|20190608|20191213]
> > The syntax is same as -misa-spec option.  Assembler will check this if
> > -misa-spec option isn’t set.
>
> Same comment as -misa-spec.
>
> > * -mpriv-spec=[1p9|1p9p1|1p10|1p11]
> > This is used to set the privileged spec’s version, and we can decide whether
> > the CSR is valid or not.
>
> Change to 1.9 instead of 1p9.
>
> >
> > === New Default Configure Option ===
> >
> > * --with-priv-spec = [1p9|1p9p1|1p10|1p11]
>
> Same comment as -mpriv-spec=

^ permalink raw reply	[flat|nested] 25+ messages in thread

end of thread, other threads:[~2020-05-01  9:29 UTC | newest]

Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-18 11:07 [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
2020-04-18 11:07 ` [PATCH 1/7] RISC-V: Remove the redundant gas test file Nelson Chu
2020-04-18 11:17   ` Nelson Chu
2020-04-18 11:20     ` Nelson Chu
2020-04-18 11:07 ` [PATCH 2/7] RISC-V: Forgot to update the priv-reg-fail-read-only-01 test case Nelson Chu
2020-04-18 11:17   ` Nelson Chu
2020-04-18 11:07 ` [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions Nelson Chu
2020-04-18 11:18   ` Nelson Chu
2020-04-23 22:58   ` Palmer Dabbelt
2020-04-24  2:37     ` Nelson Chu
2020-04-24  6:43       ` Nelson Chu
2020-04-18 11:07 ` [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version Nelson Chu
2020-04-18 11:18   ` Nelson Chu
2020-04-24 10:21   ` Andrew Burgess
2020-04-27  1:35     ` Nelson Chu
2020-04-18 11:07 ` [PATCH 5/7] RISC-V: Make privilege spec attributes work Nelson Chu
2020-04-18 11:18   ` Nelson Chu
2020-04-18 11:07 ` [PATCH 6/7] RISC-V: Disassembler dumps the CSR according to the chosen privilege spec Nelson Chu
2020-04-18 11:18   ` Nelson Chu
2020-04-18 11:07 ` [PATCH 7/7] RISC-V: Add documents and --help for the new GAS and OBJDUMP options Nelson Chu
2020-04-18 11:19   ` Nelson Chu
2020-04-18 11:17 ` [PATCH 0/7] RISC-V: Support version controling for ISA standard extensions and CSR Nelson Chu
2020-04-23 20:59   ` Palmer Dabbelt
2020-04-30 16:10 ` Kito Cheng
2020-05-01  9:29   ` Nelson Chu

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