From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-f170.google.com (mail-pg1-f170.google.com [209.85.215.170]) by sourceware.org (Postfix) with ESMTPS id 7D7233858C53 for ; Mon, 20 Mar 2023 01:32:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7D7233858C53 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=debian.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pg1-f170.google.com with SMTP id h31so5750001pgl.6 for ; Sun, 19 Mar 2023 18:32:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679275971; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IQ+Azcy5Ih8Xn2BVpDmB0ArR5gEk9brxozZz6OD872U=; b=0FkesVIexsXuiLC+HnD+6PqwV9F2/yHjPUz4hHteTRZdh+h3tL1LEH995hlqPIhr95 M0xKJ2ATVR3mKocwzuUe+mPAbv4JqsQNkl3AdbsPGSZB2L8DUQCHaklv6EosfFCzOmJT aoO/We7TBRqgWYbKvq5BUEMJWoLINdZiSNOqvsSDAsQfJ9lC57A/cFgDMEgKa5PiPt2V DY+nfKMxbii9yHoDazqJRsGKb/P1LG2eFLspea+K6rfSyBWCuiABAtZRj7NaNoQzMZO1 qlxDBUHX3XrI/gx1y0z6nwKBmVjJPXmgg2mJNBxjLcH2aqHUDh313epaVDVkE6yBRKex MkZQ== X-Gm-Message-State: AO0yUKWPanU4zzzdI8IrT0OxtEcdqCCQ3cQB48NkPaxu7VR3OLRmHNj3 mW4vqiaW+vxgFWkUENEnOtfOdGORBgvsv7qZhptRBOYumpE= X-Google-Smtp-Source: AK7set8fpNOiBnsZq14NufubeGwYBxpRDw/LPJSvqfZMajUu4oAiL90/vdcCzic2Z1xE/zsI6Z18co5AJ6ZPTdIYw0I= X-Received: by 2002:a05:6a00:2e1c:b0:625:a545:3292 with SMTP id fc28-20020a056a002e1c00b00625a5453292mr6642232pfb.0.1679275971332; Sun, 19 Mar 2023 18:32:51 -0700 (PDT) MIME-Version: 1.0 References: <20230221040650.2337395-1-yunqiang.su@cipunited.com> <20230302015222.291088-1-yunqiang.su@cipunited.com> In-Reply-To: From: YunQiang Su Date: Mon, 20 Mar 2023 09:32:40 +0800 Message-ID: Subject: Re: [PATCH v2] MIPS: make mipsisa32 and mipsisa64 link more systematic To: YunQiang Su Cc: binutils@sourceware.org, macro@orcam.me.uk, xry111@xry111.site, richard.sandiford@arm.com, jiaxun.yang@flygoat.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,BODY_8BITS,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,GIT_PATCH_0,HEADER_FROM_DIFFERENT_DOMAINS,KAM_DMARC_STATUS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: ping YunQiang Su =E4=BA=8E2023=E5=B9=B43=E6=9C=885=E6=97=A5=E5= =91=A8=E6=97=A5 21:38=E5=86=99=E9=81=93=EF=BC=9A > > @Rickard can you help to submit this patch to git? > I have no permission to do so. > > YunQiang Su =E4=BA=8E2023=E5=B9=B43=E6=9C=882= =E6=97=A5=E5=91=A8=E5=9B=9B 09:52=E5=86=99=E9=81=93=EF=BC=9A > > > > Introduce `static const struct mips_mach_extension mips_mach_32_64[]` > > and `mips_mach_extends_32_64 (unsigned long base, unsigned long extensi= on)`, > > to make mipsisa32 and mipsisa64 interlink more systemtic. > > > > Normally, the ISA mipsisa64rN has two subset: mipsisa64r(N-1) and > > mipsisa32rN. `mips_mach_extensions` can hold only mipsisa64r(N-1), > > so we need to introduce a new instruction `mips_mach_32_64`, which hold= s the pair 32vs64. > > > > Note: R6 is not compatible with pre-R6. > > > > bfd/ChangeLog: > > > > * elfxx-mips.c (mips_mach_extends_p): make mipsisa32 and > > mipsisa64 interlink more systematic. > > (mips_mach_32_64): new struct added. > > (mips_mach_extends_32_64): new function added. > > --- > > bfd/elfxx-mips.c | 40 +++++++++++++++++++++++++++++----------- > > 1 file changed, 29 insertions(+), 11 deletions(-) > > > > diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c > > index 35bbd86044b..21e6396609b 100644 > > --- a/bfd/elfxx-mips.c > > +++ b/bfd/elfxx-mips.c > > @@ -14524,6 +14524,16 @@ struct mips_mach_extension > > unsigned long extension, base; > > }; > > > > +/* An array that maps 64-bit architectures to the corresponding 32-bit > > + architectures. */ > > +static const struct mips_mach_extension mips_mach_32_64[] =3D > > +{ > > + { bfd_mach_mipsisa64r6, bfd_mach_mipsisa32r6 }, > > + { bfd_mach_mipsisa64r5, bfd_mach_mipsisa32r5 }, > > + { bfd_mach_mipsisa64r3, bfd_mach_mipsisa32r3 }, > > + { bfd_mach_mipsisa64r2, bfd_mach_mipsisa32r2 }, > > + { bfd_mach_mipsisa64, bfd_mach_mipsisa32 } > > +}; > > > > /* An array describing how BFD machines relate to one another. The en= tries > > are ordered topologically with MIPS I extensions listed last. */ > > @@ -14601,29 +14611,37 @@ static const struct mips_mach_extension mips_= mach_extensions[] =3D > > { bfd_mach_mips3900, bfd_mach_mips3000 } > > }; > > > > -/* Return true if bfd machine EXTENSION is an extension of machine BAS= E. */ > > +/* Return true if bfd machine EXTENSION is the same as BASE, or if > > + EXTENSION is the 64-bit equivalent of a 32-bit BASE. */ > > + > > +static bool > > +mips_mach_extends_32_64 (unsigned long base, unsigned long extension) > > +{ > > + size_t i; > > + > > + if (extension =3D=3D base) > > + return true; > > + > > + for (i =3D 0; i < ARRAY_SIZE (mips_mach_64_32); i++) > > + if (extension =3D=3D mips_mach_32_64[i].extension) > > + return base =3D=3D mips_mach_32_64[i].base; > > + > > + return false; > > +} > > > > static bool > > mips_mach_extends_p (unsigned long base, unsigned long extension) > > { > > size_t i; > > > > - if (extension =3D=3D base) > > - return true; > > - > > - if (base =3D=3D bfd_mach_mipsisa32 > > - && mips_mach_extends_p (bfd_mach_mipsisa64, extension)) > > - return true; > > - > > - if (base =3D=3D bfd_mach_mipsisa32r2 > > - && mips_mach_extends_p (bfd_mach_mipsisa64r2, extension)) > > + if (mips_mach_extends_32_64 (base, extension)) > > return true; > > > > for (i =3D 0; i < ARRAY_SIZE (mips_mach_extensions); i++) > > if (extension =3D=3D mips_mach_extensions[i].extension) > > { > > extension =3D mips_mach_extensions[i].base; > > - if (extension =3D=3D base) > > + if (mips_mach_extends_32_64 (base, extension)) > > return true; > > } > > > > -- > > 2.30.2 > >