From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by sourceware.org (Postfix) with ESMTPS id 707F33853837 for ; Fri, 9 Jul 2021 08:01:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 707F33853837 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-lf1-x130.google.com with SMTP id x25so8853586lfu.13 for ; Fri, 09 Jul 2021 01:01:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=P8GsCTfxO2xsl1dPqmY39xXaAF8SxCJFSKSYn4BjUCM=; b=PZrlig9ZdYkjSw/cKSE9r3A9SLylPOD9mx18PukqzuUa7yUciCCxaM6zNvcZTzWKeL /zgae6Aa5PrVpmgiJPG9+9zZclAp72tAo3KUQjTgxqPUHofOk51eLq+jdSKnUDK+yClh CcKH9SVo8zLpgaM04ulYB/lBKzYXgy16ep2SPKw7TPgKIJFrfRYauoDIMe4gvXAiTQW5 VyU+3OqlXBhgoD/mSCiKJ+AI3lhQNgscG9P7DUkVFlCcwHxymmKh1EkYNEuvefSslnPl F6dCw0eUhDMU5E/uWF60ADFcFxBg4XWuEzKBYX5fk1JdohHPPHfO9kpc2UEzxTxUuxi5 BFDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=P8GsCTfxO2xsl1dPqmY39xXaAF8SxCJFSKSYn4BjUCM=; b=s7ow0kkl/ii6ap0LIz9jq/78KQqZAcI1/e/f50MRQHus2l0temhT3mB/RgU8XiqHWj nXfhR+sbi4U4zPDYCWWgYQn0QAr+mdQTvrQR57S5ypPSj3KrItXLmd2di9OtBCLlNGYH s7GA+mDeWDqDq2ptiJKxg2Vs2dkUqhm9rHCUKSkgHFUc1pm+523g+a/jBnpc/NBbNamA d2/WDxJmPNZu9Q54JhGoPxYc2D2b7z0iPC+hjAmBT7iVFSw5nTfN/X/By5zOCCCXt0UQ h9ipRZ1XubVvlrjUvmMO/zeRVXE7pwL7XJUrwdObf8BPGzuC67d3rAbuZDPA4BgBohtZ i3XA== X-Gm-Message-State: AOAM532/y8v8uoctQaRD3AJHRrpLrqntlMAE7VXZCMeBvX+L0Gqa1muM 2S9oOpl0OLpIJP0S8V1kb9OeXTyr1fpLR9tdoDjJKQ== X-Google-Smtp-Source: ABdhPJz1xjCKzn1dXzNiEw9jTkOoSrDo/F8/Lp6P3pwTzihbAaHZLgMa3IGAW+KTlsj31Q05KCXQCvZPep4CU3B+UT8= X-Received: by 2002:a05:6512:3f17:: with SMTP id y23mr27307291lfa.406.1625817707021; Fri, 09 Jul 2021 01:01:47 -0700 (PDT) MIME-Version: 1.0 References: <20210709072825.13709-1-nelson.chu@sifive.com> <20210709072825.13709-4-nelson.chu@sifive.com> In-Reply-To: <20210709072825.13709-4-nelson.chu@sifive.com> From: Kito Cheng Date: Fri, 9 Jul 2021 16:01:36 +0800 Message-ID: Subject: Re: [PATCH v2 3/3] RISC-V: PR27916, Extend .insn directive to support hardcode encoding. To: Nelson Chu Cc: Binutils , gdb-patches@sourceware.org, Jim Wilson , andrew.burgess@embecosm.com, Palmer Dabbelt , Andrew Waterman Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Jul 2021 08:01:50 -0000 This patch is extending new formats of .insn, so I suggest this should be a standalone patch. On Fri, Jul 9, 2021 at 3:28 PM Nelson Chu wrote: > > The .insn directive can let users use their own instructions, or > some new instruction, which haven't supported in the old binutils. > For example, if users want to use sifive cache instruction, they > cannot just write "cflush.d1.l1" in the assembly code, they should > use ".insn i SYSTEM, 0, x0, x10, -0x40". But the .insn directive > may not easy to use for some cases, and not so friendly to users. > Therefore, I believe most of the users will use ".word 0xfc050073", > to encode the instructions directly, rather than use .insn. But > once we have supported the mapping symbols, the .word directives > are marked as data, so disassembler won't dump them as instructions > as usual. I have discussed this with Kito many times, we all think > extend the .insn direcitve to support the hardcode encoding, is the > easiest way to resolve the problem. Therefore, there are two more > .insn formats are proposed as follows, > > (original) .insn , , , ... > .insn , > .insn > > The is string, and the and are constants. > > ChangeLog: > > gas/ > > pr 27916 > * config/tc-riscv.c (riscv_ip_hardcode): Similar to riscv_ip, > but assembles an instruction according to the hardcode values > of .insn directive. > * testsuite/gas/riscv/insn-fail.d: New testcases. > * testsuite/gas/riscv/insn-fail.l: Likewise. > * testsuite/gas/riscv/insn-fail.s: Likewise. > * testsuite/gas/riscv/insn.d: Updated. > * testsuite/gas/riscv/insn.s: Likewise. > --- > gas/config/tc-riscv.c | 57 +++++++++++++++++++++++++++-- > gas/testsuite/gas/riscv/insn-fail.d | 3 ++ > gas/testsuite/gas/riscv/insn-fail.l | 7 ++++ > gas/testsuite/gas/riscv/insn-fail.s | 6 +++ > gas/testsuite/gas/riscv/insn.d | 6 +++ > gas/testsuite/gas/riscv/insn.s | 7 ++++ > 6 files changed, 83 insertions(+), 3 deletions(-) > create mode 100644 gas/testsuite/gas/riscv/insn-fail.d > create mode 100644 gas/testsuite/gas/riscv/insn-fail.l > create mode 100644 gas/testsuite/gas/riscv/insn-fail.s > > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c > index 55c49471825..e9be17f56d1 100644 > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -2922,6 +2922,50 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, > return error; > } > > +/* Similar to riscv_ip, but assembles an instruction according to the > + hardcode values of .insn directive. */ > + > +static const char * > +riscv_ip_hardcode (char *str, > + struct riscv_cl_insn *ip, > + expressionS *imm_expr, > + const char *error) > +{ > + struct riscv_opcode *insn; > + insn_t values[2] = {0, 0}; > + unsigned int num = 0; > + > + input_line_pointer = str; > + do > + { > + expression (imm_expr); > + if (imm_expr->X_op != O_constant) > + { > + /* The first value isn't constant, so it should be > + .insn . Call riscv_ip to parse it. */ > + if (num == 0) > + return error; > + return _("values must be constant"); > + } > + values[num++] = (insn_t) imm_expr->X_add_number; > + } > + while (*input_line_pointer++ == ',' && num < 2); > + > + input_line_pointer--; > + if (*input_line_pointer != '\0') > + return _("unrecognized values"); > + > + insn = XNEW (struct riscv_opcode); > + insn->match = values[num - 1]; > + create_insn (ip, insn); > + unsigned int bytes = riscv_insn_length (insn->match); > + if (values[num - 1] >> (8 * bytes) != 0 > + || (num == 2 && values[0] != bytes)) > + return _("value conflicts with instruction length"); > + > + return NULL; > +} > + > void > md_assemble (char *str) > { > @@ -3914,7 +3958,10 @@ s_riscv_leb128 (int sign) > return s_leb128 (sign); > } > > -/* Parse the .insn directive. */ > +/* Parse the .insn directive. There are three formats, > + Format 1: .insn , , ... > + Format 2: .insn , > + Format 3: .insn . */ > > static void > s_riscv_insn (int x ATTRIBUTE_UNUSED) > @@ -3935,11 +3982,15 @@ s_riscv_insn (int x ATTRIBUTE_UNUSED) > > const char *error = riscv_ip (str, &insn, &imm_expr, > &imm_reloc, insn_type_hash); > - > if (error) > { > - as_bad ("%s `%s'", error, str); > + char *save_in = input_line_pointer; > + error = riscv_ip_hardcode (str, &insn, &imm_expr, error); > + input_line_pointer = save_in; > } > + > + if (error) > + as_bad ("%s `%s'", error, str); > else > { > gas_assert (insn.insn_mo->pinfo != INSN_MACRO); > diff --git a/gas/testsuite/gas/riscv/insn-fail.d b/gas/testsuite/gas/riscv/insn-fail.d > new file mode 100644 > index 00000000000..3548e85415a > --- /dev/null > +++ b/gas/testsuite/gas/riscv/insn-fail.d > @@ -0,0 +1,3 @@ > +#as: > +#source: insn-fail.s > +#error_output: insn-fail.l > diff --git a/gas/testsuite/gas/riscv/insn-fail.l b/gas/testsuite/gas/riscv/insn-fail.l > new file mode 100644 > index 00000000000..e47d106b39b > --- /dev/null > +++ b/gas/testsuite/gas/riscv/insn-fail.l > @@ -0,0 +1,7 @@ > +.*Assembler messages: > +.*Error: unrecognized opcode `r,0x00000013' > +.*Error: values must be constant `0x4,rs1' > +.*Error: unrecognized values `0x4 0x5' > +.*Error: unrecognized values `0x4,0x5,0x6' > +.*Error: value conflicts with instruction length `0x4,0x0001' > +.*Error: value conflicts with instruction length `0x2,0x00000013' > diff --git a/gas/testsuite/gas/riscv/insn-fail.s b/gas/testsuite/gas/riscv/insn-fail.s > new file mode 100644 > index 00000000000..064211d985d > --- /dev/null > +++ b/gas/testsuite/gas/riscv/insn-fail.s > @@ -0,0 +1,6 @@ > + .insn r, 0x00000013 > + .insn 0x4, rs1 > + .insn 0x4 0x5 > + .insn 0x4, 0x5, 0x6 > + .insn 0x4, 0x0001 > + .insn 0x2, 0x00000013 > diff --git a/gas/testsuite/gas/riscv/insn.d b/gas/testsuite/gas/riscv/insn.d > index 8cb3d64b1a5..4edacc63368 100644 > --- a/gas/testsuite/gas/riscv/insn.d > +++ b/gas/testsuite/gas/riscv/insn.d > @@ -69,3 +69,9 @@ Disassembly of section .text: > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > +[^:]+:[ ]+0001[ ]+nop > +[^:]+:[ ]+00000013[ ]+nop > +[^:]+:[ ]+00000057[ ]+0x57 > +[^:]+:[ ]+0001[ ]+nop > +[^:]+:[ ]+00000013[ ]+nop > +[^:]+:[ ]+00000057[ ]+0x57 > diff --git a/gas/testsuite/gas/riscv/insn.s b/gas/testsuite/gas/riscv/insn.s > index 937ad119ff2..84739056b1a 100644 > --- a/gas/testsuite/gas/riscv/insn.s > +++ b/gas/testsuite/gas/riscv/insn.s > @@ -53,3 +53,10 @@ target: > .insn r 0x33, 0, 0, fa0, a1, fa2 > .insn r 0x33, 0, 0, a0, fa1, fa2 > .insn r 0x33, 0, 0, fa0, fa1, fa2 > + > + .insn 0x0001 > + .insn 0x00000013 > + .insn 0x00000057 > + .insn 0x2, 0x0001 > + .insn 0x4, 0x00000013 > + .insn 0x4, 0x00000057 > -- > 2.30.2 >