From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by sourceware.org (Postfix) with ESMTPS id 1F605385AFA4 for ; Tue, 25 Jul 2023 13:28:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1F605385AFA4 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-pg1-x52f.google.com with SMTP id 41be03b00d2f7-56345ab18b0so2703319a12.3 for ; Tue, 25 Jul 2023 06:28:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1690291684; x=1690896484; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=jy+0mVqvhihoUI4QkMqFNrMX1YpH05tQNVC85GzcpXQ=; b=IuhQfRoBwfm0Xt0zOez2s3V9ikuqI0ziTKFNol5Xea06hdaG3zHSq7SQcm/yjMuXOT It/Fg1H+E5xqZ6OZkjhDHZj9xB10Q62RBHtQJ5nxToR81RnXTdfaAxs8HD3Jh5rae4aC ApJsH1zP1rHpfEVPRomqL15uKLCmbScykuZaMc1F0N/UyI0yauzpcr4XpPZrNc9kSRV1 QqYWOqFQyIEg9FxkYGgPPKO4UHpNw7U294Zl/b2HZwrgD4Ghxn8HD4KoY7bLhUWrKKf6 LL4F6VpZFTB13QgCYTBiV4zLbPJx5oJvLvRR5SJN+kow+qzOVMN8gKgz2gbrwEYk1GgS Y1sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690291684; x=1690896484; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jy+0mVqvhihoUI4QkMqFNrMX1YpH05tQNVC85GzcpXQ=; b=OaEyGtPS/ExSDsvnZxs/JZx7duIkzvXtAM84pTCx7PBzn/FjS07EglxqzXjOpQMzpr DVWr5IlfAUe0ElNInorAKCLAAQ3S5WOAZH+N6r3JhVHtZ8C2Tof/YBoA0WXSTUL6H9VS CMH9YQpYN6GPlCgU1zxBnKAUCR7N1DZ0S0V+t6RS66dmPBwNsR885JPdkGrX/r37ba2e QTjlMVE7Rl6KHnHmKWCcB8LzuAcq04QFvn6cNtmn5ZoOcbfwWys9ifsWdSz64us/T+c7 6nRoM7eHv6pmN3yJ+eG0Ilj4d9idgJg+9/xLynDY7ZZZ0GOPraZgDgL4lwVAJqa76Vr3 4yFw== X-Gm-Message-State: ABy/qLZNmMtlvumlj+DuWpPRmLAAjcTkGn/+uijkJbMbM4i6m99EEEUZ YERMqpyGdZD+am4EZFpQKgBE8hWT3FmokOn0DMynbHxHV5au+Uh4HLs0vA== X-Google-Smtp-Source: APBJJlE0YpR11GGlUXEcjim6C+zOkA893W8GR/e39MBvno++PwTXWLrr0zAQbzROpqab+SdodfRebesV3YA9nuv45hg= X-Received: by 2002:a17:90b:357:b0:268:2311:e8d8 with SMTP id fh23-20020a17090b035700b002682311e8d8mr3353453pjb.17.1690291683699; Tue, 25 Jul 2023 06:28:03 -0700 (PDT) MIME-Version: 1.0 References: <9a77cb454bd020e0010fc02543e3d3ae7564eb79.1690251857.git.research_trasio@irq.a4lg.com> In-Reply-To: <9a77cb454bd020e0010fc02543e3d3ae7564eb79.1690251857.git.research_trasio@irq.a4lg.com> From: Kito Cheng Date: Tue, 25 Jul 2023 21:27:52 +0800 Message-ID: Subject: Re: [PATCH 2/2] RISC-V: Add "lp64e" ABI support To: Tsukasa OI Cc: Nelson Chu , Palmer Dabbelt , binutils@sourceware.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Reviewed-by: Kito Cheng On Tue, Jul 25, 2023 at 10:27=E2=80=AFAM Tsukasa OI wrote: > > From: Tsukasa OI > > Since RV32E and RV64E are now ratified, this commit prepares the ABI > support for LP64E (LP64 with reduced GPRs). > > gas/ChangeLog: > > * config/tc-riscv.c (riscv_set_abi_by_arch): Update the error > message. (md_parse_option): Accept "lp64e". > * doc/c-riscv.texi: Update the documentation to allow "lp64e". > * testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l: > Change error message. > * testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l: Likewise. > * testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l: Likewise. > --- > gas/config/tc-riscv.c | 4 +++- > gas/doc/c-riscv.texi | 5 ++--- > gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l | 2 +- > gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l | 2 +- > gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l | 2 +- > 5 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c > index 80c14a3cd221..963f9967638f 100644 > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -384,7 +384,7 @@ riscv_set_abi_by_arch (void) > as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, x= len); > > if (riscv_subset_supports (&riscv_rps_as, "e") && !rve_abi) > - as_bad ("only the ilp32e ABI is supported for e extension"); > + as_bad ("only ilp32e/lp64e ABI are supported for e extension"); > > if (float_abi =3D=3D FLOAT_ABI_SINGLE > && !riscv_subset_supports (&riscv_rps_as, "f")) > @@ -3897,6 +3897,8 @@ md_parse_option (int c, const char *arg) > riscv_set_abi (32, FLOAT_ABI_QUAD, false); > else if (strcmp (arg, "lp64") =3D=3D 0) > riscv_set_abi (64, FLOAT_ABI_SOFT, false); > + else if (strcmp (arg, "lp64e") =3D=3D 0) > + riscv_set_abi (64, FLOAT_ABI_SOFT, true); > else if (strcmp (arg, "lp64f") =3D=3D 0) > riscv_set_abi (64, FLOAT_ABI_SINGLE, false); > else if (strcmp (arg, "lp64d") =3D=3D 0) > diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi > index b175ba0a7293..e7fdbfa22afb 100644 > --- a/gas/doc/c-riscv.texi > +++ b/gas/doc/c-riscv.texi > @@ -65,9 +65,8 @@ aren't set, then assembler will check the default confi= gure setting > @item -mabi=3DABI > Selects the ABI, which is either "ilp32" or "lp64", optionally followed > by "f", "d", or "q" to indicate single-precision, double-precision, or > -quad-precision floating-point calling convention, or none to indicate > -the soft-float calling convention. Also, "ilp32" can optionally be foll= owed > -by "e" to indicate the RVE ABI, which is always soft-float. > +quad-precision floating-point calling convention, or none or "e" to indi= cate > +the soft-float calling convention ("e" indicates a soft-float RVE ABI). > > @cindex @samp{-mrelax} option, RISC-V > @item -mrelax > diff --git a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l b/gas/testsu= ite/gas/riscv/mabi-fail-rv32e-lp64d.l > index f7306cb24d20..419a01d5d53a 100644 > --- a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l > +++ b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l > @@ -1,4 +1,4 @@ > .*Assembler messages: > .*Error: can't have 64-bit ABI on 32-bit ISA > -.*Error: only the ilp32e ABI is supported for e extension > +.*Error: only ilp32e/lp64e ABI are supported for e extension > .*Error: ilp32d/lp64d ABI can't be used when d extension isn't supported > diff --git a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l b/gas/testsu= ite/gas/riscv/mabi-fail-rv32e-lp64f.l > index 706690ac9c64..7b2fcda8d685 100644 > --- a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l > +++ b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l > @@ -1,4 +1,4 @@ > .*Assembler messages: > .*Error: can't have 64-bit ABI on 32-bit ISA > -.*Error: only the ilp32e ABI is supported for e extension > +.*Error: only ilp32e/lp64e ABI are supported for e extension > .*Error: ilp32f/lp64f ABI can't be used when f extension isn't supported > diff --git a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l b/gas/testsu= ite/gas/riscv/mabi-fail-rv32e-lp64q.l > index ab64b1546f63..a06e9ea1aa93 100644 > --- a/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l > +++ b/gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l > @@ -1,4 +1,4 @@ > .*Assembler messages: > .*Error: can't have 64-bit ABI on 32-bit ISA > -.*Error: only the ilp32e ABI is supported for e extension > +.*Error: only ilp32e/lp64e ABI are supported for e extension > .*Error: ilp32q/lp64q ABI can't be used when q extension isn't supported > -- > 2.41.0 >