* Help needed - to add custom instruction to binutils-gdb @ 2021-06-06 1:33 Vijay Kumar Salian 2021-06-07 18:40 ` Jim Wilson 0 siblings, 1 reply; 5+ messages in thread From: Vijay Kumar Salian @ 2021-06-06 1:33 UTC (permalink / raw) To: binutils Hello, Greetings. I need some help from you. I tried adding a new instruction to binutils-gdb. I was able to add the instruction to assembler and could even assemble the assembly code with new instructions. But then I tried to disassemble the ELF file to see the instruction, which displayed some other name for the instruction mnemonic. Can you please let me know where I can get the details on adding the new instructions for risc-v? Thanks & , Vijay ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Help needed - to add custom instruction to binutils-gdb 2021-06-06 1:33 Help needed - to add custom instruction to binutils-gdb Vijay Kumar Salian @ 2021-06-07 18:40 ` Jim Wilson [not found] ` <CAM-80kgSs7XOmdCA7_0ehcbuUKpAJf2hwQej7J03FR5zr4eEQg@mail.gmail.com> 0 siblings, 1 reply; 5+ messages in thread From: Jim Wilson @ 2021-06-07 18:40 UTC (permalink / raw) To: salianvk; +Cc: Binutils On Sat, Jun 5, 2021 at 6:34 PM Vijay Kumar Salian via Binutils < binutils@sourceware.org> wrote: > I tried adding a new instruction to binutils-gdb. I was able to add the > instruction to assembler and could even assemble the assembly code with new > instructions. But then I tried to disassemble the ELF file to see the > instruction, which displayed some other name for the instruction mnemonic. > Can you please let me know where I can get the details on adding the new > instructions for risc-v? > It would help if you showed your patch, or at least explained what your patch is doing. Without the patch, all we can do is guess. Perhaps you accidentally used the same encoding as another instruction? There is no guide for how to add an instruction, and the exact process sometimes changes as the binutils sources continue to evolve. The basic process doesn't change though. An example of a discussion can be found here https://github.com/riscv/riscv-binutils-gdb/issues/250 Jim ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <CAM-80kgSs7XOmdCA7_0ehcbuUKpAJf2hwQej7J03FR5zr4eEQg@mail.gmail.com>]
[parent not found: <CAFyWVaYBhS30pqYVtp9keTOuBwb+Kq=zaRRniJ-aVeDZhBqZbg@mail.gmail.com>]
* Re: Help needed - to add custom instruction to binutils-gdb [not found] ` <CAFyWVaYBhS30pqYVtp9keTOuBwb+Kq=zaRRniJ-aVeDZhBqZbg@mail.gmail.com> @ 2021-06-21 7:30 ` Vijay Kumar Salian 2021-06-21 8:12 ` Nelson Chu 0 siblings, 1 reply; 5+ messages in thread From: Vijay Kumar Salian @ 2021-06-21 7:30 UTC (permalink / raw) To: Jim Wilson, binutils Hi, Below are the steps that I followed to add new custom instructions to binutils. 1. Identified the instruction to add as "z.rol". 2. Add the below match and mask macros to riscv-gnu-toolchain/riscv- binutils/include/opcode/riscv-opc.h #define MATCH_Z_ROL 0x6057 #define MASK_Z_ROL 0xfe00707f 3. Add the below macro to riscv-gnu-toolchain/riscv- binutils/include/opcode/riscv-opc.h DECLARE_INSN(z_rol, MATCH_Z_ROL, MASK_Z_ROL) 4. Add new entry into const struct riscv_opcode riscv_opcodes[] in file riscv-gnu-toolchain/riscv-binutils/opcodes/riscv-opc.c {"z.rol", 0, INSN_CLASS_I, "d,s,t", MATCH_Z_ROL, MASK_Z_ROL, match_opcode, 0}, 5. Compile the toolchain and test the assembly code with new instructions. The new instruction addition worked ONLY when the new entries were made at the top of *const struct riscv_opcode riscv_opcodes[]*. But when I tried to add the new entries at the *end* of *const struct riscv_opcode riscv_opcodes[],* then toolchain compilation gave a lot of errors during compilation and some of the GCC tools did not get compiled. Please let me know if there is any order in which the new entries to be inserted tinto *const struct riscv_opcode riscv_opcodes[]*? Note: I added the binutils mailing list again. -- Thanks & Regards, Vijay On Wed, 9 Jun 2021 at 01:13, Jim Wilson <jimw@sifive.com> wrote: > On Tue, Jun 8, 2021 at 5:53 AM Vijay Kumar Salian <salianvk@gmail.com> > wrote: > >> Thank you for the email. >> > > You dropped the mailing list again. > >> >> For this, I modified below 2 files: >> 1. In file : riscv-gnu-toolchain/riscv-binutils/opcodes/riscv-opc.c, >> added below line: >> 2. In file : >> riscv-gnu-toolchain/riscv-binutils/include/opcode/riscv-opc.h, added below >> lines: >> > > Those are the right files to modify. > > The I compiled the entire riscv-gnu-toolchain and tried running a C code >> (using spike riscv simulator) that >> has following instructions and it compiled without error and even I could >> disassemble and see the instructions. >> > > In the mailing list you said disassembling didn't work. Now it does? Did > you change something? > >> Please let me know if this is the correct way to add new instructions. Am >> I missing anything here or do I need to modify more files? >> > > Yes, that looks like reasonable changes. > > Jim > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Help needed - to add custom instruction to binutils-gdb 2021-06-21 7:30 ` Vijay Kumar Salian @ 2021-06-21 8:12 ` Nelson Chu 2021-06-21 11:51 ` Vijay Kumar Salian 0 siblings, 1 reply; 5+ messages in thread From: Nelson Chu @ 2021-06-21 8:12 UTC (permalink / raw) To: salianvk; +Cc: Jim Wilson, Binutils On Mon, Jun 21, 2021 at 3:31 PM Vijay Kumar Salian via Binutils <binutils@sourceware.org> wrote: > > Hi, > > Below are the steps that I followed to add new custom instructions to > binutils. > > 1. Identified the instruction to add as "z.rol". > > 2. Add the below match and mask macros to riscv-gnu-toolchain/riscv- > binutils/include/opcode/riscv-opc.h > #define MATCH_Z_ROL 0x6057 > #define MASK_Z_ROL 0xfe00707f > > 3. Add the below macro to riscv-gnu-toolchain/riscv- > binutils/include/opcode/riscv-opc.h > DECLARE_INSN(z_rol, MATCH_Z_ROL, MASK_Z_ROL) > > 4. Add new entry into const struct riscv_opcode riscv_opcodes[] in file > riscv-gnu-toolchain/riscv-binutils/opcodes/riscv-opc.c > > {"z.rol", 0, INSN_CLASS_I, "d,s,t", MATCH_Z_ROL, MASK_Z_ROL, > match_opcode, 0}, The steps are correct. > 5. Compile the toolchain and test the assembly code with new instructions. > > The new instruction addition worked ONLY when the new entries were made at > the top of *const struct riscv_opcode riscv_opcodes[]*. But when I tried to > add the new entries at the *end* of *const struct riscv_opcode > riscv_opcodes[],* then toolchain compilation gave a lot of errors during > compilation and some of the GCC tools did not get compiled. The order does affect the results, but the premise is that the encoding has overlap, or the new instructions are the aliases of others which had existed. I can get your expected result when adding the z.rol at the end of riscv_opcodes, so it should not be the order problem for your example. nelson@LAPTOP-QFSGI1F2:~/test$ cat tmp.s .word 0x6057 z.rol a0, a1, a2 nelson@LAPTOP-QFSGI1F2:~/test$ riscv64-unknown-elf-as tmp.s -o tmp.o nelson@LAPTOP-QFSGI1F2:~/test$ riscv64-unknown-elf-objdump -d tmp.o tmp.o: file format elf64-littleriscv Disassembly of section .text: 0000000000000000 <.text>: 0: 00006057 z.rol zero,zero,zero 4: 00c5e557 z.rol a0,a1,a2 Thanks Nelson ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Help needed - to add custom instruction to binutils-gdb 2021-06-21 8:12 ` Nelson Chu @ 2021-06-21 11:51 ` Vijay Kumar Salian 0 siblings, 0 replies; 5+ messages in thread From: Vijay Kumar Salian @ 2021-06-21 11:51 UTC (permalink / raw) To: Nelson Chu; +Cc: Jim Wilson, Binutils Hi, Thank you for the email. Does the "encoding overlap" mean that the *MATCH_** macro values of 2 instructions are the same? I have to check this once since I have added other instructions too. I am using the riscv toolchain from this link: https://github.com/riscv/riscv-gnu-toolchain I hope this is the right toolchain for risc-v. -- Thanks & Regards, Vijay On Mon, 21 Jun 2021 at 13:42, Nelson Chu <nelson.chu@sifive.com> wrote: > On Mon, Jun 21, 2021 at 3:31 PM Vijay Kumar Salian via Binutils > <binutils@sourceware.org> wrote: > > > > Hi, > > > > Below are the steps that I followed to add new custom instructions to > > binutils. > > > > 1. Identified the instruction to add as "z.rol". > > > > 2. Add the below match and mask macros to riscv-gnu-toolchain/riscv- > > binutils/include/opcode/riscv-opc.h > > #define MATCH_Z_ROL 0x6057 > > #define MASK_Z_ROL 0xfe00707f > > > > 3. Add the below macro to riscv-gnu-toolchain/riscv- > > binutils/include/opcode/riscv-opc.h > > DECLARE_INSN(z_rol, MATCH_Z_ROL, MASK_Z_ROL) > > > > 4. Add new entry into const struct riscv_opcode riscv_opcodes[] in file > > riscv-gnu-toolchain/riscv-binutils/opcodes/riscv-opc.c > > > > {"z.rol", 0, INSN_CLASS_I, "d,s,t", MATCH_Z_ROL, MASK_Z_ROL, > > match_opcode, 0}, > > The steps are correct. > > > 5. Compile the toolchain and test the assembly code with new > instructions. > > > > The new instruction addition worked ONLY when the new entries were made > at > > the top of *const struct riscv_opcode riscv_opcodes[]*. But when I tried > to > > add the new entries at the *end* of *const struct riscv_opcode > > riscv_opcodes[],* then toolchain compilation gave a lot of errors during > > compilation and some of the GCC tools did not get compiled. > > The order does affect the results, but the premise is that the > encoding has overlap, or the new instructions are the aliases of > others which had existed. I can get your expected result when adding > the z.rol at the end of riscv_opcodes, so it should not be the order > problem for your example. > > nelson@LAPTOP-QFSGI1F2:~/test$ cat tmp.s > .word 0x6057 > z.rol a0, a1, a2 > nelson@LAPTOP-QFSGI1F2:~/test$ riscv64-unknown-elf-as tmp.s -o tmp.o > nelson@LAPTOP-QFSGI1F2:~/test$ riscv64-unknown-elf-objdump -d tmp.o > > tmp.o: file format elf64-littleriscv > > > Disassembly of section .text: > > 0000000000000000 <.text>: > 0: 00006057 z.rol zero,zero,zero > 4: 00c5e557 z.rol a0,a1,a2 > > > Thanks > Nelson > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-06-21 11:51 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-06-06 1:33 Help needed - to add custom instruction to binutils-gdb Vijay Kumar Salian 2021-06-07 18:40 ` Jim Wilson [not found] ` <CAM-80kgSs7XOmdCA7_0ehcbuUKpAJf2hwQej7J03FR5zr4eEQg@mail.gmail.com> [not found] ` <CAFyWVaYBhS30pqYVtp9keTOuBwb+Kq=zaRRniJ-aVeDZhBqZbg@mail.gmail.com> 2021-06-21 7:30 ` Vijay Kumar Salian 2021-06-21 8:12 ` Nelson Chu 2021-06-21 11:51 ` Vijay Kumar Salian
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