From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vs1-xe31.google.com (mail-vs1-xe31.google.com [IPv6:2607:f8b0:4864:20::e31]) by sourceware.org (Postfix) with ESMTPS id 859153858D38 for ; Mon, 22 Apr 2024 04:09:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 859153858D38 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 859153858D38 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::e31 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713758989; cv=none; b=xp4b6rD8veisa3uDbduAuTgDU2OVkAW5lvaPhK/dcGlKhfnPKriVyoDX2dgozTFlyYT5mBd28KbbMUM2TTsCqX3nAgnWO3Wq8N7RH37XkmcPNpc+4r4WYhR7G0+6FYILdJh4SSei1rERMJhpZ4VcsFYbDiMlvgdKQOgm45MZh74= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713758989; c=relaxed/simple; bh=I4KpB8jV2fHz3zfx37KRtscxoqjY+7o2UGFcutI3syQ=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=wM4Dkveet8GQUjEYgAJcJwTy9W0XZF5G7T2GAdh8A1KRTOHlE5AAZqiYyxtOC1GP9lcY2uvzxxYBzTRj4g3XdIw07AUJfD3O7nanvB2hoxEUbYNYoqY2olccWGAiEuQpFgiJW+tlEV/JrKQxSV9Pzi6yqMZPxm13u9EOlNwNaXk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-vs1-xe31.google.com with SMTP id ada2fe7eead31-47a21e0cde6so1551039137.0 for ; Sun, 21 Apr 2024 21:09:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713758987; x=1714363787; darn=sourceware.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=VtXA/xDCH3PnN7fVPFy3qZ+H57oihBtUNZ36zGWWiPA=; b=ju/uj+ExrX/68LvmrfnROQ0CwJvRZl+m/wWNVHjk9K8/xlwDByJSI39RSR0A3LpT8H pTLJnQswQN3kLePeLv+eJkQAIxMlv5qhtn2R4PQgIDuYnpOjKSUgtBazGDwJAKjuhEzw YS8Tj1x3PiT9Y3J31ufL+OEGO5bGPBp1fEoJkXuuIDhk3Wl+7fkEBggPyPjq+Cr84JC4 GUqku2e36qWsh6ZIkPjwRK19ISmNkVVSurIJn0V6YVJ1Pzt9xPcxGGA0DKiRGdnkVUl9 nguIDs0c4sW/82YaX25OZJZGChyl3FiUSGu+ig9ic1dP7mmcg55MZG/+P3bMHiOZlyi7 hKQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713758987; x=1714363787; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VtXA/xDCH3PnN7fVPFy3qZ+H57oihBtUNZ36zGWWiPA=; b=P7Pl/i3O6BbBDSBWQFltDq6iRjbGvHnZtN0kwmTK59n4KCtp2045E+Tzkp3Y8RJ2uJ +E3JcsL0d/WChOLSHX9+RGVyPJf/uI89igPyk6Rw42quUsHmt46kS01w/miJB7hcXWgv a95653oYPwqdjDgPX3v65IE7WzSCFDlC8vOe2GEpxKC7JK91UHalc2NPBIyx1XlOif5A UTM0XkHaXkGB/pC9U1/DcLMzTMHKQrXhQW/1JdjOfg1f927V4Q6n1Djl1bLpZqPeKWR/ eHUHj2/ff6D9Pw7FNIQYUPw0Xj2tOsfzKow50OXM4LUNa6zEH6LjPP81dCD5vevUQxgj ELPg== X-Gm-Message-State: AOJu0YxPM7CEnnKTR+Rb/blRwoSX8yUUieSiWjV3chL497jmoN07Qiaa JNkUFn6JzFDDCeUYfLTIG+wtMDItDH/Xx4Z3tlPLU/UqCzU4q2AMmheW+IyYm3AU6DUIHiJirld sl3EW1+QIPQJKENk1qhkEsPk9w2o= X-Google-Smtp-Source: AGHT+IFYgftNnOvT525WIuoFcvqnnKEk2x/iOyrtkxCTqLmk5iTnE+ThTYmvmqxT7rkIOZEiQYejPjQmfeNZRPzX23M= X-Received: by 2002:a67:f414:0:b0:47b:a44d:1ca5 with SMTP id p20-20020a67f414000000b0047ba44d1ca5mr10446953vsn.10.1713758986800; Sun, 21 Apr 2024 21:09:46 -0700 (PDT) MIME-Version: 1.0 References: <117c9c1f-795e-41f9-b582-b8477b42bebd@suse.com> In-Reply-To: <117c9c1f-795e-41f9-b582-b8477b42bebd@suse.com> From: Hongtao Liu Date: Mon, 22 Apr 2024 12:09:35 +0800 Message-ID: Subject: Re: [PATCH] x86/Intel: SHLD/SHRD have dual meaning To: Jan Beulich Cc: Binutils , "H.J. Lu" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Apr 19, 2024 at 5:29=E2=80=AFPM Jan Beulich wro= te: > > Since we uniformly permit D suffixes in Intel mode whenever in AT&T mode > an L suffix may be used, we need to be consistent with this. I think we need to forbid the D suffix for APX NDD SHL/SHR under Intel mode to avoid ambiguity. Neither SHL (always SAL), nor SHR with a D suffix (Intel mode) is generated by GCC. > > Take the easy route, despite that still leading to an anomaly which is > also visible from the new testcase: > > shld eax, ecx, 1 > shld eax, ecx, cl > > can mean two things with APX: SHL with a D suffix in NDD EVEX encoding, > or the traditional SHLD in legacy encoding. > --- > The alternative, more intrusive and more risky (in terms of perceived or > even real regressions) route would be to mark the few insns which permit > suffixes even in Intel syntax, and reject suffix uses when that > indicator isn't set. > > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -5389,7 +5389,7 @@ static void init_globals (void) > } > > /* Helper for md_assemble() to decide whether to prepare for a possible = 2nd > - parsing pass. Instead of introducing a rarely use new insn attribute = this > + parsing pass. Instead of introducing a rarely used new insn attribute= this > utilizes a common pattern between affected templates. It is deemed > acceptable that this will lead to unnecessary pass 2 preparations in = a > limited set of cases. */ > @@ -5401,7 +5401,10 @@ static INLINE bool may_need_pass2 (const > : (t->opcode_space =3D=3D SPACE_0F > && (t->base_opcode | 1) =3D=3D 0xbf) > || (t->opcode_space =3D=3D SPACE_BASE > - && t->base_opcode =3D=3D 0x63); > + && t->base_opcode =3D=3D 0x63) > + || (intel_syntax /* shld / shrd may mean suffixed shl / shr. = */ > + && t->opcode_space =3D=3D SPACE_EVEXMAP4 > + && (t->base_opcode | 8) =3D=3D 0x2c); > } > > #if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF) > --- /dev/null > +++ b/gas/testsuite/gas/i386/intel-suffix.d > @@ -0,0 +1,34 @@ > +#objdump: -dw > +#name: Intel syntax w/ suffixes > + > +.*: +file format .* > + > +Disassembly of section \.text: > +0+0 <.*>: > +[ ]*[a-f0-9]+: 0f a4 c8 01[ ]+shld \$0x1,%ecx,%eax > +[ ]*[a-f0-9]+: 0f a5 c8[ ]+shld %cl,%ecx,%eax > +[ ]*[a-f0-9]+: d1 e1[ ]+shl \$1,%ecx > +[ ]*[a-f0-9]+: d3 e1[ ]+shl %cl,%ecx > +[ ]*[a-f0-9]+: 62 f4 7c 18 d1 e1[ ]+shl \$1,%ecx,%eax > +[ ]*[a-f0-9]+: 62 f4 7c 18 d3 e1[ ]+shl %cl,%ecx,%eax > +[ ]*[a-f0-9]+: d1 e1[ ]+shl \$1,%ecx > +[ ]*[a-f0-9]+: d3 e1[ ]+shl %cl,%ecx > +[ ]*[a-f0-9]+: 62 f4 7c 18 d1 c1[ ]+rol \$1,%ecx,%eax > +[ ]*[a-f0-9]+: 62 f4 7c 18 d3 c1[ ]+rol %cl,%ecx,%eax > +[ ]*[a-f0-9]+: d1 c1[ ]+rol \$1,%ecx > +[ ]*[a-f0-9]+: d3 c1[ ]+rol %cl,%ecx > + > +0+[0-9a-f]+ <.*>: > +[ ]*[a-f0-9]+: 0f ac c8 01[ ]+shrd \$0x1,%ecx,%eax > +[ ]*[a-f0-9]+: 0f ad c8[ ]+shrd %cl,%ecx,%eax > +[ ]*[a-f0-9]+: d1 e9[ ]+shr \$1,%ecx > +[ ]*[a-f0-9]+: d3 e9[ ]+shr %cl,%ecx > +[ ]*[a-f0-9]+: 62 f4 7c 18 d1 f9[ ]+sar \$1,%ecx,%eax > +[ ]*[a-f0-9]+: 62 f4 7c 18 d3 f9[ ]+sar %cl,%ecx,%eax > +[ ]*[a-f0-9]+: d1 f9[ ]+sar \$1,%ecx > +[ ]*[a-f0-9]+: d3 f9[ ]+sar %cl,%ecx > +[ ]*[a-f0-9]+: 62 f4 7c 18 d1 c9[ ]+ror \$1,%ecx,%eax > +[ ]*[a-f0-9]+: 62 f4 7c 18 d3 c9[ ]+ror %cl,%ecx,%eax > +[ ]*[a-f0-9]+: d1 c9[ ]+ror \$1,%ecx > +[ ]*[a-f0-9]+: d3 c9[ ]+ror %cl,%ecx > +#pass > --- /dev/null > +++ b/gas/testsuite/gas/i386/intel-suffix.s > @@ -0,0 +1,39 @@ > + .intel_syntax noprefix > + .text > +left: > + shld eax, ecx, 1 > + shld eax, ecx, cl > + > + shld ecx, 1 > + shld ecx, cl > + > + sald eax, ecx, 1 > + sald eax, ecx, cl > + > + sald ecx, 1 > + sald ecx, cl > + > + rold eax, ecx, 1 > + rold eax, ecx, cl > + > + rold ecx, 1 > + rold ecx, cl > + > +right: > + shrd eax, ecx, 1 > + shrd eax, ecx, cl > + > + shrd ecx, 1 > + shrd ecx, cl > + > + sard eax, ecx, 1 > + sard eax, ecx, cl > + > + sard ecx, 1 > + sard ecx, cl > + > + rord eax, ecx, 1 > + rord eax, ecx, cl > + > + rord ecx, 1 > + rord ecx, cl > --- a/gas/testsuite/gas/i386/x86-64.exp > +++ b/gas/testsuite/gas/i386/x86-64.exp > @@ -160,6 +160,7 @@ run_dump_test "x86-64-disp-intel" > run_list_test "disp-imm-64" > run_dump_test "intel-movs64" > run_dump_test "intel-cmps64" > +run_dump_test "intel-suffix" > run_dump_test "x86-64-disp32" > run_dump_test "rexw" > run_list_test "x86-64-specific-reg" --=20 BR, Hongtao