From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by sourceware.org (Postfix) with ESMTPS id E7A7C3858D20 for ; Wed, 9 Nov 2022 20:18:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E7A7C3858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x52b.google.com with SMTP id 21so36863edv.3 for ; Wed, 09 Nov 2022 12:18:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=uAxRnYIq2YC6Do2eAnlCgmJpqGm+i3xqM2We2M8sP5I=; b=dyjtWvwXarqxTHHXkjiP9qbK/bgtrq8fSOcl3pB3RVfXt52eq9OWRwkAwPPCxFaJ61 kfqY4zoy86TYBEtug2+f5wPdHll7g79MrVWejT7Kdcy3TzA+qqbN2KiDqzUwDf3Wdsxe 7iV8deVQelKKf2sQIINGvFvJBzD3yxl8+DKzwUuKAQKMK04DMtBcqNxRWjnexjhvuWE3 2SC7AVzqzWUignveBswRfCXrahfWd6C3EUupTl5nPhKoxTB4rew5nFa1JHacvpFUOV8L bFyzwv7lYbbk1cHkn5E+YuscKxEiLWSnwjKHallMTfaWaxA9tYWsK0WUk86ElEfLieSr jOdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=uAxRnYIq2YC6Do2eAnlCgmJpqGm+i3xqM2We2M8sP5I=; b=K5HvoiG31a3CCsIpCLt7c/s5hfViBgc2X4Gqv8Mw27CoEmUf2+Qfjayd2kHPnKHILE brj6GKUvpG8rW5LadjzoaIVw979uCh27xsh4H8GVDmiG9O6GSzomd/NfWKHv7tK7OoeM cUlRpU8eCk9fb9HY6XrYPRK0Kwj9HkE5xmDeNeNNty/P8V9P1lWn9cBE9DsYp3RyI0G2 ew61DBgBjOhJwOuauzUUum79NIagU23L1XEumIPTbYpiE67YqWPAHb/yEA2Ktbc1Lsca M1x+1ldDWBpuQZhwlI8pikgNTUUfpZtl2fgW/1RK4JdCMhqBJmnCgL/uPlQ6FWiNLbay 8zTg== X-Gm-Message-State: ACrzQf1FiREJJAa6/OmaO20BamSKUhJpUWH8TWA8siKwoICwy6lhzIMF zRrdzCyuMR+WM/6TJgo3CZsONbP9DJYJluGldjVACw41 X-Google-Smtp-Source: AMsMyM6rCcEVWDSHDZIrxb5SwPvUx6I2d8l4AD7MyoxUHyEM80w6fIpKc2WZP0dFtIMg7Ys6Hu/qpVmKGZfBSoF4RxA= X-Received: by 2002:a05:6402:b56:b0:461:91aa:11b7 with SMTP id bx22-20020a0564020b5600b0046191aa11b7mr62505624edb.220.1668025137264; Wed, 09 Nov 2022 12:18:57 -0800 (PST) MIME-Version: 1.0 References: <28044500-4513-3d31-db60-946f873524ae@suse.com> In-Reply-To: From: "H.J. Lu" Date: Wed, 9 Nov 2022 12:18:19 -0800 Message-ID: Subject: Re: [PATCH] Add znver4 processor support To: "Joshi, Tejas Sanjay" Cc: Jan Beulich , "binutils@sourceware.org" , "Gopalasubramanian, Ganesh" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3023.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, Nov 8, 2022 at 11:14 PM Joshi, Tejas Sanjay wrote: > > [AMD Official Use Only - General] > > Hi, > > (Inlining the comments from other thread here for the correct subject line.) > > > That's what the 3-operand form is intended for. For insns like this we mean to allow a shorthand > > (here: no operands) and a variant with _all_ operands spelled out. There's no need for "half" a shorthand. > > See also H.J.'s response. And note how you already don't test the 1-operand form. > > Understood. I have removed the single operand rmpquery instruction in this patch. > > > I see you's corrected the changelog entry, but as previously pointed out it's unclear what you add > > CPU_RMPQUERY_FLAGS for. You don't use it anywhere. > > I have added the SUBARCH for rmpquery in this patch, so I will be needing the CPU_RMPQUERY_FLAGS now. Additionally, I have added the requirement for rmpquery feature flag for rmpquery test. > I have also changed the testcases with proper formatting. > > > Additionally you'll want to extend the comment ahead of the call to > > swap_operands() in md_assemble(). The conditional itself already covers the new insn. > > Addressed this to expand the comment with rmpquery here. > Please find the revised patch attached as well as inlined below. > > Thanks and Regards, > Tejas > > -- > 2022-09-28 Tejas Joshi > > gas/ > > * config/tc-i386.c (cpu_arch): Add znver4 ARCH and rmpquery SUBARCH. > (md_assemble): Expand comment before swap_operands() with rmpquery. > * doc/c-i386.texi: Add znver4. > * testsuite/gas/i386/arch-14-1.d: New. > * testsuite/gas/i386/arch-14-1.s: New. > * testsuite/gas/i386/arch-14-znver4.d: New. > * testsuite/gas/i386/i386.exp: Add new znver4 test cases. > * testsuite/gas/i386/rmpquery.d: New. > * testsuite/gas/i386/rmpquery.s: New. > * testsuite/gas/i386/x86-64-arch-4-1.d: New. > * testsuite/gas/i386/x86-64-arch-4-1.s: New. > * testsuite/gas/i386/x86-64-arch-4-znver4.d: New. > > opcodes/ > > * i386-dis.c (x86_64_table): Add rmpquery. > * i386-gen.c (cpu_flag_init): Add CPU_ZNVER4_FLAGS and > CPU_RMPQUERY_FLAGS. > (cpu_flags): Add CpuRMPQUERY. > * i386-opc.h (enum): Add CpuRMPQUERY. > (i386_cpu_flags): Add cpurmpquery. > * i386-opc.tbl: Add rmpquery insn. > * i386-init.h: Re-generated. > * i386-tbl.h: Re-generated. > --- > gas/config/tc-i386.c | 9 +++++--- > gas/doc/c-i386.texi | 5 ++-- > gas/testsuite/gas/i386/arch-14-1.d | 22 ++++++++++++++++++ > gas/testsuite/gas/i386/arch-14-1.s | 16 +++++++++++++ > gas/testsuite/gas/i386/arch-14-znver4.d | 5 ++++ > gas/testsuite/gas/i386/i386.exp | 5 ++++ > gas/testsuite/gas/i386/rmpquery.d | 20 ++++++++++++++++ > gas/testsuite/gas/i386/rmpquery.s | 13 +++++++++++ > gas/testsuite/gas/i386/x86-64-arch-4-1.d | 23 +++++++++++++++++++ > gas/testsuite/gas/i386/x86-64-arch-4-1.s | 18 +++++++++++++++ > gas/testsuite/gas/i386/x86-64-arch-4-znver4.d | 5 ++++ > opcodes/i386-dis.c | 16 ++++++++++++- > opcodes/i386-gen.c | 5 ++++ > opcodes/i386-opc.h | 3 +++ > opcodes/i386-opc.tbl | 7 ++++++ > 15 files changed, 166 insertions(+), 6 deletions(-) > create mode 100644 gas/testsuite/gas/i386/arch-14-1.d > create mode 100644 gas/testsuite/gas/i386/arch-14-1.s > create mode 100644 gas/testsuite/gas/i386/arch-14-znver4.d > create mode 100644 gas/testsuite/gas/i386/rmpquery.d > create mode 100644 gas/testsuite/gas/i386/rmpquery.s > create mode 100644 gas/testsuite/gas/i386/x86-64-arch-4-1.d > create mode 100644 gas/testsuite/gas/i386/x86-64-arch-4-1.s > create mode 100644 gas/testsuite/gas/i386/x86-64-arch-4-znver4.d > > diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c > index df83d4b79c0..6360553432d 100644 > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -974,6 +974,7 @@ static const arch_entry cpu_arch[] = > ARCH (znver1, ZNVER, ZNVER1, false), > ARCH (znver2, ZNVER, ZNVER2, false), > ARCH (znver3, ZNVER, ZNVER3, false), > + ARCH (znver4, ZNVER, ZNVER4, false), > ARCH (btver1, BT, BTVER1, false), > ARCH (btver2, BT, BTVER2, false), > > @@ -1095,6 +1096,7 @@ static const arch_entry cpu_arch[] = > SUBARCH (uintr, UINTR, ANY_UINTR, false), > SUBARCH (hreset, HRESET, ANY_HRESET, false), > SUBARCH (avx512_fp16, AVX512_FP16, ANY_AVX512_FP16, false), > + SUBARCH (rmpquery, RMPQUERY, RMPQUERY, false), > }; > > #undef SUBARCH > @@ -4852,9 +4854,10 @@ md_assemble (char *line) > > /* All Intel opcodes have reversed operands except for "bound", "enter", > "invlpg*", "monitor*", "mwait*", "tpause", "umwait", "pvalidate", > - "rmpadjust", and "rmpupdate". We also don't reverse intersegment "jmp" > - and "call" instructions with 2 immediate operands so that the immediate > - segment precedes the offset consistently in Intel and AT&T modes. */ > + "rmpadjust", "rmpupdate", and "rmpquery". We also don't reverse > + intersegment "jmp" and "call" instructions with 2 immediate operands so > + that the immediate segment precedes the offset consistently in Intel and > + AT&T modes. */ > if (intel_syntax > && i.operands > 1 > && (strcmp (mnemonic, "bound") != 0) > diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi > index 9d2ccddafa7..a1a07314f5e 100644 > --- a/gas/doc/c-i386.texi > +++ b/gas/doc/c-i386.texi > @@ -124,6 +124,7 @@ processor names are recognized: > @code{znver1}, > @code{znver2}, > @code{znver3}, > +@code{znver4}, > @code{btver1}, > @code{btver2}, > @code{generic32} and > @@ -1467,8 +1468,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are: > @item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8} > @item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2} @tab @samp{bdver3} > @item @samp{bdver4} @tab @samp{znver1} @tab @samp{znver2} @tab @samp{znver3} > -@item @samp{btver1} @tab @samp{btver2} @tab @samp{generic32} @tab @samp{generic64} > -@item @samp{.cmov} @tab @samp{.fxsr} @tab @samp{.mmx} > +@item @samp{znver4} @tab @samp{btver1} @tab @samp{btver2} @tab @samp{generic32} > +@item @samp{generic64} @tab @samp{.cmov} @tab @samp{.fxsr} @tab @samp{.mmx} > @item @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3} @tab @samp{.sse4a} > @item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4} > @item @samp{.avx} @tab @samp{.vmx} @tab @samp{.smx} @tab @samp{.ept} > diff --git a/gas/testsuite/gas/i386/arch-14-1.d b/gas/testsuite/gas/i386/arch-14-1.d > new file mode 100644 > index 00000000000..649c71c0f44 > --- /dev/null > +++ b/gas/testsuite/gas/i386/arch-14-1.d > @@ -0,0 +1,22 @@ > +#objdump: -dw > +#name: i386 arch 14-1 > + > +.*: file format .* > + > +Disassembly of section .text: > + > +0+ <.text>: > +[ ]*[a-f0-9]+:[ ]*62 f1 d5 48 58 f4[ ]*vaddpd %zmm4,%zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 1b 31[ ]*vbroadcastf32x8 \(%ecx\),%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 c4 f5[ ]*vpconflictd %zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 1c f5[ ]*vpabsb %zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f1 d5 0f 58 f4[ ]*vaddpd %xmm4,%xmm5,%xmm6\{%k7\} > +[ ]*[a-f0-9]+:[ ]*62 f2 57 48 72 f4[ ]*vcvtne2ps2bf16 %zmm4,%zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*62 f2 7d 4f 63 31[ ]*vpcompressb %zmm6,\(%ecx\)\{%k7\} > +[ ]*[a-f0-9]+:[ ]*62 f2 75 48 52 e3[ ]*vpdpwssd %zmm3,%zmm1,%zmm4 > +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8f ec[ ]*vpshufbitqmb %zmm4,%zmm5,%k5 > +[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 f5[ ]*vpopcntd %zmm5,%zmm6 > +[ ]*[a-f0-9]+:[ ]*66 0f 38 cf ec[ ]*gf2p8mulb %xmm4,%xmm5 > +#pass > diff --git a/gas/testsuite/gas/i386/arch-14-1.s b/gas/testsuite/gas/i386/arch-14-1.s > new file mode 100644 > index 00000000000..59e3a687dbe > --- /dev/null > +++ b/gas/testsuite/gas/i386/arch-14-1.s > @@ -0,0 +1,16 @@ > +# Test -march= > + .text > + > + vaddpd %zmm4, %zmm5, %zmm6 # AVX512F > + vbroadcastf32x8 (%ecx), %zmm6 # AVX512DQ > + vpmadd52luq %zmm4, %zmm5, %zmm6 # AVX512IFMA > + vpconflictd %zmm5, %zmm6 # AVX512CD > + vpabsb %zmm5, %zmm6 # AVX512BW > + vaddpd %xmm4, %xmm5, %xmm6{%k7} # AVX512{F,VL} > + vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 #AVX512_BF16 > + vpermb %zmm4, %zmm5, %zmm6 # AVX512VBMI > + vpcompressb %zmm6, (%ecx){%k7} # AVX512VBMI2 > + vpdpwssd %zmm3, %zmm1, %zmm4 # AVX512VNNI > + vpshufbitqmb %zmm4, %zmm5, %k5 # AVX512BITALG > + vpopcntd %zmm5, %zmm6 # AVX512_VPOPCNTDQ > + gf2p8mulb %xmm4, %xmm5 # GFNI > diff --git a/gas/testsuite/gas/i386/arch-14-znver4.d b/gas/testsuite/gas/i386/arch-14-znver4.d > new file mode 100644 > index 00000000000..3ae309f9988 > --- /dev/null > +++ b/gas/testsuite/gas/i386/arch-14-znver4.d > @@ -0,0 +1,5 @@ > +#source: arch-14-1.s > +#as: -march=znver4 > +#objdump: -dw > +#name: i386 arch 14 (znver4) > +#dump: arch-14-1.d > diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp > index 185229d4edd..913d6fdc3a9 100644 > --- a/gas/testsuite/gas/i386/i386.exp > +++ b/gas/testsuite/gas/i386/i386.exp > @@ -196,6 +196,7 @@ if [gas_32_check] then { > run_dump_test "arch-13-znver1" > run_dump_test "arch-13-znver2" > run_dump_test "arch-14-znver3" > + run_dump_test "arch-14-znver4" > run_dump_test "arch-10-btver1" > run_dump_test "arch-10-btver2" > run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al" > @@ -207,6 +208,7 @@ if [gas_32_check] then { > run_dump_test "arch-12" > run_dump_test "arch-13" > run_dump_test "arch-14" > + run_dump_test "arch-14-1" > run_list_test "arch-dflt" "-march=generic32 -al" > run_list_test "arch-stk" "-march=generic32 -al" > run_dump_test "8087" > @@ -900,6 +902,8 @@ if [gas_64_check] then { > run_dump_test "x86-64-arch-2" > run_dump_test "x86-64-arch-3" > run_dump_test "x86-64-arch-4" > + run_dump_test "x86-64-arch-4-1" > + run_dump_test "rmpquery" > run_dump_test "x86-64-arch-2-lzcnt" > run_dump_test "x86-64-arch-2-prefetchw" > run_dump_test "x86-64-arch-2-bdver1" > @@ -909,6 +913,7 @@ if [gas_64_check] then { > run_dump_test "x86-64-arch-3-znver1" > run_dump_test "x86-64-arch-3-znver2" > run_dump_test "x86-64-arch-4-znver3" > + run_dump_test "x86-64-arch-4-znver4" > run_dump_test "x86-64-arch-2-btver1" > run_dump_test "x86-64-arch-2-btver2" > run_list_test "x86-64-arch-2-1" "-march=generic64 -I${srcdir}/$subdir -al" > diff --git a/gas/testsuite/gas/i386/rmpquery.d b/gas/testsuite/gas/i386/rmpquery.d > new file mode 100644 > index 00000000000..4d937685612 > --- /dev/null > +++ b/gas/testsuite/gas/i386/rmpquery.d > @@ -0,0 +1,20 @@ > +#as: -march=generic64+rmpquery > +#objdump: -dw > +#name: 64-bit RMPQUERY insn > +#source: rmpquery.s > + > +.*: +file format .* > + > + > +Disassembly of section \.text: > + > +0+ : > +[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]* > +[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]* > +[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fd[ ]+addr32 rmpquery[ ]* > + > +[0-9a-f]+ : > +[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]* > +[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]* > +[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fd[ ]+addr32 rmpquery[ ]* > +#pass > diff --git a/gas/testsuite/gas/i386/rmpquery.s b/gas/testsuite/gas/i386/rmpquery.s > new file mode 100644 > index 00000000000..75393734648 > --- /dev/null > +++ b/gas/testsuite/gas/i386/rmpquery.s > @@ -0,0 +1,13 @@ > +# Check RMPQUERY instruction > + > + .text > +att: > + rmpquery > + rmpquery %rax, %rcx, %rdx > + rmpquery %eax, %rcx, %rdx > + > + .intel_syntax noprefix > +intel: > + rmpquery > + rmpquery rax, rcx, rdx > + rmpquery eax, rcx, rdx > diff --git a/gas/testsuite/gas/i386/x86-64-arch-4-1.d b/gas/testsuite/gas/i386/x86-64-arch-4-1.d > new file mode 100644 > index 00000000000..f33cd6bc297 > --- /dev/null > +++ b/gas/testsuite/gas/i386/x86-64-arch-4-1.d > @@ -0,0 +1,23 @@ > +#objdump: -dw > +#name: x86-64 arch 4-1 > + > +.*: file format .* > + > +Disassembly of section .text: > + > +0+ <.text>: > +[ ]*[a-f0-9]+:[ ]*62 01 95 40 58 f4[ ]*vaddpd %zmm28,%zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 62 7d 48 1b 31[ ]*vbroadcastf32x8 \(%rcx\),%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 02 7d 48 c4 f5[ ]*vpconflictd %zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 02 7d 48 1c f5[ ]*vpabsb %zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 01 95 00 58 f4[ ]*vaddpd %xmm28,%xmm29,%xmm30 > +[ ]*[a-f0-9]+:[ ]*62 02 17 40 72 f4[ ]*vcvtne2ps2bf16 %zmm28,%zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 02 15 40 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*62 62 7d 4f 63 31[ ]*vpcompressb %zmm30,\(%rcx\)\{%k7\} > +[ ]*[a-f0-9]+:[ ]*62 a2 6d 40 52 d1[ ]*vpdpwssd %zmm17,%zmm18,%zmm18 > +[ ]*[a-f0-9]+:[ ]*62 92 15 40 8f ec[ ]*vpshufbitqmb %zmm28,%zmm29,%k5 > +[ ]*[a-f0-9]+:[ ]*62 02 7d 48 55 f5[ ]*vpopcntd %zmm29,%zmm30 > +[ ]*[a-f0-9]+:[ ]*66 0f 38 cf ec[ ]*gf2p8mulb %xmm4,%xmm5 > +[ ]*[a-f0-9]+:[ ]*f3 0f 01 fd[ ]*rmpquery > +#pass > diff --git a/gas/testsuite/gas/i386/x86-64-arch-4-1.s b/gas/testsuite/gas/i386/x86-64-arch-4-1.s > new file mode 100644 > index 00000000000..57a370fa752 > --- /dev/null > +++ b/gas/testsuite/gas/i386/x86-64-arch-4-1.s > @@ -0,0 +1,18 @@ > +# Test -march= > + .text > + > + vaddpd %zmm28, %zmm29, %zmm30 # AVX512F > + vbroadcastf32x8 (%rcx), %zmm30 # AVX512DQ > + vpmadd52luq %zmm28, %zmm29, %zmm30 # AVX512IFMA > + vpconflictd %zmm29, %zmm30 # AVX512CD > + vpabsb %zmm29, %zmm30 # AVX512BW > + vaddpd %xmm28, %xmm29, %xmm30 # AVX512{F,VL} > + vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30 #AVX512_BF16 > + vpermb %zmm28, %zmm29, %zmm30 # AVX512VBMI > + vpcompressb %zmm30, (%rcx){%k7} # AVX512VBMI2 > + vpdpwssd %zmm17, %zmm18, %zmm18 # AVX512VNNI > + vpshufbitqmb %zmm28, %zmm29, %k5 # AVX512BITALG > + vpopcntd %zmm29, %zmm30 # AVX512_VPOPCNTDQ > + gf2p8mulb %xmm4, %xmm5 > +# RMPQUERY > + rmpquery > diff --git a/gas/testsuite/gas/i386/x86-64-arch-4-znver4.d b/gas/testsuite/gas/i386/x86-64-arch-4-znver4.d > new file mode 100644 > index 00000000000..d64c96f0d40 > --- /dev/null > +++ b/gas/testsuite/gas/i386/x86-64-arch-4-znver4.d > @@ -0,0 +1,5 @@ > +#source: x86-64-arch-4-1.s > +#as: -march=znver4 > +#objdump: -dw > +#name: x86-64 arch 4 (znver4) > +#dump: x86-64-arch-4-1.d > diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c > index d94d6ad8464..786ce731e35 100644 > --- a/opcodes/i386-dis.c > +++ b/opcodes/i386-dis.c > @@ -995,6 +995,7 @@ enum > PREFIX_0F01_REG_5_MOD_3_RM_6, > PREFIX_0F01_REG_5_MOD_3_RM_7, > PREFIX_0F01_REG_7_MOD_3_RM_2, > + PREFIX_0F01_REG_7_MOD_3_RM_5, > PREFIX_0F01_REG_7_MOD_3_RM_6, > PREFIX_0F01_REG_7_MOD_3_RM_7, > PREFIX_0F09, > @@ -1265,6 +1266,7 @@ enum > X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1, > X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1, > X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1, > + X86_64_0F01_REG_7_MOD_3_RM_5_PREFIX_1, > X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1, > X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3, > X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1, > @@ -3026,6 +3028,12 @@ static const struct dis386 prefix_table[][4] = { > { "mcommit", { Skip_MODRM }, 0 }, > }, > > + /* PREFIX_0F01_REG_7_MOD_3_RM_5 */ > + { > + { "rdpru", { Skip_MODRM }, 0 }, > + { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_5_PREFIX_1) }, > + }, > + > /* PREFIX_0F01_REG_7_MOD_3_RM_6 */ > { > { "invlpgb", { Skip_MODRM }, 0 }, > @@ -4281,6 +4289,12 @@ static const struct dis386 x86_64_table[][2] = { > { "stui", { Skip_MODRM }, 0 }, > }, > > + /* X86_64_0F01_REG_7_MOD_3_RM_5_PREFIX_1 */ > + { > + { Bad_Opcode }, > + { "rmpquery", { Skip_MODRM }, 0 }, > + }, > + > /* X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1 */ > { > { Bad_Opcode }, > @@ -8517,7 +8531,7 @@ static const struct dis386 rm_table[][8] = { > { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) }, > { "mwaitx", { { OP_Mwait, eBX_reg } }, PREFIX_OPCODE }, > { "clzero", { Skip_MODRM }, 0 }, > - { "rdpru", { Skip_MODRM }, 0 }, > + { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_5) }, > { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_6) }, > { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_7) }, > }, > diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c > index 33f13cec192..7c3e456a1e4 100644 > --- a/opcodes/i386-gen.c > +++ b/opcodes/i386-gen.c > @@ -105,6 +105,8 @@ static initializer cpu_flag_init[] = > "CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" }, > { "CPU_ZNVER3_FLAGS", > "CPU_ZNVER2_FLAGS|CpuINVLPGB|CpuTLBSYNC|CpuVAES|CpuVPCLMULQDQ|CpuINVPCID|CpuSNP|CpuOSPKE" }, > + { "CPU_ZNVER4_FLAGS", > + "CPU_ZNVER3_FLAGS|CpuAVX512F|CpuAVX512DQ|CpuAVX512IFMA|CpuAVX512CD|CpuAVX512BW|CpuAVX512VL|CpuAVX512_BF16|CpuAVX512VBMI|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512_VPOPCNTDQ|CpuGFNI|CpuRMPQUERY" }, > { "CPU_BTVER1_FLAGS", > "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME" }, > { "CPU_BTVER2_FLAGS", > @@ -341,6 +343,8 @@ static initializer cpu_flag_init[] = > "CpuTLBSYNC" }, > { "CPU_SNP_FLAGS", > "CpuSNP" }, > + { "CPU_RMPQUERY_FLAGS", > + "CpuRMPQUERY" }, > { "CPU_ANY_X87_FLAGS", > "CPU_ANY_287_FLAGS|Cpu8087" }, > { "CPU_ANY_287_FLAGS", > @@ -675,6 +679,7 @@ static bitfield cpu_flags[] = > BITFIELD (CpuINVLPGB), > BITFIELD (CpuTLBSYNC), > BITFIELD (CpuSNP), > + BITFIELD (CpuRMPQUERY), > BITFIELD (Cpu64), > BITFIELD (CpuNo64), > #ifdef CpuUnused > diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h > index bc9ed61947e..a29336d8777 100644 > --- a/opcodes/i386-opc.h > +++ b/opcodes/i386-opc.h > @@ -274,6 +274,8 @@ enum > CpuTLBSYNC, > /* SNP instructions required */ > CpuSNP, > + /* RMPQUERY instruction required */ > + CpuRMPQUERY, > > /* NOTE: These last three items need to remain last and in this order. */ > > @@ -423,6 +425,7 @@ typedef union i386_cpu_flags > unsigned int cpuinvlpgb:1; > unsigned int cputlbsync:1; > unsigned int cpusnp:1; > + unsigned int cpurmpquery:1; > /* NOTE: These last three fields need to remain last and in this order. */ > unsigned int cpu64:1; > unsigned int cpuno64:1; > diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl > index e49d3dc98a2..6dc9cc69f7f 100644 > --- a/opcodes/i386-opc.tbl > +++ b/opcodes/i386-opc.tbl > @@ -3073,6 +3073,13 @@ rmpadjust, 0xf30f01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg, { Acc|Dword|Qword } > > // SNP instructions end > > +// RMPQUERY instruction > + > +rmpquery, 0xf30f01fd, None, CpuRMPQUERY|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {} > +rmpquery, 0xf30f01fd, None, CpuRMPQUERY|Cpu64, AddrPrefixOpReg, { Acc|Dword|Qword, RegC|Qword, RegD|Qword } > + > +// RMPQUERY instruction end > + > // RDPRU instruction > > rdpru, 0x0f01fd, None, CpuRDPRU, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {} > -- > 2.25.1 OK. Thanks. -- H.J.