From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by sourceware.org (Postfix) with ESMTPS id 991823857C49 for ; Wed, 6 Jul 2022 17:11:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 991823857C49 Received: by mail-pl1-x62f.google.com with SMTP id b2so14145376plx.7 for ; Wed, 06 Jul 2022 10:11:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=MSpqHzKNmcbT6gU5bkmpkeSizo/fCf+nEQyYJJZjGtU=; b=bNBnR9PUYqURDsoxea9kD+Q0CvHjLuD8s3HxT4yUvArYsGH4ZApA1J3ZdNdAWQHNgw KCpCSOqBopJQLc1fjyHs5+yVNu6VuB4R0KfQcIm+9T1B4/3cZLKmFVPPamFNV1xhSJ1u qycd0h89GUuWQIvCrIFYn1/sLENdwz2CvIjtONJ25OBHghqDKhgk8Zsz/HXZPMfYRwoQ 4BtY7RuaAjunhp5SSqQNcfm+VM/QuxYysZS7ByP8p92rXMAoYpEkXiArHuxBu99gAF9S 3VrZWeZl/28rIRgo6dvq5m907145S2VMBAnMnUU5tN4ut6bnmtjYaGDZRMjNI/epkoH0 RO9A== X-Gm-Message-State: AJIora/8S6mb6bnUStd/mS9UApa+wE8pN2U9z0S3WJ6Dzm0iZG7Noung zU2Eh5uk4SYcBV2A8mLOxqHQ6g6g14ytTNOQ1b+uJRuh X-Google-Smtp-Source: AGRyM1tGeOjUa9zvhBY9gj8bAN6V1VbuPQ0fNG18WDfLegmx6qXu/XXe/6R25+icSEB8LbFgCao37lU3x1KFjLUYJB0= X-Received: by 2002:a17:90a:eacd:b0:1ef:84c2:418d with SMTP id ev13-20020a17090aeacd00b001ef84c2418dmr22898789pjb.101.1657127474462; Wed, 06 Jul 2022 10:11:14 -0700 (PDT) MIME-Version: 1.0 References: <135c1ad8-9ad6-196e-4b5b-0cf8d89ea6d8@suse.com> In-Reply-To: <135c1ad8-9ad6-196e-4b5b-0cf8d89ea6d8@suse.com> From: "H.J. Lu" Date: Wed, 6 Jul 2022 10:10:38 -0700 Message-ID: Subject: Re: [PATCH] x86: re-order insn template fields To: Jan Beulich Cc: Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3018.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Jul 2022 17:11:17 -0000 On Wed, Jul 6, 2022 at 6:43 AM Jan Beulich wrote: > > This saves quite a number of shift instructions: The "operands" field > can now be retrieved by just masking (no shift), and extracting the > "extension_opcode" field now only requires a (signed) right shift, with > no prereq left one. (Of course there may be architectures where, in a > cross build, there might be no difference at all, e.g. when there are > suitable bitfield extraction insns.) > > --- a/opcodes/i386-gen.c > +++ b/opcodes/i386-gen.c > @@ -1444,8 +1444,8 @@ output_i386_opcode (FILE *table, const c > fail (_("%s:%d: %s: residual opcode (0x%0*llx) too large\n"), > filename, lineno, name, 2 * length, opcode); > > - fprintf (table, " { \"%s\", 0x%0*llx%s, %s, %lu,\n", > - name, 2 * (int)length, opcode, end, extension_opcode, i); > + fprintf (table, " { \"%s\", 0x%0*llx%s, %lu, %s,\n", > + name, 2 * (int)length, opcode, end, i, extension_opcode); > > process_i386_opcode_modifier (table, opcode_modifier, space, prefix, > operand_types, lineno); > --- a/opcodes/i386-opc.h > +++ b/opcodes/i386-opc.h > @@ -929,6 +929,12 @@ typedef struct insn_template > from all other values above. */ > #define Opcode_VexW 0xf /* Operand order controlled by VEX.W. */ > > + /* how many operands */ > + unsigned int operands:3; > + > + /* spare bits */ > + unsigned int :4; > + These fields need some comments to explain why they are done this way. > /* (Fake) base opcode value for pseudo prefixes. */ > #define PSEUDO_PREFIX 0 > > @@ -952,9 +958,6 @@ typedef struct insn_template > #define Prefix_REX 8 /* {rex} */ > #define Prefix_NoOptimize 9 /* {nooptimize} */ > > - /* how many operands */ > - unsigned int operands:3; > - > /* the bits in opcode_modifier are used to generate the final opcode from > the base_opcode. These bits also are used to detect alternate forms of > the same instruction */ -- H.J.