From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 43357 invoked by alias); 26 Jun 2015 11:55:42 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 43268 invoked by uid 89); 26 Jun 2015 11:55:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-oi0-f51.google.com Received: from mail-oi0-f51.google.com (HELO mail-oi0-f51.google.com) (209.85.218.51) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 26 Jun 2015 11:55:35 +0000 Received: by oiax193 with SMTP id x193so73500122oia.2 for ; Fri, 26 Jun 2015 04:55:33 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.182.20.141 with SMTP id n13mr1177046obe.26.1435319733376; Fri, 26 Jun 2015 04:55:33 -0700 (PDT) Received: by 10.76.160.68 with HTTP; Fri, 26 Jun 2015 04:55:33 -0700 (PDT) In-Reply-To: <0428E25D138CAA4D819A6FED9429E51AF4CC18@SCYBEXDAG02.amd.com> References: <0428E25D138CAA4D819A6FED9429E51AF4A29C@SCYBEXDAG02.amd.com> <556D83DE02000078000800CE@mail.emea.novell.com> <0428E25D138CAA4D819A6FED9429E51AF4A96C@SCYBEXDAG02.amd.com> <55755AD50200007800081CE1@mail.emea.novell.com> <0428E25D138CAA4D819A6FED9429E51AF4CB28@SCYBEXDAG02.amd.com> <0428E25D138CAA4D819A6FED9429E51AF4CBC5@SCYBEXDAG02.amd.com> <0428E25D138CAA4D819A6FED9429E51AF4CC18@SCYBEXDAG02.amd.com> Date: Fri, 26 Jun 2015 11:55:00 -0000 Message-ID: Subject: Re: [PATH] AMD MWAITX enablement From: "H.J. Lu" To: "Pawar, Amit" Cc: "binutils@sourceware.org" , Jan Beulich Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg00262.txt.bz2 On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit wrote: > > Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. Add if (i.operands != 3) abort (); + for (x = 0; x < 2; x++) + { ^^^ Remove it. + if (register_number (i.op[x].regs) != x) Use goto bad_register_operand; + { + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + } + } + + /* Check for third operand for mwaitx/monitorx insn*/ + if ( register_number (i.op[2].regs) != 2 + (i.tm.extension_opcode == 0xfb)) ^ Remove extra space. This line is too lone. Please break it into 2 lines: if (register_number (i.op[x].regs) != x + (i.tm.extension_opcode == 0xfb)) + { Add a label here bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, 3, ^^^ Change it to x + 1. + i.tm.name); + } + + i.operands = 0; + } > > -----Original Message----- > From: H.J. Lu [mailto:hjl.tools@gmail.com] > Sent: Friday, June 26, 2015 3:34 PM > To: Pawar, Amit > Cc: binutils@sourceware.org; Jan Beulich > Subject: Re: [PATH] AMD MWAITX enablement > > On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit wrote: >> PFA MWAITX fixed patch. OK to apply? >> > > Please change the operand check to > > if (i.tm.cpu_flags.bitfield.cpumwaitx) > { > if ( i.operands != 3) > abort > > for (i = 0, i< 2; i++) > ... > > if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... > } > > -- > H.J. -- H.J.