From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk1-x72c.google.com (mail-qk1-x72c.google.com [IPv6:2607:f8b0:4864:20::72c]) by sourceware.org (Postfix) with ESMTPS id 17DE83858C83 for ; Wed, 19 Oct 2022 21:27:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 17DE83858C83 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-qk1-x72c.google.com with SMTP id t25so11636142qkm.2 for ; Wed, 19 Oct 2022 14:27:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=w6uRzWGXcGVdzik2o6XtxvtamDcxW4zTByNiTSZp+CU=; b=kDZQ3F61mHwnJEscifVg5NANtJmyR1rqSgx6zX4I+XeyfNBS3tRxxRSTRZIVs1XrNQ iBuTVrmQr8EesFJv34nzEePgCAyfwaqPVL5Sxmqm7jmgICmJd6F5lkl+EWdANRWGfDAr Sos4Nu/Yc4i+pZP8g8QRfSpHuLBDjXFxvhU7RfKhve4yndFWzHvfGpsBYQZZmHsmXST+ d52MdRkReNZ1wunLIQ660X5tAPx+p11G1cCtVLJk0jWP2BF/zMR3T48VcGDDL+63ze4Y C+SPKk3Qkhs6EJheaT+Eotf/dJVoxPoKVkOWIffXN5vW7RJ/gsMbDPEfK2eHlSw6FPlk q6nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=w6uRzWGXcGVdzik2o6XtxvtamDcxW4zTByNiTSZp+CU=; b=rVIfqB04gCbKPXul5NVboZ2si5ReSVsclkWowCgAE2ij/5UHhkoY17vlFtikc2LXAR tGBYXH/YJ/6wDCPYU8eeh69pO4L1jlRgqw4nxqreQyQs00WjNbe15uZ78Z41+C09hUiz tcIlZyHH5mhY0ir9mtDXeKUz1VNPfNWodMneqbZCENqV5+5XtTsLRJVa9BQKgBWwzggr vPLHIzsnncH3AFP+qZoUKsqPr4lz3E7KtZVZ2nw91YYfDMJ57Dio+26muR67Zj9Yt75D YiWYV9tojwTOsmxvmIsiIy6ru34seh2yCXFH6y6j/3w4I9pP/OuG9+TLRHL1IzW9uJjU 48JQ== X-Gm-Message-State: ACrzQf2PBR9Y2tyX8vQvBI2nW6y7yU3/aIaNYuGJcRTEM3sr1ofuWYtj PpTSB9ETzJbOGGF1z7ksitJOXMAdZ3n3lzuzWo8= X-Google-Smtp-Source: AMsMyM73jHk70gSSfJYAXGdBBd/6g1HX8mcJpzoEQVRwTuhiJOfkoZTONdvGTY6JCn7N9hjTRNT06TWyGjuDC33KrsI= X-Received: by 2002:a37:c83:0:b0:6ee:d487:6d25 with SMTP id 125-20020a370c83000000b006eed4876d25mr7067154qkm.670.1666214867348; Wed, 19 Oct 2022 14:27:47 -0700 (PDT) MIME-Version: 1.0 References: <20221014091248.4920-1-haochen.jiang@intel.com> <20221014091248.4920-2-haochen.jiang@intel.com> <863655db-f202-477f-c638-00773c25886c@suse.com> <6d3a01b1-2576-f329-0a36-486526c0b03b@suse.com> <8be9ec22-d016-d5ea-6479-3c14e532274a@suse.com> In-Reply-To: <8be9ec22-d016-d5ea-6479-3c14e532274a@suse.com> From: "H.J. Lu" Date: Wed, 19 Oct 2022 14:27:11 -0700 Message-ID: Subject: Re: [PATCH 01/10] Support Intel AVX-IFMA To: Jan Beulich Cc: Haochen Jiang , wwwhhhyyy , binutils@sourceware.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3023.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, Oct 18, 2022 at 11:01 PM Jan Beulich wrote: > > On 18.10.2022 23:28, H.J. Lu wrote: > > On Mon, Oct 17, 2022 at 10:33 PM Jan Beulich wrote: > >> > >> On 18.10.2022 00:23, H.J. Lu wrote: > >>> On Sat, Oct 15, 2022 at 11:39 PM Jan Beulich wrote: > >>>> > >>>> On 14.10.2022 20:10, H.J. Lu wrote: > >>>>> On Fri, Oct 14, 2022 at 2:52 AM Jan Beulich wrote: > >>>>>> > >>>>>> On 14.10.2022 11:12, Haochen Jiang wrote: > >>>>>>> From: wwwhhhyyy > >>>>>>> > >>>>>>> x86: Support Intel AVX-IFMA > >>>>>>> > >>>>>>> Intel AVX IFMA instructions are marked with CpuVEX_PREFIX, which is > >>>>>>> cleared by default. Without {vex} pseudo prefix, Intel IFMA instructions > >>>>>>> are encoded with EVEX prefix. {vex} pseudo prefix will turn on VEX > >>>>>>> encoding for Intel IFMA instructions. > >>>>>> > >>>>>> I firmly object to the proliferation of this mis-feature. As expressed > >>>>>> before for AVX-VNNI, as long as the user has disabled AVX512 (or > >>>>>> respective sub-features thereof), there should be no need to use {vex} in > >>>>>> the source code. There's also no reason at all to make the disassembler > >>>>>> print {vex} prefixes - we don't do so for any other insns (apart from > >>>>>> AVX-VNNI) where an ambiguity exists between their VEX and EVEX encodings > >>>>>> (when none of the EVEX-specific features is used). > >>>>> > >>>>> The {vex} prefix is used with AVX-IFMA instructions so that IFMA instructions > >>>>> without a prefix, which are generated by compilers or handwritten, will be > >>>>> always encoded with EVEX. > >>>> > >>>> So again: Why is this necessary when a programmer disabled AVX512? I fully > >>>> agree we need to pick the EVEX encoding by default if available, but I see > >>>> no reason whatsoever to insist on a {vex} prefix when the EVEX variant is > >>>> unavailable anyway. As you said back at the time for AVX-VNNI - this was a > >>>> design decision taken at Intel. Which is fine for a draft implementation. > >>>> But decisions for an open source project should be taken in the open, and > >>>> opinions of others should not simply be put off. > >>>> > >>> > >>> We can discuss how to initialize i.vec_encoding. But it is orthogonal to > >>> this patch. > >> > >> One can view it as orthogonal, yes, but if we change the model then doing > >> so before more code and testcases need changing is imo preferable. > >> > > > > We can skip the pseudo VEX prefix check when AVX512F is disabled. > > Let me see if I can pull ahead the patch I have (right now it's at the end > of the 3rd series I have pending, when the 1st one continues to be debated), > so the new cases in this series could then come on top. Something like this: diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 01f84cb9a36..a9fd3115659 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -6458,8 +6458,9 @@ match_template (char mnem_suffix) /* Check Pseudo Prefix. */ if (t->opcode_modifier.pseudovexprefix + && cpu_arch_flags.bitfield.cpuavx512f && !(i.vec_encoding == vex_encoding_vex - || i.vec_encoding == vex_encoding_vex3)) + || i.vec_encoding == vex_encoding_vex3)) continue; /* Check AT&T mnemonic. */ It works on existing tests. > > There should be no testcase changes. > > Well - existing tests ought it continue to work, yes, but the prefix-less > forms then also will want testing. > > Jan -- H.J.