From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x22a.google.com (mail-oi1-x22a.google.com [IPv6:2607:f8b0:4864:20::22a]) by sourceware.org (Postfix) with ESMTPS id 782EE395253C for ; Mon, 5 Dec 2022 23:20:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 782EE395253C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-oi1-x22a.google.com with SMTP id n205so14901626oib.1 for ; Mon, 05 Dec 2022 15:20:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=UGBUa57W8ZZq+kZT77EtOrhuSGWTxL2WK4RGwp2fRB4=; b=o5JBM8GMG/ewmEe2qpM3oXbum/vquvZrqBPztOlBzuvYWdWSBb80WofKpLHne+mDod gaLUB1ZiORVX7CoRxQb5E3RlV9edA+kHs0CP3aV85Yo11Aw8fGKvyxMJOi9JQKLzo1Pz nq5/MoNfaMSrNkZFuoiW0sSuclBZIbW8fpyOP6qMeDhenGreSvQDNx2JlbK5gt+2w2+b UmGmeNPWpVe8VG72TfV2GPF1CYLl+SYvJstvKYxG6Ep5hXmvnQfvawzcT4yUR0IN5lFk tSnAifeJP/V6DatzqKwVsxxsOkUb0K4soILP/cqcJwUn9d8/WbyHrPLyMm8lO0QwTO+S PeOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=UGBUa57W8ZZq+kZT77EtOrhuSGWTxL2WK4RGwp2fRB4=; b=RIAYsDtsKJ2qB1FYEcyqFUGA7DVuTtBB6Vkb+y23QsejFeYQMlrEcJOy+vmuFEs1WJ /5bXndekZgP4vmpQ+FIM9ss8dIE0z6tm/h7pdvTjPMKU1gLZKmsEP6QOXMjjZOMvl72f BQ8gb9jD2/8V1MUONjk7UQey3t2h2hYFhOR1IfihfMnZTNfDcLFuhrDV3kSmivCUPPmC 6b9c4Kf1FBNBjGP6/bUPozapyZoAJZ9Qhi6PQNiIG0QN04F9k65KqjIo2LXIUrrGp9PV GukVJpk7hNz/8DKIOKNN1nQU2NANfc2IAMsdX0Jwdq+vJ3m/iJJ1I3hquchLMqJQJ6Mf sMXg== X-Gm-Message-State: ANoB5pmIwFikoewQqxiUwDKlIYvKg0iV/MOxxIuN8MEtZRuXkDunoFkF O+PG35K7LW7regBMkTvYuzR/JhoKwXd+S42sOp0= X-Google-Smtp-Source: AA0mqf4wCOdVV/3gcczQiTKXkBPZ23f8vpm+TFpa7B0gO3fh4ltWvRICWXZlk+b3a36PJeyr5HlqnsqBdjfWnHSXBD8= X-Received: by 2002:a05:6808:1309:b0:359:d97b:3f6f with SMTP id y9-20020a056808130900b00359d97b3f6fmr35109690oiv.298.1670282443638; Mon, 05 Dec 2022 15:20:43 -0800 (PST) MIME-Version: 1.0 References: <20221203041307.34407-1-hjl.tools@gmail.com> <88604f9d-1cc7-0c05-c92e-2561512dc96e@suse.com> In-Reply-To: <88604f9d-1cc7-0c05-c92e-2561512dc96e@suse.com> From: "H.J. Lu" Date: Mon, 5 Dec 2022 15:20:07 -0800 Message-ID: Subject: Re: [PATCH] x86: Allow 16-bit register source for LAR and LSL To: Jan Beulich Cc: binutils@sourceware.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3016.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, Dec 5, 2022 at 3:11 AM Jan Beulich wrote: > > On 03.12.2022 05:13, H.J. Lu wrote: > > Since LAR and LSL only access 16 bits of the source operand, regardless > > of operand size, allow 16-bit register source for LAR and LSL, and always > > disassemble LAR and LSL with 16-bit source operand. > > > > gas/ > > > > PR gas/29844 > > * testsuite/gas/i386/i386.s: Add tests for LAR and LSL. > > * testsuite/gas/i386/x86_64.s: Likewise. > > * testsuite/gas/i386/intelbad.s: Remove "lar/lsl eax, ax". > > * testsuite/gas/i386/i386-intel.d: Updated. > > * testsuite/gas/i386/i386.d: Likewise. > > * testsuite/gas/i386/intel-intel.d: Likewise. > > * testsuite/gas/i386/intel.d: Likewise. > > * testsuite/gas/i386/intelbad.l: Likewise. > > * testsuite/gas/i386/x86_64-intel.d: Likewise. > > * testsuite/gas/i386/x86_64.d: Likewise. > > > > opcodes/ > > > > PR gas/29844 > > * i386-dis.c (MOD_0F02): Removed. > > (MOD_0F03): Likewise. > > (dis386_twobyte): Restore larS and lslS. > > (mod_table): Remove MOD_0F02 and MOD_0F03. > > * i386-opc.tbl: Allow 16-bit register source for LAR and LSL. > > * i386-tbl.h: Regenerated. > > Please can you refrain from immediately committing patches which have > a risk of being controversial. > > In the case here, given there are uses of the 16-bit register operand > form in the Linux kernel, I can accept the assembler part of the change. > The lines in i386-opc.tbl, however, need a comment then, as allowing for > 16-bit registers despite a wider destination is explicitly not in line > with the SDM. (Interestingly AMD's PM is different in this regard.) > > For the disassembler part you're completely undoing what I did, which is > wrong - again with reference to the SDM. If you want to accommodate for > AMD's PM, then you need to vary disassembly according to command line > options specified, with the default being in line with the SDM (I can > dig out a pretty old version of the doc, but I believe it has always > been that way, i.e. even before AMD introduced their clones). > > I will revert this change unless you come forward with an adjustment > within the next couple of days. > Given that the only lower 16 bits are used, the 16-bit register source is more appropriate. I will raise the issue with the Intel SDM author. -- H.J.