From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by sourceware.org (Postfix) with ESMTPS id 1D6EF3858C2D for ; Fri, 5 Aug 2022 22:31:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1D6EF3858C2D Received: by mail-pg1-x531.google.com with SMTP id bf13so3747516pgb.11 for ; Fri, 05 Aug 2022 15:31:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=2DciXswhTdXwGK/EaTa6F62PkohOBA4MBplxp/oIKWw=; b=3Ir6BUTCCixAG2AwYU4nuG4Q4FTCylFVk/713f46LYkDzEsGHO1EUAktXX2ujpWah5 y9maRo4MjkXq1ZAsluv4/zXxHrEv2eqQrvzxFdHOr6doj84Bj52VErtPlOuJyqirwtnI Mtm4dJilCo87tSU/jQSQu9gX0ubxch9uUEtnk/DIw4i8NTF2UUeaTeyuD/XLEyvRbYVB YTn4CYCRCGtcQwy1HLYWG3U96WFm0ReNbPDpjU71ZM0IibqlRfenREkygQAMrGhvuNtz Vz9/CuiQkDOt3Sn2NSjAfR7q5IGW9pMaxZJVmzcZBx0hFQdSbm+0tTl4Ybiqua8ygTNf vIcw== X-Gm-Message-State: ACgBeo1pzxFdCDmkeFY5TEK15PEHvmp1IqT+/dIJtIy8MHoxdV5rQvsj kJXC5Cg8Uv6XaXSZ3n3R+X8l/NFKDyM+ZToXiiw= X-Google-Smtp-Source: AA6agR4fWe/VG1vw1LeyuNKya0B4N4XurswchlgmCsXRvVTBhWa0XJm/RzRzdNR79S1mB584ebaX8T1xeaUc5D7CfwU= X-Received: by 2002:a65:6854:0:b0:41c:feab:e17c with SMTP id q20-20020a656854000000b0041cfeabe17cmr5078210pgt.256.1659738700956; Fri, 05 Aug 2022 15:31:40 -0700 (PDT) MIME-Version: 1.0 References: <39936ed4-08ae-87cf-a168-09a2c3dc393c@suse.com> In-Reply-To: <39936ed4-08ae-87cf-a168-09a2c3dc393c@suse.com> From: "H.J. Lu" Date: Fri, 5 Aug 2022 15:31:05 -0700 Message-ID: Subject: Re: [PATCH 02/12] x86: allow use of broadcast with X/Y/Z-suffixed AVX512-FP16 insns To: Jan Beulich Cc: Binutils , Lili Cui Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3017.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, LOTS_OF_MONEY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Aug 2022 22:31:45 -0000 On Fri, Aug 5, 2022 at 5:20 AM Jan Beulich wrote: > > While the x/y/z suffix isn't necessary to use in this case, it is still > odd that these forms don't support broadcast (unlike their AVX512F / > AVX512DQ counterparts). The lack thereof can e.g. make macro-ized > programming more difficult. > > --- a/gas/testsuite/gas/i386/avx512_fp16.d > +++ b/gas/testsuite/gas/i386/avx512_fp16.d > @@ -546,6 +546,7 @@ Disassembly of section \.text: > [ ]*[a-f0-9]+:[ ]*62 f3 7c 58 66 29 7b[ ]*vfpclassph \$0x7b,\(%ecx\)\{1to32\},%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 48 66 69 7f 7b[ ]*vfpclassphz \$0x7b,0x1fc0\(%ecx\),%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 5f 66 6a 80 7b[ ]*vfpclassph \$0x7b,-0x100\(%edx\)\{1to32\},%k5\{%k7\} > +[ ]*[a-f0-9]+:[ ]*62 f3 7c 58 66 69 01 7b[ ]*vfpclassph \$0x7b,0x2\(%ecx\)\{1to32\},%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 08 67 ee 7b[ ]*vfpclasssh \$0x7b,%xmm6,%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 0f 67 ee 7b[ ]*vfpclasssh \$0x7b,%xmm6,%k5\{%k7\} > [ ]*[a-f0-9]+:[ ]*62 f3 7c 0f 67 ac f4 00 00 00 10 7b[ ]*vfpclasssh \$0x7b,0x10000000\(%esp,%esi,8\),%k5\{%k7\} > --- a/gas/testsuite/gas/i386/avx512_fp16.s > +++ b/gas/testsuite/gas/i386/avx512_fp16.s > @@ -541,6 +541,7 @@ _start: > vfpclassph $123, (%ecx){1to32}, %k5 #AVX512-FP16 BROADCAST_EN > vfpclassphz $123, 8128(%ecx), %k5 #AVX512-FP16 Disp8(7f) > vfpclassph $123, -256(%edx){1to32}, %k5{%k7} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING > + vfpclassphz $123, 2(%ecx){1to32}, %k5 #AVX512-FP16 BROADCAST_EN > vfpclasssh $123, %xmm6, %k5 #AVX512-FP16 > vfpclasssh $123, %xmm6, %k5{%k7} #AVX512-FP16 MASK_ENABLING > vfpclasssh $123, 0x10000000(%esp, %esi, 8), %k5{%k7} #AVX512-FP16 MASK_ENABLING > --- a/gas/testsuite/gas/i386/avx512_fp16-intel.d > +++ b/gas/testsuite/gas/i386/avx512_fp16-intel.d > @@ -546,6 +546,7 @@ Disassembly of section \.text: > [ ]*[a-f0-9]+:[ ]*62 f3 7c 58 66 29 7b[ ]*vfpclassph k5,WORD BCST \[ecx\]\{1to32\},0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 48 66 69 7f 7b[ ]*vfpclassph k5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 5f 66 6a 80 7b[ ]*vfpclassph k5\{k7\},WORD BCST \[edx-0x100\]\{1to32\},0x7b > +[ ]*[a-f0-9]+:[ ]*62 f3 7c 58 66 69 01 7b[ ]*vfpclassph k5,WORD BCST \[ecx\+0x2\]\{1to32\},0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 08 67 ee 7b[ ]*vfpclasssh k5,xmm6,0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 0f 67 ee 7b[ ]*vfpclasssh k5\{k7\},xmm6,0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 0f 67 ac f4 00 00 00 10 7b[ ]*vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8\+0x10000000\],0x7b > --- a/gas/testsuite/gas/i386/avx512_fp16_vl.d > +++ b/gas/testsuite/gas/i386/avx512_fp16_vl.d > @@ -574,9 +574,11 @@ Disassembly of section \.text: > [ ]*[a-f0-9]+:[ ]*62 f3 7c 18 66 29 7b[ ]*vfpclassph \$0x7b,\(%ecx\)\{1to8\},%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 08 66 69 7f 7b[ ]*vfpclassphx \$0x7b,0x7f0\(%ecx\),%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 1f 66 6a 80 7b[ ]*vfpclassph \$0x7b,-0x100\(%edx\)\{1to8\},%k5\{%k7\} > +[ ]*[a-f0-9]+:[ ]*62 f3 7c 18 66 69 01 7b[ ]*vfpclassph \$0x7b,0x2\(%ecx\)\{1to8\},%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 38 66 29 7b[ ]*vfpclassph \$0x7b,\(%ecx\)\{1to16\},%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 28 66 69 7f 7b[ ]*vfpclassphy \$0x7b,0xfe0\(%ecx\),%k5 > [ ]*[a-f0-9]+:[ ]*62 f3 7c 3f 66 6a 80 7b[ ]*vfpclassph \$0x7b,-0x100\(%edx\)\{1to16\},%k5\{%k7\} > +[ ]*[a-f0-9]+:[ ]*62 f3 7c 38 66 69 01 7b[ ]*vfpclassph \$0x7b,0x2\(%ecx\)\{1to16\},%k5 > [ ]*[a-f0-9]+:[ ]*62 f6 7d 08 42 f5[ ]*vgetexpph %xmm5,%xmm6 > [ ]*[a-f0-9]+:[ ]*62 f6 7d 8f 42 f5[ ]*vgetexpph %xmm5,%xmm6\{%k7\}\{z\} > [ ]*[a-f0-9]+:[ ]*62 f6 7d 28 42 f5[ ]*vgetexpph %ymm5,%ymm6 > --- a/gas/testsuite/gas/i386/avx512_fp16_vl.s > +++ b/gas/testsuite/gas/i386/avx512_fp16_vl.s > @@ -569,9 +569,11 @@ _start: > vfpclassph $123, (%ecx){1to8}, %k5 #AVX512-FP16,AVX512VL BROADCAST_EN > vfpclassphx $123, 2032(%ecx), %k5 #AVX512-FP16,AVX512VL Disp8(7f) > vfpclassph $123, -256(%edx){1to8}, %k5{%k7} #AVX512-FP16,AVX512VL BROADCAST_EN Disp8(80) MASK_ENABLING > + vfpclassphx $123, 2(%ecx){1to8}, %k5 #AVX512-FP16,AVX512VL BROADCAST_EN > vfpclassph $123, (%ecx){1to16}, %k5 #AVX512-FP16,AVX512VL BROADCAST_EN > vfpclassphy $123, 4064(%ecx), %k5 #AVX512-FP16,AVX512VL Disp8(7f) > vfpclassph $123, -256(%edx){1to16}, %k5{%k7} #AVX512-FP16,AVX512VL BROADCAST_EN Disp8(80) MASK_ENABLING > + vfpclassphy $123, 2(%ecx){1to16}, %k5 #AVX512-FP16,AVX512VL BROADCAST_EN > vgetexpph %xmm5, %xmm6 #AVX512-FP16,AVX512VL > vgetexpph %xmm5, %xmm6{%k7}{z} #AVX512-FP16,AVX512VL MASK_ENABLING ZEROCTL > vgetexpph %ymm5, %ymm6 #AVX512-FP16,AVX512VL > --- a/gas/testsuite/gas/i386/avx512_fp16_vl-intel.d > +++ b/gas/testsuite/gas/i386/avx512_fp16_vl-intel.d > @@ -574,9 +574,11 @@ Disassembly of section \.text: > [ ]*[a-f0-9]+:[ ]*62 f3 7c 18 66 29 7b[ ]*vfpclassph k5,WORD BCST \[ecx\]\{1to8\},0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 08 66 69 7f 7b[ ]*vfpclassph k5,XMMWORD PTR \[ecx\+0x7f0\],0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 1f 66 6a 80 7b[ ]*vfpclassph k5\{k7\},WORD BCST \[edx-0x100\]\{1to8\},0x7b > +[ ]*[a-f0-9]+:[ ]*62 f3 7c 18 66 69 01 7b[ ]*vfpclassph k5,WORD BCST \[ecx\+0x2\]\{1to8\},0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 38 66 29 7b[ ]*vfpclassph k5,WORD BCST \[ecx\]\{1to16\},0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 28 66 69 7f 7b[ ]*vfpclassph k5,YMMWORD PTR \[ecx\+0xfe0\],0x7b > [ ]*[a-f0-9]+:[ ]*62 f3 7c 3f 66 6a 80 7b[ ]*vfpclassph k5\{k7\},WORD BCST \[edx-0x100\]\{1to16\},0x7b > +[ ]*[a-f0-9]+:[ ]*62 f3 7c 38 66 69 01 7b[ ]*vfpclassph k5,WORD BCST \[ecx\+0x2\]\{1to16\},0x7b > [ ]*[a-f0-9]+:[ ]*62 f6 7d 08 42 f5[ ]*vgetexpph xmm6,xmm5 > [ ]*[a-f0-9]+:[ ]*62 f6 7d 8f 42 f5[ ]*vgetexpph xmm6\{k7\}\{z\},xmm5 > [ ]*[a-f0-9]+:[ ]*62 f6 7d 28 42 f5[ ]*vgetexpph ymm6,ymm5 > --- a/opcodes/i386-opc.tbl > +++ b/opcodes/i386-opc.tbl > @@ -3560,38 +3560,38 @@ vucomish, 0x2e, None, CpuAVX512_FP16, Mo > vcvtdq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM } > vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { RegXMM|RegYMM|Dword|Unspecified|BaseIndex, RegXMM } > vcvtdq2ph, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM } > -vcvtdq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM } > -vcvtdq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM } > +vcvtdq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM } > +vcvtdq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM } > > vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM } > vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { RegXMM|RegYMM|Dword|Unspecified|BaseIndex, RegXMM } > vcvtudq2ph, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM } > -vcvtudq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM } > -vcvtudq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM } > +vcvtudq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM } > +vcvtudq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM } > > vcvtqq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW1|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|IntelSyntax, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM } > vcvtqq2ph, 0x5b, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW1|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegXMM|RegYMM|RegZMM|Qword|BaseIndex, RegXMM } > -vcvtqq2phz, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW1|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Unspecified|BaseIndex, RegXMM } > -vcvtqq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW1|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM } > -vcvtqq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW1|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM } > +vcvtqq2phz, 0x5b, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Qword|Unspecified|BaseIndex, RegXMM } > +vcvtqq2phx, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } > +vcvtqq2phy, 0x5b, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Qword|Unspecified|BaseIndex, RegXMM } > > vcvtuqq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW1|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|IntelSyntax, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM } > vcvtuqq2ph, 0xf27a, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW1|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegXMM|RegYMM|RegZMM|Qword|BaseIndex, RegXMM } > -vcvtuqq2phz, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW1|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Unspecified|BaseIndex, RegXMM } > -vcvtuqq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW1|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM } > -vcvtuqq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW1|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM } > +vcvtuqq2phz, 0xf27a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Qword|Unspecified|BaseIndex, RegXMM } > +vcvtuqq2phx, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } > +vcvtuqq2phy, 0xf27a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Qword|Unspecified|BaseIndex, RegXMM } > > vcvtpd2ph, 0x665a, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW1|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|IntelSyntax, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM } > vcvtpd2ph, 0x665a, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW1|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegXMM|RegYMM|RegZMM|Qword|BaseIndex, RegXMM } > -vcvtpd2phx, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW1|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM } > -vcvtpd2phy, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW1|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM } > -vcvtpd2phz, 0x665a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW1|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Unspecified|BaseIndex, RegXMM } > +vcvtpd2phx, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } > +vcvtpd2phy, 0x665a, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Qword|Unspecified|BaseIndex, RegXMM } > +vcvtpd2phz, 0x665a, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW1|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE|ATTSyntax, { RegZMM|Qword|Unspecified|BaseIndex, RegXMM } > > vcvtps2phx, 0x661d, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegZMM|Dword|Unspecified|BaseIndex, RegYMM } > vcvtps2phx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { RegXMM|RegYMM|Dword|Unspecified|BaseIndex, RegXMM } > vcvtps2phx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|RegYMM|Dword|BaseIndex, RegXMM } > -vcvtps2phxx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Unspecified|BaseIndex, RegXMM } > -vcvtps2phxy, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Unspecified|BaseIndex, RegXMM } > +vcvtps2phxx, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM } > +vcvtps2phxy, 0x661d, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=3|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM } > > vcvtw2ph, 0xf37d, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } > vcvtuw2ph, 0xf27d, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } > @@ -3675,9 +3675,9 @@ vfnmsubph, 0x668e | 0x, No > vfnmsubsh, 0x668f | 0x, None, CpuAVX512_FP16, Modrm|EVexLIG|VexVVVV|Masking=3|EVexMap6|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegXMM } > > vfpclassph, 0x66, None, CpuAVX512_FP16, Modrm|Masking=2|Space0F3A|VexW0|Broadcast|Disp8ShiftVL|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Word|BaseIndex, RegMask } > -vfpclassphz, 0x66, None, CpuAVX512_FP16, Modrm|EVex512|Masking=2|Space0F3A|VexW0|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegZMM|Unspecified|BaseIndex, RegMask } > -vfpclassphx, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=2|Space0F3A|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegXMM|Unspecified|BaseIndex, RegMask } > -vfpclassphy, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=2|Space0F3A|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegYMM|Unspecified|BaseIndex, RegMask } > +vfpclassphz, 0x66, None, CpuAVX512_FP16, Modrm|EVex512|Masking=2|Space0F3A|VexW0|Broadcast|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegZMM|Word|Unspecified|BaseIndex, RegMask } > +vfpclassphx, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=2|Space0F3A|VexW0|Broadcast|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask } > +vfpclassphy, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=2|Space0F3A|VexW0|Broadcast|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegYMM|Word|Unspecified|BaseIndex, RegMask } > vfpclasssh, 0x67, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask } > > vgetmantph, 0x26, None, CpuAVX512_FP16, Modrm|Masking=3|Space0F3A|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } > OK. Thanks. -- H.J.