From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by sourceware.org (Postfix) with ESMTPS id 728FD385D0E8 for ; Mon, 31 Oct 2022 18:58:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 728FD385D0E8 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-lj1-x22d.google.com with SMTP id u2so17889958ljl.3 for ; Mon, 31 Oct 2022 11:58:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=bATssupOOphPor3w4RC3Js/e1jxFEI35D13nWcFRN6g=; b=BHqvXy93D18YpKZJkL6phmpqGd01aKLctbkOm/IiSNP4RsMx7klV5MYoXv3iknhD08 pNT3+AYRwewfzHWFwItiZjgU+J1KpLBbMw5yoXhWvGS3Td6/a9Vdtuc92btne2oh1sn5 +33Am8cg09n0/+/NoEZcQzEVexAxVWXDsVy5aJFFQv/7qT6aSI+rStM4nyTiPrK1kX3b BIrNzAKM81tk/2oObMeHlFHrJGKe1S8A7jehd8x571WufWbzUY6BYD08KlB36IBJEFcy WS467jdm7Xyw/JylwvyNwRTM6XcYyTZrE+bW35YoFwEhAKLgcilbQocK6miPbQKzo3jO VC9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=bATssupOOphPor3w4RC3Js/e1jxFEI35D13nWcFRN6g=; b=BFkqyXadm4VrptR+XH7QyqNLRzIvHk0dzY8dZf3Mj9DNhcuLYz1/VdQrrWNFU6Gq+L 5lY9MMaOH4UzAObljz1YVkxbGGC6WoG2x+s3ykW2vp87iSJ2rSzpJvX0U9V0R3L9JeuW BQeg70YVKDfBGuXdKJDdRKZEHmDJuJ1m/mcfNxbR54FlD1RFzy7O/VZocT27GuiCEhbD EH+bMsJlNZSWmx9kB0FTSbfBZ/R52Qj/iWcy7tbdNMd7S06CfVpoBf86GAEXgqAp2Tmh V+OSdB/KxTepYx9CskyxDMROTB0oqDvd0x3yWgA8gcEQHxj+CWreaBsOEOf51bGPtehy Tstw== X-Gm-Message-State: ACrzQf3W9/avlBk63kVY8vmEZV0G0KnA8B52vLeGwwRepQQ27o2yQqDJ IoCOsnIAEGffyF4s1ObX9XH+0f3Iu20OngYww+ar1Kil X-Google-Smtp-Source: AMsMyM5nGpNGCAW2zQg3O0sG49AHCZ5ba+wISGkC3+a2n9RkR0dTQIdycbEInOLF41Mr1PxtAM2bngmsNZ3H5WT2F9s= X-Received: by 2002:a2e:9794:0:b0:277:a8e:eb6 with SMTP id y20-20020a2e9794000000b002770a8e0eb6mr5992215lji.257.1667242717853; Mon, 31 Oct 2022 11:58:37 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "H.J. Lu" Date: Mon, 31 Oct 2022 11:58:01 -0700 Message-ID: Subject: Re: [PATCH] x86: simplify expressions in update_imm() To: Jan Beulich Cc: Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3017.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, Oct 31, 2022 at 10:01 AM Jan Beulich wrote: > > Comparing the sum of the relevant .imm fields against a constant imo > makes more obvious what is actually meant. It allows dropping of two > static variables, with a 3rd drop requiring two more minor adjustments > elsewhere, utilizing that "i" is zeroed first thing in md_assemble(). > This also increases the chances of the compiler doing the calculations > all in registers. > > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -1908,12 +1908,9 @@ operand_type_xor (i386_operand_type x, i > static const i386_operand_type disp16_32 = OPERAND_TYPE_DISP16_32; > static const i386_operand_type anydisp = OPERAND_TYPE_ANYDISP; > static const i386_operand_type regxmm = OPERAND_TYPE_REGXMM; > -static const i386_operand_type imm8 = OPERAND_TYPE_IMM8; > -static const i386_operand_type imm8s = OPERAND_TYPE_IMM8S; > static const i386_operand_type imm16 = OPERAND_TYPE_IMM16; > static const i386_operand_type imm32 = OPERAND_TYPE_IMM32; > static const i386_operand_type imm32s = OPERAND_TYPE_IMM32S; > -static const i386_operand_type imm64 = OPERAND_TYPE_IMM64; > static const i386_operand_type imm16_32 = OPERAND_TYPE_IMM16_32; > static const i386_operand_type imm16_32s = OPERAND_TYPE_IMM16_32S; > static const i386_operand_type imm16_32_32s = OPERAND_TYPE_IMM16_32_32S; > @@ -3976,7 +3973,7 @@ process_immext (void) > > exp = &im_expressions[i.imm_operands++]; > i.op[i.operands].imms = exp; > - i.types[i.operands] = imm8; > + i.types[i.operands].bitfield.imm8 = 1; > i.operands++; > exp->X_op = O_constant; > exp->X_add_number = i.tm.extension_opcode; > @@ -7652,18 +7649,12 @@ static int > update_imm (unsigned int j) > { > i386_operand_type overlap = i.types[j]; > - if ((overlap.bitfield.imm8 > - || overlap.bitfield.imm8s > - || overlap.bitfield.imm16 > - || overlap.bitfield.imm32 > - || overlap.bitfield.imm32s > - || overlap.bitfield.imm64) > - && !operand_type_equal (&overlap, &imm8) > - && !operand_type_equal (&overlap, &imm8s) > - && !operand_type_equal (&overlap, &imm16) > - && !operand_type_equal (&overlap, &imm32) > - && !operand_type_equal (&overlap, &imm32s) > - && !operand_type_equal (&overlap, &imm64)) > + if (overlap.bitfield.imm8 > + + overlap.bitfield.imm8s > + + overlap.bitfield.imm16 > + + overlap.bitfield.imm32 > + + overlap.bitfield.imm32s > + + overlap.bitfield.imm64 > 1) > { > if (i.suffix) > { > @@ -7700,12 +7691,12 @@ update_imm (unsigned int j) > else if (i.prefix[DATA_PREFIX]) > overlap = operand_type_and (overlap, > flag_code != CODE_16BIT ? imm16 : imm32); > - if (!operand_type_equal (&overlap, &imm8) > - && !operand_type_equal (&overlap, &imm8s) > - && !operand_type_equal (&overlap, &imm16) > - && !operand_type_equal (&overlap, &imm32) > - && !operand_type_equal (&overlap, &imm32s) > - && !operand_type_equal (&overlap, &imm64)) > + if (overlap.bitfield.imm8 > + + overlap.bitfield.imm8s > + + overlap.bitfield.imm16 > + + overlap.bitfield.imm32 > + + overlap.bitfield.imm32s > + + overlap.bitfield.imm64 != 1) > { > as_bad (_("no instruction mnemonic suffix given; " > "can't determine immediate size")); > @@ -8064,7 +8055,7 @@ build_modrm_byte (void) > immediate operand to encode the first operand. */ > exp = &im_expressions[i.imm_operands++]; > i.op[i.operands].imms = exp; > - i.types[i.operands] = imm8; > + i.types[i.operands].bitfield.imm8 = 1; > i.operands++; > > gas_assert (i.tm.operand_types[reg_slot].bitfield.class == RegSIMD); OK. Thanks. -- H.J.