From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "binutils@sourceware.org" <binutils@sourceware.org>
Subject: Re: [PATCH 1/6] x86: allow opcode templates to be templated
Date: Fri, 06 Mar 2020 14:42:00 -0000 [thread overview]
Message-ID: <CAMe9rOpBn0_YPVRcnt9DLS0DntTWrEzTc0pCj0q0pbu0bQh8Pg@mail.gmail.com> (raw)
In-Reply-To: <c6886c82-2d96-650a-4123-a774a18748ac@suse.com>
On Fri, Mar 6, 2020 at 12:11 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> In order to reduce redundancy as well as the chance of things going out
> of sync (see a later patch for an example), make the opcode table
> generator capable of recognizing and expanding templated templates. Use
> the new capability for compacting the general purpose conditional insns.
>
> opcodes/
> 2020-03-XX Jan Beulich <jbeulich@suse.com>
>
> * i386-gen.c (struct template_arg, struct template_instance,
> struct template_param, struct template, templates,
> parse_template, expand_templates): New.
> (process_i386_opcodes): Various local variables moved to
> expand_templates. Call parse_template and expand_templates.
> * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
> * i386-tbl.h: Re-generate.
OK. Thanks.
> ---
> The set* templates lack No_bSuf - is there an expectation that in AT&T
> mode a 'b' suffix may be used on them? Otherwise this should be added
What does setb do?
> imo, as being yet another omission of commit dc2be329b950 ("i386: Only
> check suffix in instruction mnemonic").
>
--
H.J.
next prev parent reply other threads:[~2020-03-06 14:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-06 8:09 [PATCH 0/6] x86: introduce "templated" insn templates Jan Beulich
2020-03-06 8:11 ` [PATCH 1/6] x86: allow opcode templates to be templated Jan Beulich
2020-03-06 14:42 ` H.J. Lu [this message]
2020-03-06 14:51 ` Jan Beulich
2020-03-06 15:38 ` H.J. Lu
2020-03-09 9:19 ` Jan Beulich
2020-03-09 12:15 ` H.J. Lu
2020-03-06 8:12 ` [PATCH 3/6] x86: use template for SSE floating point comparison insns Jan Beulich
2020-03-06 14:43 ` H.J. Lu
2020-03-06 8:12 ` [PATCH 2/6] x86-64: Intel64 adjustments for conditional jumps Jan Beulich
2020-03-06 14:40 ` H.J. Lu
2020-03-06 14:54 ` Jan Beulich
2020-03-06 15:35 ` H.J. Lu
2020-03-09 7:11 ` Jan Beulich
2020-03-09 12:13 ` H.J. Lu
2020-03-11 8:59 ` Jan Beulich
2020-03-11 10:32 ` H.J. Lu
2020-04-24 6:36 ` Jan Beulich
2020-04-24 12:58 ` H.J. Lu
2020-03-06 8:13 ` [PATCH 5/6] x86: use template for XOP integer comparison, shift, and rotate insns Jan Beulich
2020-03-06 14:46 ` H.J. Lu
2020-03-06 8:13 ` [PATCH 4/6] x86: use template for AVX/AVX512 floating point comparison insns Jan Beulich
2020-03-06 14:45 ` H.J. Lu
2020-03-06 14:57 ` Jan Beulich
2020-03-06 15:32 ` H.J. Lu
2020-03-06 8:14 ` [PATCH 6/6] x86: use template for AVX512 integer " Jan Beulich
2020-03-06 14:46 ` H.J. Lu
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