From 2aaa41e75f8e0d62b99990f9db41aaeb5185fcc2 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Tue, 11 Feb 2020 05:39:53 -0800
Subject: [PATCH] x86: Remove movsx/movzx with memory operand from AT&T syntax

AT&T syntax requires suffix to specify memory operand size.  Since
movsx and movzx can have different memory operand sizes with the same
destination register, this patch removes movsx and movzx with memory
operand from AT&T syntax.  Since AT&T syntax uses different mnemonics
for movsx and movzx, this change should have little impact on assembly
sources.  Tested with Linux kernel 5.5.3 for x86-64 and glibc 2.31 for
i686 and x86-64.

gas/

	PR gas/25438
	* doc/c-i386.texi: Document movsx and movzx for AT&T syntax.
	* testsuite/gas/i386/i386-intel.d: Updated.
	* testsuite/gas/i386/i386.d: Likewise.
	* testsuite/gas/i386/iamcu-1.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64.d: Likewise.
	* testsuite/gas/i386/k1om.d: Likewise.
	* testsuite/gas/i386/l1om.d: Likewise.
	* testsuite/gas/i386/x86_64-intel.d: Likewise.
	* testsuite/gas/i386/x86_64.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run movszx-inval and
	x86-64-movszx-inval.
	* testsuite/gas/i386/i386.s: Remove movsx/movzx tests with
	memory operand in AT&T syntax.
	* testsuite/gas/i386/iamcu-1.s: Likewise.
	* testsuite/gas/i386/x86_64.s: Likewise.
	* testsuite/gas/i386/ilp32/x86-64.s: Likewise.
	* testsuite/gas/i386/movszx-inval.l: New file.
	* testsuite/gas/i386/movszx-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-movszx-inval.l: Likewise.
	* testsuite/gas/i386/x86-64-movszx-inval.s: Likewise.

opcodes/

	PR gas/25438
	* i386-opc.tbl: Remove movsx and movzx with memory operand in
	AT&T syntax.  Don't allow suffix with movsx and movzx in AT&T
	syntax.  Add movsxb, movsxw, movzxb and movzxw for AT&T syntax.
	* i386-tbl.h: Regenerated.
---
 gas/doc/c-i386.texi                          |  39 +++++++
 gas/testsuite/gas/i386/i386-intel.d          |   4 -
 gas/testsuite/gas/i386/i386.d                |   4 -
 gas/testsuite/gas/i386/i386.exp              |   2 +
 gas/testsuite/gas/i386/i386.s                |   4 -
 gas/testsuite/gas/i386/iamcu-1.d             |   4 -
 gas/testsuite/gas/i386/iamcu-1.s             |   4 -
 gas/testsuite/gas/i386/ilp32/x86-64.d        |  12 ---
 gas/testsuite/gas/i386/ilp32/x86-64.s        |  12 ---
 gas/testsuite/gas/i386/k1om.d                |  12 ---
 gas/testsuite/gas/i386/l1om.d                |  12 ---
 gas/testsuite/gas/i386/movszx-inval.l        |  15 +++
 gas/testsuite/gas/i386/movszx-inval.s        |   7 ++
 gas/testsuite/gas/i386/x86-64-movszx-inval.l |  19 ++++
 gas/testsuite/gas/i386/x86-64-movszx-inval.s |   9 ++
 gas/testsuite/gas/i386/x86_64-intel.d        |  12 ---
 gas/testsuite/gas/i386/x86_64.d              |  12 ---
 gas/testsuite/gas/i386/x86_64.s              |  12 ---
 opcodes/i386-opc.tbl                         |  23 ++--
 opcodes/i386-tbl.h                           | 106 +++++++++++++++----
 20 files changed, 193 insertions(+), 131 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/movszx-inval.l
 create mode 100644 gas/testsuite/gas/i386/movszx-inval.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-movszx-inval.l
 create mode 100644 gas/testsuite/gas/i386/x86-64-movszx-inval.s

diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index f0189ccb44..16ea5c6669 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -835,6 +835,45 @@ are called @samp{cbtw}, @samp{cwtl}, @samp{cwtd}, @samp{cltd}, @samp{cltq}, and
 @samp{cqto} in AT&T naming.  @code{@value{AS}} accepts either naming for these
 instructions.
 
+@cindex extension instructions, i386
+@cindex i386 extension instructions
+@cindex extension instructions, x86-64
+@cindex x86-64 extension instructions
+The Intel-syntax extension instructions
+
+@itemize @bullet
+@item
+@samp{movsx} --- sign-extend @samp{reg8/mem8} to @samp{reg16}.
+
+@samp{movsx} --- sign-extend @samp{reg8/mem8} to @samp{reg32}.
+
+@samp{movsx} --- sign-extend @samp{reg8/mem8} to @samp{reg64}
+(x86-64 only).
+
+@samp{movsx} --- sign-extend @samp{reg16/mem16} to @samp{reg32}
+
+@samp{movsx} --- sign-extend @samp{reg16/mem16} to @samp{reg64}
+(x86-64 only).
+
+@samp{movzx} --- zero-extend @samp{reg8/mem8} to @samp{reg16}.
+
+@samp{movzx} --- zero-extend @samp{reg8/mem8} to @samp{reg32}.
+
+@samp{movzx} --- zero-extend @samp{reg8/mem8} to @samp{reg64}
+(x86-64 only).
+
+@samp{movzx} --- zero-extend @samp{reg16/mem16} to @samp{reg32}
+
+@samp{movzx} --- zero-extend @samp{reg16/mem16} to @samp{reg64}
+(x86-64 only).
+@end itemize
+
+@noindent
+are called @samp{movsbw/movsxb}, @samp{movsbl/movsxb},
+@samp{movsbq/movsb}, @samp{movswl/movsxw}, @samp{movswq/movsxw},
+@samp{movzbw/movzxb}, @samp{movzbl/movzxb}, @samp{movzbq/movzxb},
+@samp{movzwl/movzxw} and @samp{movzwq/movzxw} in AT&T syntax.
+
 @cindex jump instructions, i386
 @cindex call instructions, i386
 @cindex jump instructions, x86-64
diff --git a/gas/testsuite/gas/i386/i386-intel.d b/gas/testsuite/gas/i386/i386-intel.d
index 1913e8da19..a6c9009db7 100644
--- a/gas/testsuite/gas/i386/i386-intel.d
+++ b/gas/testsuite/gas/i386/i386-intel.d
@@ -14,8 +14,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsx  si,al
 [ 	]*[a-f0-9]+:	0f be f0             	movsx  esi,al
 [ 	]*[a-f0-9]+:	0f bf f0             	movsx  esi,ax
-[ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[eax\]
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f bf 10             	movsx  edx,WORD PTR \[eax\]
@@ -25,8 +23,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzx  si,al
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzx  esi,al
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzx  esi,ax
-[ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[eax\]
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f b7 10             	movzx  edx,WORD PTR \[eax\]
diff --git a/gas/testsuite/gas/i386/i386.d b/gas/testsuite/gas/i386/i386.d
index 1c6c4cc3fd..78d3f9b334 100644
--- a/gas/testsuite/gas/i386/i386.d
+++ b/gas/testsuite/gas/i386/i386.d
@@ -13,8 +13,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
 [ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%eax\),%edx
@@ -24,8 +22,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index c4280417c5..40154f39c9 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -491,6 +491,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_list_test "inval-pseudo" "-al"
     run_dump_test "nop-1"
     run_dump_test "nop-2"
+    run_list_test "movszx-inval" "-al"
     run_dump_test "optimize-1"
     run_dump_test "optimize-1a"
     run_dump_test "optimize-2"
@@ -1052,6 +1053,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-movd-intel"
     run_dump_test "x86-64-nop-1"
     run_dump_test "x86-64-nop-2"
+    run_list_test "x86-64-movszx-inval" "-al"
     run_dump_test "x86-64-movsxd"
     run_dump_test "x86-64-movsxd-intel"
     run_list_test "x86-64-movsxd-inval" "-al"
diff --git a/gas/testsuite/gas/i386/i386.s b/gas/testsuite/gas/i386/i386.s
index 7da361f5f8..ded0a21501 100644
--- a/gas/testsuite/gas/i386/i386.s
+++ b/gas/testsuite/gas/i386/i386.s
@@ -9,8 +9,6 @@
 	movsx	%al, %si
 	movsx	%al, %esi
 	movsx	%ax, %esi
-	movsx	(%eax), %edx
-	movsx	(%eax), %dx
 	movsxb	(%eax), %dx
 	movsxb	(%eax), %edx
 	movsxw	(%eax), %edx
@@ -21,8 +19,6 @@
 	movzx	%al, %si
 	movzx	%al, %esi
 	movzx	%ax, %esi
-	movzx	(%eax), %edx
-	movzx	(%eax), %dx
 	movzxb	(%eax), %dx
 	movzxb	(%eax), %edx
 	movzxw	(%eax), %edx
diff --git a/gas/testsuite/gas/i386/iamcu-1.d b/gas/testsuite/gas/i386/iamcu-1.d
index 2b1df5de4b..baadfee96d 100644
--- a/gas/testsuite/gas/i386/iamcu-1.d
+++ b/gas/testsuite/gas/i386/iamcu-1.d
@@ -10,8 +10,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
 [ 	]*[a-f0-9]+:	0f be f0             	movsbl %al,%esi
 [ 	]*[a-f0-9]+:	0f bf f0             	movswl %ax,%esi
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%eax\),%edx
@@ -21,8 +19,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
 [ 	]*[a-f0-9]+:	0f b6 f0             	movzbl %al,%esi
 [ 	]*[a-f0-9]+:	0f b7 f0             	movzwl %ax,%esi
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%eax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%eax\),%edx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/iamcu-1.s b/gas/testsuite/gas/i386/iamcu-1.s
index b631dfa17e..58e221fe0e 100644
--- a/gas/testsuite/gas/i386/iamcu-1.s
+++ b/gas/testsuite/gas/i386/iamcu-1.s
@@ -4,8 +4,6 @@
 	movsx	%al, %si
 	movsx	%al, %esi
 	movsx	%ax, %esi
-	movsx	(%eax), %edx
-	movsx	(%eax), %dx
 	movsxb	(%eax), %dx
 	movsxb	(%eax), %edx
 	movsxw	(%eax), %edx
@@ -16,8 +14,6 @@
 	movzx	%al, %si
 	movzx	%al, %esi
 	movzx	%ax, %esi
-	movzx	(%eax), %edx
-	movzx	(%eax), %dx
 	movzxb	(%eax), %dx
 	movzxb	(%eax), %edx
 	movzxw	(%eax), %edx
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64.d b/gas/testsuite/gas/i386/ilp32/x86-64.d
index 33722c90f9..7fa204b949 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64.d
@@ -165,9 +165,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
@@ -181,9 +178,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b7 10          	movzwq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
@@ -219,9 +213,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -229,9 +220,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64.s b/gas/testsuite/gas/i386/ilp32/x86-64.s
index d1f7ae3b49..2009c1038e 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64.s
+++ b/gas/testsuite/gas/i386/ilp32/x86-64.s
@@ -194,9 +194,6 @@ cmpxchg16b oword ptr [rax]
 	movsx	%ax, %esi
 	movsx	%ax, %rsi
 	movsx	%eax, %rsi
-	movsx	(%rax), %edx
-	movsx	(%rax), %rdx
-	movsx	(%rax), %dx
 	movsbl	(%rax), %edx
 	movsbq	(%rax), %rdx
 	movsbw	(%rax), %dx
@@ -208,9 +205,6 @@ cmpxchg16b oword ptr [rax]
 	movzx	%al, %rsi
 	movzx	%ax, %esi
 	movzx	%ax, %rsi
-	movzx	(%rax), %edx
-	movzx	(%rax), %rdx
-	movzx	(%rax), %dx
 	movzb	(%rax), %edx
 	movzb	(%rax), %rdx
 	movzb	(%rax), %dx
@@ -262,9 +256,6 @@ cmpxchg16b oword ptr [rax]
 	fstsw	ax
 
 .att_syntax
-movsx (%rax),%ax
-movsx (%rax),%eax
-movsx (%rax),%rax
 movsxb	(%rax), %dx
 movsxb	(%rax), %edx
 movsxb	(%rax), %rdx
@@ -272,9 +263,6 @@ movsxw	(%rax), %edx
 movsxw	(%rax), %rdx
 movsxl	(%rax), %rdx
 movsxd (%rax),%rax
-movzx (%rax),%ax
-movzx (%rax),%eax
-movzx (%rax),%rax
 movzxb	(%rax), %dx
 movzxb	(%rax), %edx
 movzxb	(%rax), %rdx
diff --git a/gas/testsuite/gas/i386/k1om.d b/gas/testsuite/gas/i386/k1om.d
index 7767f5b418..c7c2572b8e 100644
--- a/gas/testsuite/gas/i386/k1om.d
+++ b/gas/testsuite/gas/i386/k1om.d
@@ -178,9 +178,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
@@ -194,9 +191,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b7 10          	movzwq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
@@ -232,9 +226,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -242,9 +233,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/l1om.d b/gas/testsuite/gas/i386/l1om.d
index 858d1827f9..db0ab5e17b 100644
--- a/gas/testsuite/gas/i386/l1om.d
+++ b/gas/testsuite/gas/i386/l1om.d
@@ -178,9 +178,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
@@ -194,9 +191,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b7 10          	movzwq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
@@ -232,9 +226,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -242,9 +233,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/movszx-inval.l b/gas/testsuite/gas/i386/movszx-inval.l
new file mode 100644
index 0000000000..152153b7b3
--- /dev/null
+++ b/gas/testsuite/gas/i386/movszx-inval.l
@@ -0,0 +1,15 @@
+.*: Assembler messages:
+.*:4: Error: .*
+.*:5: Error: .*
+.*:6: Error: .*
+.*:7: Error: .*
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# Invalid 32-bit movsx and movzx\.
+[ 	]*2[ 	]+\.text
+[ 	]*3[ 	]+_start:
+[ 	]*4[ 	]+movsx	\(%eax\), %edx
+[ 	]*5[ 	]+movsx	\(%eax\), %dx
+[ 	]*6[ 	]+movzx	\(%eax\), %edx
+[ 	]*7[ 	]+movzx	\(%eax\), %dx
diff --git a/gas/testsuite/gas/i386/movszx-inval.s b/gas/testsuite/gas/i386/movszx-inval.s
new file mode 100644
index 0000000000..ab6fb8dc10
--- /dev/null
+++ b/gas/testsuite/gas/i386/movszx-inval.s
@@ -0,0 +1,7 @@
+# Invalid 32-bit movsx and movzx.
+	.text
+_start:
+	movsx	(%eax), %edx
+	movsx	(%eax), %dx
+	movzx	(%eax), %edx
+	movzx	(%eax), %dx
diff --git a/gas/testsuite/gas/i386/x86-64-movszx-inval.l b/gas/testsuite/gas/i386/x86-64-movszx-inval.l
new file mode 100644
index 0000000000..cc75bce8c7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movszx-inval.l
@@ -0,0 +1,19 @@
+.*: Assembler messages:
+.*:4: Error: .*
+.*:5: Error: .*
+.*:6: Error: .*
+.*:7: Error: .*
+.*:8: Error: .*
+.*:9: Error: .*
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# Invalid 64-bit movsx and movzx\.
+[ 	]*2[ 	]+\.text
+[ 	]*3[ 	]+_start:
+[ 	]*4[ 	]+movsx	\(%rax\), %rdx
+[ 	]*5[ 	]+movsx	\(%rax\), %edx
+[ 	]*6[ 	]+movsx	\(%rax\), %dx
+[ 	]*7[ 	]+movzx	\(%rax\), %rdx
+[ 	]*8[ 	]+movzx	\(%rax\), %edx
+[ 	]*9[ 	]+movzx	\(%rax\), %dx
diff --git a/gas/testsuite/gas/i386/x86-64-movszx-inval.s b/gas/testsuite/gas/i386/x86-64-movszx-inval.s
new file mode 100644
index 0000000000..1c8dfe71a8
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movszx-inval.s
@@ -0,0 +1,9 @@
+# Invalid 64-bit movsx and movzx.
+	.text
+_start:
+	movsx	(%rax), %rdx
+	movsx	(%rax), %edx
+	movsx	(%rax), %dx
+	movzx	(%rax), %rdx
+	movzx	(%rax), %edx
+	movzx	(%rax), %dx
diff --git a/gas/testsuite/gas/i386/x86_64-intel.d b/gas/testsuite/gas/i386/x86_64-intel.d
index 8dd8893e79..91bb1ae4f6 100644
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -176,9 +176,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f bf 10             	movsx  edx,WORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movsx  rdx,WORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzx  si,al
@@ -192,9 +189,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f b7 10             	movzx  edx,WORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b7 10          	movzx  rdx,WORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsx  si,al
@@ -230,9 +224,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsx  ax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f be 00             	movsx  eax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsx  rax,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f be 10             	movsx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsx  rdx,BYTE PTR \[rax\]
@@ -240,9 +231,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movsx  rdx,WORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 63 10             	movsxd rdx,DWORD PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 63 00             	movsxd rax,DWORD PTR \[rax\]
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzx  ax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	0f b6 00             	movzx  eax,BYTE PTR \[rax\]
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzx  rax,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzx  dx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	0f b6 10             	movzx  edx,BYTE PTR \[rax\]
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzx  rdx,BYTE PTR \[rax\]
diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index 0bdbc79021..dfc7d4af94 100644
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -176,9 +176,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f bf 10             	movswl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 f0          	movzbw %al,%si
@@ -192,9 +189,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
-[ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
-[ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
-[ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b7 10             	movzwl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b7 10          	movzwq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	66 0f be f0          	movsbw %al,%si
@@ -230,9 +224,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df e0                	fnstsw %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
 [ 	]*[a-f0-9]+:	9b df e0             	fstsw  %ax
-[ 	]*[a-f0-9]+:	66 0f be 00          	movsbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f be 00             	movsbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f be 00          	movsbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f be 10          	movsbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f be 10             	movsbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f be 10          	movsbq \(%rax\),%rdx
@@ -240,9 +231,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	48 0f bf 10          	movswq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 10             	movslq \(%rax\),%rdx
 [ 	]*[a-f0-9]+:	48 63 00             	movslq \(%rax\),%rax
-[ 	]*[a-f0-9]+:	66 0f b6 00          	movzbw \(%rax\),%ax
-[ 	]*[a-f0-9]+:	0f b6 00             	movzbl \(%rax\),%eax
-[ 	]*[a-f0-9]+:	48 0f b6 00          	movzbq \(%rax\),%rax
 [ 	]*[a-f0-9]+:	66 0f b6 10          	movzbw \(%rax\),%dx
 [ 	]*[a-f0-9]+:	0f b6 10             	movzbl \(%rax\),%edx
 [ 	]*[a-f0-9]+:	48 0f b6 10          	movzbq \(%rax\),%rdx
diff --git a/gas/testsuite/gas/i386/x86_64.s b/gas/testsuite/gas/i386/x86_64.s
index 377580be34..03e672fded 100644
--- a/gas/testsuite/gas/i386/x86_64.s
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -208,9 +208,6 @@ cmpxchg16b oword ptr [rax]
 	movsx	%ax, %esi
 	movsx	%ax, %rsi
 	movsx	%eax, %rsi
-	movsx	(%rax), %edx
-	movsx	(%rax), %rdx
-	movsx	(%rax), %dx
 	movsbl	(%rax), %edx
 	movsbq	(%rax), %rdx
 	movsbw	(%rax), %dx
@@ -222,9 +219,6 @@ cmpxchg16b oword ptr [rax]
 	movzx	%al, %rsi
 	movzx	%ax, %esi
 	movzx	%ax, %rsi
-	movzx	(%rax), %edx
-	movzx	(%rax), %rdx
-	movzx	(%rax), %dx
 	movzb	(%rax), %edx
 	movzb	(%rax), %rdx
 	movzb	(%rax), %dx
@@ -276,9 +270,6 @@ cmpxchg16b oword ptr [rax]
 	fstsw	ax
 
 .att_syntax
-movsx (%rax),%ax
-movsx (%rax),%eax
-movsx (%rax),%rax
 movsxb	(%rax), %dx
 movsxb	(%rax), %edx
 movsxb	(%rax), %rdx
@@ -286,9 +277,6 @@ movsxw	(%rax), %edx
 movsxw	(%rax), %rdx
 movsxl	(%rax), %rdx
 movsxd (%rax),%rax
-movzx (%rax),%ax
-movzx (%rax),%eax
-movzx (%rax),%rax
 movzxb	(%rax), %dx
 movzxb	(%rax), %edx
 movzxb	(%rax), %rdx
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index d805e6916a..bbdf01cb12 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -132,10 +132,13 @@ movswl, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf
 movsbq, 2, 0xfbe, None, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg8|Byte|Unspecified|BaseIndex, Reg64 }
 movswq, 2, 0xfbf, None, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg16|Word|Unspecified|BaseIndex, Reg64 }
 movslq, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg32|Dword|Unspecified|BaseIndex, Reg64 }
-// Intel Syntax next 3 insns
-movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
-movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|ATTSyntax, { Reg32|Unspecified|BaseIndex, Reg64 }
+// Intel Syntax next 6 insns
+movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8, Reg16|Reg32|Reg64 }
+movsxb, 2, 0xfbe, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
+movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16, Reg32|Reg64 }
+movsxw, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex, Reg32|Reg64 }
+movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg32, Reg64 }
+movsxl, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex, Reg64 }
 movsx, 2, 0xfbe, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
 movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
 movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|IntelSyntax, { Reg32|Dword|BaseIndex, Reg64 }
@@ -146,12 +149,14 @@ movsxd, 2, 0x63, None, 1, Cpu64, Intel64|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
 // Move with zero extend.
 movzb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 movzw, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex, Reg32|Reg64 }
-// Intel Syntax next 2 insns (the 64-bit variants are not particulary
+// Intel Syntax next 4 insns (the 64-bit variants are not particulary
 // useful since the zero extend 32->64 is implicit, but we can encode them).
-movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
-movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
-movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
+movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8, Reg16|Reg32|Reg64 }
+movzxb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
+movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg16, Reg32|Reg64 }
+movzxw, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Unspecified|BaseIndex, Reg32|Reg64 }
+movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg8|Byte|BaseIndex, Reg16|Reg32|Reg64 }
+movzx, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IntelSyntax, { Reg16|Word|BaseIndex, Reg32|Reg64 }
 
 // Push instructions.
 push, 1, 0x50, None, 1, CpuNo64, No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32 }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 860646c923..b71e841897 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -351,11 +351,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movsx", 0xfbf, None, 2, 2,
@@ -365,11 +365,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movsx", 0x63, None, 1, 2,
@@ -379,11 +379,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movsx", 0xfbe, None, 2, 2,
@@ -428,6 +428,48 @@ const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
+  { "movsxb", 0xfbe, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
+  { "movsxw", 0xfbf, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
+  { "movsxl", 0x63, None, 1, 2,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
   { "movsxd", 0x63, None, 1, 2,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -505,11 +547,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movzx", 0xfb7, None, 2, 2,
@@ -519,11 +561,11 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
   { "movzx", 0xfb6, None, 2, 2,
@@ -533,7 +575,7 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0,
@@ -547,13 +589,41 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
 	  0, 0, 0, 0, 0, 0 } } } },
+  { "movzxb", 0xfb6, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
+  { "movzxw", 0xfb7, None, 2, 2,
+    { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 },
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 1, 0 } },
+      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
+	  0, 0, 0, 0, 0, 0 } } } },
   { "push", 0x50, None, 1, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 
2.24.1

