From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by sourceware.org (Postfix) with ESMTPS id 57AEC385DC31 for ; Wed, 18 May 2022 17:36:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 57AEC385DC31 Received: by mail-pf1-x42d.google.com with SMTP id a11so2808034pff.1 for ; Wed, 18 May 2022 10:36:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/0hul7kB/bZU1GOo2G5tWXqucvFRebOP6HmvBVaruzM=; b=skhjStkx6cZVY2IDngNmentO8MnENFztI49QEifgrPJe23RQ+RuBNehKanMhNcYpRB Pat/efDSGSCBPUuX9iJxbCBCv6opnvzNh3YLdZe5HDfBT4dQIFHQgY/VwazMvAFZqcfh sFcXprqV9mrmb1Gy58+tDgy1T8R4NY9nm6YrBSthLCU322aZy/XOqb+SWSsfTCkvJPLb /ERg66n1mWcSsuk/hAzzirn5kqjTyhLfuAW2ky/K5HLi6qMe0IccEAiF6Ci7Od3WDtiH r0KajScONL7SGylc4K9umG1XnkXMZBhzl7WrZYeUrJ/w6ZD+wpc3hwkgzjdYkzdEYvCw LiBA== X-Gm-Message-State: AOAM531BN3ibcjDCKPsbgpmkMVTFoNGO8qCZmXt1xLUM94ibQVx9+jP5 DDX2iHtwqxSr3Gd/8U0DrVXFl+PFlVozCkFqk11NvL6U X-Google-Smtp-Source: ABdhPJwHGY/WuBvmOX7yYJOo0vJjTw569eA99xx88/cNh4RQmzHjHDZPKeE3jCQwz5ssx0QveDQ1O/jyI+kFp6AcHfc= X-Received: by 2002:a63:dd14:0:b0:3d8:204c:2f29 with SMTP id t20-20020a63dd14000000b003d8204c2f29mr459920pgg.512.1652895377296; Wed, 18 May 2022 10:36:17 -0700 (PDT) MIME-Version: 1.0 References: <71289a41-ce42-dcd2-bcea-8c110c7b66af@suse.com> In-Reply-To: <71289a41-ce42-dcd2-bcea-8c110c7b66af@suse.com> From: "H.J. Lu" Date: Wed, 18 May 2022 10:35:41 -0700 Message-ID: Subject: Re: [PATCH] x86: VFPCLASSSH is Evex.LLIG To: Jan Beulich Cc: Binutils , Lili Cui Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3018.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, LOTS_OF_MONEY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 May 2022 17:36:20 -0000 On Tue, Apr 19, 2022 at 12:31 AM Jan Beulich wrote: > > This also was mistakenly flagged as Evex.128. > > --- a/gas/testsuite/gas/i386/evex-lig.s > +++ b/gas/testsuite/gas/i386/evex-lig.s > @@ -1710,6 +1710,12 @@ _start: > vcmpsh $123, 254(%ecx), %xmm5, %k5 # AVX512-FP16 Disp8 > vcmpsh $123, -256(%edx), %xmm5, %k5{%k7} # AVX512-FP16 Disp8 > > + vfpclasssh $123, %xmm4, %k5 # AVX512-FP16 > + vfpclasssh $123, (%ecx), %k5 # AVX512-FP16 > + vfpclasssh $123, -123456(%esp, %esi, 8), %k5{%k7} # AVX512-FP16 > + vfpclasssh $123, 254(%ecx), %k5 # AVX512-FP16 Disp8 > + vfpclasssh $123, -256(%edx), %k5{%k7} # AVX512-FP16 Disp8 > + > .intel_syntax noprefix > vaddsd xmm6{k7}, xmm5, xmm4 # AVX512 > vaddsd xmm6{k7}{z}, xmm5, xmm4 # AVX512 > @@ -3416,3 +3422,9 @@ _start: > vcmpsh k5{k7}, xmm5, WORD PTR [esp+esi*8-123456], 123 # AVX512-FP16 > vcmpsh k5, xmm5, WORD PTR [ecx+254], 123 # AVX512-FP16 Disp8 > vcmpsh k5{k7}, xmm5, WORD PTR [edx-256], 123 # AVX512-FP16 Disp8 > + > + vfpclasssh k5, xmm4, 123 # AVX512-FP16 > + vfpclasssh k5, WORD PTR [ecx], 123 # AVX512-FP16 > + vfpclasssh k5{k7}, WORD PTR [esp+esi*8-123456], 123 # AVX512-FP16 > + vfpclasssh k5, WORD PTR [ecx+254], 123 # AVX512-FP16 Disp8 > + vfpclasssh k5{k7}, WORD PTR [edx-256], 123 # AVX512-FP16 Disp8 > --- a/gas/testsuite/gas/i386/evex-lig256-intel.d > +++ b/gas/testsuite/gas/i386/evex-lig256-intel.d > @@ -1542,6 +1542,11 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 ec 7b vfpclasssh k5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 29 7b vfpclasssh k5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 69 7f 7b vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 6a 80 7b vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b > [ ]*[a-f0-9]+: 62 f1 d7 2f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 af 58 f4 vaddsd xmm6\{k7\}\{z\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\} > @@ -3075,4 +3080,9 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 ec 7b vfpclasssh k5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 29 7b vfpclasssh k5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 69 7f 7b vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 6a 80 7b vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b > #pass > --- a/gas/testsuite/gas/i386/evex-lig256.d > +++ b/gas/testsuite/gas/i386/evex-lig256.d > @@ -1542,6 +1542,11 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > [ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 ec 7b vfpclasssh \$0x7b,%xmm4,%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 29 7b vfpclasssh \$0x7b,\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 69 7f 7b vfpclasssh \$0x7b,0xfe\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 6a 80 7b vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 2f 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 af 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\} > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\} > @@ -3075,4 +3080,9 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > [ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 ec 7b vfpclasssh \$0x7b,%xmm4,%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 29 7b vfpclasssh \$0x7b,\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 28 67 69 7f 7b vfpclasssh \$0x7b,0xfe\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 2f 67 6a 80 7b vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\} > #pass > --- a/gas/testsuite/gas/i386/evex-lig512-intel.d > +++ b/gas/testsuite/gas/i386/evex-lig512-intel.d > @@ -1542,6 +1542,11 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 ec 7b vfpclasssh k5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 29 7b vfpclasssh k5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 69 7f 7b vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 6a 80 7b vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b > [ ]*[a-f0-9]+: 62 f1 d7 4f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 cf 58 f4 vaddsd xmm6\{k7\}\{z\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\} > @@ -3075,4 +3080,9 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > [ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 ec 7b vfpclasssh k5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 29 7b vfpclasssh k5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 69 7f 7b vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 6a 80 7b vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b > #pass > --- a/gas/testsuite/gas/i386/evex-lig512.d > +++ b/gas/testsuite/gas/i386/evex-lig512.d > @@ -1542,6 +1542,11 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > [ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 ec 7b vfpclasssh \$0x7b,%xmm4,%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 29 7b vfpclasssh \$0x7b,\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 69 7f 7b vfpclasssh \$0x7b,0xfe\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 6a 80 7b vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 4f 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 cf 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\} > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\} > @@ -3075,4 +3080,9 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > [ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 ec 7b vfpclasssh \$0x7b,%xmm4,%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 29 7b vfpclasssh \$0x7b,\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 7c 48 67 69 7f 7b vfpclasssh \$0x7b,0xfe\(%ecx\),%k5 > +[ ]*[a-f0-9]+: 62 f3 7c 4f 67 6a 80 7b vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\} > #pass > --- a/opcodes/i386-opc.tbl > +++ b/opcodes/i386-opc.tbl > @@ -3918,8 +3918,7 @@ vfpclassph, 0x66, None, CpuAVX512_FP16, > vfpclassphz, 0x66, None, CpuAVX512_FP16, Modrm|EVex512|Masking=2|Space0F3A|VexW0|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegZMM|Unspecified|BaseIndex, RegMask } > vfpclassphx, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=2|Space0F3A|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegXMM|Unspecified|BaseIndex, RegMask } > vfpclassphy, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=2|Space0F3A|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegYMM|Unspecified|BaseIndex, RegMask } > - > -vfpclasssh, 0x67, None, CpuAVX512_FP16, Modrm|EVex128|Masking=2|Space0F3A|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask } > +vfpclasssh, 0x67, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask } > > vgetmantph, 0x26, None, CpuAVX512_FP16, Modrm|Masking=3|Space0F3A|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } > vgetmantph, 0x26, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|Space0F3A|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM, RegZMM } > OK. Thanks. -- H.J.