From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by sourceware.org (Postfix) with ESMTPS id 9A16838582AF for ; Mon, 24 Oct 2022 19:18:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9A16838582AF Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-lf1-x135.google.com with SMTP id r14so18354184lfm.2 for ; Mon, 24 Oct 2022 12:18:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=vQddp8XiSqzzvpbTZMvBvk6dJrmYrRzjzkcewFKIkL0=; b=ckTB8mZosjOepbrfDBDjcNtS27OISzTxgRlfBLOne54QhYmrHZIeytgElVLf9w2rtJ NtV0gukuo9REwU22vkM7ybLn6XnInBlCToVbPjDSrQq/Q3rxX2CuKh6O42T0AgPuatgh ToST/jFqZi1+3UKZAvXxLZS7dGtgEMZXNFydKYGkuVOXABtTpqXGejsmmQGx+GIzpKIL pDi8Kw3S2wW9qRTpg9Ktpb1N2smNfa4q+LmnoSQBx92Dx7B7rQXhft4AyymJfvAOX1T7 frRHeaHJzl7S8XqmlY1eDSOHBZEM/i3WPQwiYSSHOshlGfGpmauXpf2ySC2od3rRKmGy TA1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=vQddp8XiSqzzvpbTZMvBvk6dJrmYrRzjzkcewFKIkL0=; b=L5i1/6k66z809lPE4Aqjv5ykZzcpsyz5UXiQk2Pu1oLlY+U1dPewNpPWuhI+yUfdso /DZf+duuh4eHh37GYsOMY8mkQzy9VJVam9EYYYkWxM5+w0pbc0MUEz425Ry+W4POL6MY ZiDokde1Qy3ix6URqNbxItUi+forY8FtWRizb3JGU5P7sVlv8KpCJpVG8FzBsmEWfpbW KDZpyH07yGqdkfdxRONghv41EBN3yl/sGOInLF0rtdjn+zsXoX+I7m2fI5T/PZPaTiGD yEIeiPLeWX5p3LbCCJX1b1DibfzdmKpc8Xa20gnn4taR7vWKAOuzZsF0miXuVv5VsbM9 FisQ== X-Gm-Message-State: ACrzQf1g5ei7wvCeGm0MQ5cZEaGnmKvi4/aTMO37/FwujSWSRLZw9k6Z wjDvvewv+XHv5FV2INdTMgRZPX7tdW2FVE62iRo= X-Google-Smtp-Source: AMsMyM6ervvUsvlFnsy5hfcc6LmEAVcyG5Q4DPNaV4Wd2Cc1nCMCGGgy5R9VaugI6bbWekdRVHK2z+e0st8QMetXATg= X-Received: by 2002:a05:6512:4002:b0:4a2:6243:8384 with SMTP id br2-20020a056512400200b004a262438384mr11956901lfb.29.1666639083882; Mon, 24 Oct 2022 12:18:03 -0700 (PDT) MIME-Version: 1.0 References: <20221014091248.4920-1-haochen.jiang@intel.com> <20221014091248.4920-7-haochen.jiang@intel.com> <1e6a7d9c-4b14-821e-cc46-453adbe6f183@suse.com> In-Reply-To: From: "H.J. Lu" Date: Mon, 24 Oct 2022 12:17:27 -0700 Message-ID: Subject: Re: [PATCH 06/10] Support Intel RAO-INT To: "Jiang, Haochen" Cc: "Beulich, Jan" , "Kong, Lingling" , "binutils@sourceware.org" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3016.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Sun, Oct 23, 2022 at 8:12 PM Jiang, Haochen wrote: > > > -----Original Message----- > > From: Jan Beulich > > Sent: Friday, October 14, 2022 10:38 PM > > To: Jiang, Haochen > > Cc: hjl.tools@gmail.com; Kong, Lingling ; > > binutils@sourceware.org > > Subject: Re: [PATCH 06/10] Support Intel RAO-INT > > > > On 14.10.2022 11:12, Haochen Jiang wrote: > > > --- a/gas/config/tc-i386.c > > > +++ b/gas/config/tc-i386.c > > > @@ -1097,7 +1097,8 @@ static const arch_entry cpu_arch[] = > > > SUBARCH (avx_ifma, AVX_IFMA, ANY_AVX_IFMA, false), > > > SUBARCH (avx_vnni_int8, AVX_VNNI_INT8, ANY_AVX_VNNI_INT8, false), > > > SUBARCH (avx_ne_convert, AVX_NE_CONVERT, ANY_AVX_NE_CONVERT, > > > false), > > > - SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false) > > > + SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false), SUBARCH > > > + (raoint, RAOINT, ANY_RAOINT, false), > > > > As for the earlier patch - likely no need for ANY_RAOINT. Also please have the > > earlier patch add the comma so you don't need to touch that line again here > > (helping at least "git blame"). > > Done and fixed for CMPccXADD patch. Please also remove CPU_ANY_RAO_INT_FLAGS since it isn't used. > > > > > > --- a/opcodes/i386-dis.c > > > +++ b/opcodes/i386-dis.c > > > @@ -887,6 +887,7 @@ enum > > > MOD_0F38F9, > > > MOD_0F38FA_PREFIX_1, > > > MOD_0F38FB_PREFIX_1, > > > + MOD_0F38FC, > > > MOD_0F3A0F_PREFIX_1, > > > > > > MOD_VEX_0F12_PREFIX_0, > > > @@ -1086,6 +1087,7 @@ enum > > > PREFIX_0F38F8, > > > PREFIX_0F38FA, > > > PREFIX_0F38FB, > > > + PREFIX_0F38FC, > > > > PREFIX_0F38FC_M_0 please (see comment on an earlier patch). However, like in > > the earlier patch - if you used Mdq below, you could avoid going through > > mod_table[] altogether. > > Removed pass modrm table since Edq seems also judges modrm. > > > > > > @@ -3598,6 +3600,14 @@ static const struct dis386 prefix_table[][4] = { > > > { MOD_TABLE (MOD_0F38FB_PREFIX_1) }, > > > }, > > > > > > + /* PREFIX_0F38FC */ > > > + { > > > + { "aadd", { Edq, Gdq }, PREFIX_OPCODE }, > > > + { "axor", { Edq, Gdq }, PREFIX_OPCODE }, > > > + { "aand", { Edq, Gdq }, PREFIX_OPCODE }, > > > + { "aor", { Edq, Gdq }, PREFIX_OPCODE }, > > > + }, > > > > Once having gone through prefix_table[], PREFIX_OPCODE (and > > PREFIX_DATA) are meaningless iirc and should hence be omitted. > > > > Fixed. > > > > --- a/opcodes/i386-opc.tbl > > > +++ b/opcodes/i386-opc.tbl > > > @@ -3317,3 +3317,12 @@ cmpsxadd, 0x66e8, None, CpuCMPCCXADD|Cpu64, > > > Modrm|Vex128|Space0F38|VexVVVV=1|Swa > > > cmpzxadd, 0x66e4, None, CpuCMPCCXADD|Cpu64, > > > > > Modrm|Vex128|Space0F38|VexVVVV=1|SwapSources|CheckRegSize|No_bSuf| > > No_w > > > Suf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64, > > > Dword|Qword|Unspecified|BaseIndex } > > > > > > // CMPCCXADD instructions end. > > > + > > > +// RAOINT instructions. > > > > Nit: Better RAO-INT, like in the title? > > Done. > > > > > > +aadd, 0xf38fc, None, CpuRAOINT, > > > +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64, > > > +Dword|Qword|Unspecified|BaseIndex} > > > +aand, 0x660f38fc, None, CpuRAOINT, > > > +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64, > > > +Dword|Qword|Unspecified|BaseIndex} > > > +aor, 0xf20f38fc, None, CpuRAOINT, > > > +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64, > > > +Dword|Qword|Unspecified|BaseIndex} > > > +axor, 0xf30f38fc, None, CpuRAOINT, > > > +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64, > > > +Dword|Qword|Unspecified|BaseIndex} > > > > Why IgnoreSize? Instead I think you need CheckRegSize (assuming it does > > enough for Intel syntax memory operands - please double check; if not this will > > need fixing). > > > > For table, we aligned with CMPccXADD and added No_lSuf and No_qSuf since > the suffixes are not required. > > In future, if suffixes are not required, we will add all the No_xxSuf. > > BTW, can we write a macro named No_allSuf including all of them to shorten > the line? > > Haochen > > Jan -- H.J.