From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by sourceware.org (Postfix) with ESMTPS id 0B9E438133EB for ; Tue, 7 Jun 2022 21:39:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0B9E438133EB Received: by mail-pj1-x102a.google.com with SMTP id w13-20020a17090a780d00b001e8961b355dso4839596pjk.5 for ; Tue, 07 Jun 2022 14:39:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Sr+e9wi+KHoEBXE4XfpUoEDiqe/ZQjmZ2G/1C+qArXY=; b=pTBjqttou16iMTc2zIRWW4XtEU54PWLc0oEKiJ91fpC53qM7vvmgYfmnvBkTAa8xwX dVrfEgWN8K1IUtX7zSjkwwdQifb8WeuSq5h4HJWVSsY9evFA/2VxEJAFUqMLNNtoNXph YS6NogyqBwpqRPOb7TmvNHmbW4CE/qvqvUK/FBYkN9+1+VbCIomF3GS3KzBuvmfbDlVH ieuyS7i1Ck1ikNd58AdmlbI/Cw4DhI4FmjW9RcorO5T514ByYAAq5cNjJhezwCCNtpNc kdeNMgoqmULwUCPOU90M5hBF4wHY/iMoIHOOK6RPIsqr51wPqTXsI61yghGpkZQAcIAK 5Xlw== X-Gm-Message-State: AOAM533RVclnFC6cljE5H69KewtYrTTbpUGXxE4uCxkoxV3gviIrCNBw 1bM6zbuA/y2N2vv+5zesRdm+ZVm7fZHwUlNwIRM= X-Google-Smtp-Source: ABdhPJxvtAqugDRhBCWy/qm2JBBiH2QidlyshsgB6jHyAwcT7haXEQ12XfqEs0oDzI11sHTpZzzazrMiosZ/Wg0ejic= X-Received: by 2002:a17:902:a502:b0:15e:c251:b769 with SMTP id s2-20020a170902a50200b0015ec251b769mr29760941plq.115.1654637996127; Tue, 07 Jun 2022 14:39:56 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "H.J. Lu" Date: Tue, 7 Jun 2022 14:39:20 -0700 Message-ID: Subject: Re: x86 ISA v3 / v4 coverage To: Michael Matz Cc: Jan Beulich , Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3019.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Jun 2022 21:39:58 -0000 On Tue, Jun 7, 2022 at 6:13 AM Michael Matz wrote: > > Hello, > > On Thu, 2 Jun 2022, H.J. Lu via Binutils wrote: > > > On Thu, Jun 2, 2022 at 7:31 AM Jan Beulich wrote: > > > > > > H.J., > > > > > > the other day I came to notice two apparent anomalies: > > > > > > Shouldn't XOP and FMA4 be excluded from v3, just like LWP and TBM are? > > > > Yes, they should be excluded since they don't require v3. > > > > > Shouldn't AVX512_4FMAPS be excluded from v4, just like AVX512_4VNNIW is? > > > > Yes, it should be since it doesn't require v4. > > > > > And is it correct for new ISA additions (like not so long ago AVX512-FP16) > > > to become part of what is covered by v3 or v4? AMX, for example, was > > > > AVX512_FP16 requires v4. > > But it can't be part of v3 or v4. New ISA additions never can become > part of an existing ISA level, once it's released it's fixated. I just > wanted to state this explicitely because it seems Jan used "part of vX" > to mean "binaries stating to require vX can use ISA feature so-and-so", > whereas you seem to mean "ISA feature so-and-so requires at least vX". > This is because the ISA level marker is a minimum requirement. -- H.J.