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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 2/6] x86: shrink some struct insn_template fields
Date: Mon, 29 Mar 2021 07:51:16 -0700	[thread overview]
Message-ID: <CAMe9rOq7uJHV0dHC8-+gR0NpTdDOaHHmuTfC5yzBOKydgt-6iw@mail.gmail.com> (raw)
In-Reply-To: <c26cc55d-3418-13c1-b28d-f9e61d9a12e8@suse.com>

On Mon, Mar 29, 2021 at 7:49 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 29.03.2021 16:41, H.J. Lu wrote:
> > On Mon, Mar 29, 2021 at 7:03 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>
> >> On 29.03.2021 15:00, H.J. Lu wrote:
> >>> On Fri, Mar 26, 2021 at 3:50 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>>>
> >>>> Now that all base opcodes are only at most 2 bytes in size, shrink its
> >>>> template field to just as much. By also shrinking extension_opcode and
> >>>> operands to just what they really need, we can free up an entire 32-bit
> >>>> slot (plus 4 left bits past the bitfields themselves).
> >>>>
> >>>> At present this alters sizeof(struct insn_template) only for 32-bit
> >>>> builds. In 64-bit builds it instead leaves a padding hole that will
> >>>> allow to buffer future growth of other fields (opcode_modifier,
> >>>> cpu_flags, operand_types[]).
> >>>>
> >>>> opcodes/
> >>>> 2021-03-XX  Jan Beulich  <jbeulich@suse.com>
> >>>>
> >>>>         * i386-opc.h (struct insn_template): Shrink base_opcode to 16
> >>>>         bits. Shrink extension_opcode to 9 bits. Make it signed. Change
> >>>>         value of None. Shrink operands to 3 bits.
> >>>> ---
> >>>> Code-generation wise it may be better to move the signed
> >>>> extension_opcode field last within the containing 32-bit slot.
> >>>
> >>> extension_opcode should be next to opcode in template.
> >>
> >> In the source table, in the binary representation, or both? (I certainly
> >> agree they should be next to each other in the source table.)
> >
> > Only in the source code, not in the binary representation.
>
> Yet the remark was about the (positive) code gen effects changing the
> binary representation was likely to have. I then understand you wouldn't
> object to moving this field.
>

Correct.

-- 
H.J.

  reply	other threads:[~2021-03-29 14:51 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-26 10:48 [PATCH 0/6] x86: further opcode table compaction plus fallout Jan Beulich
2021-03-26 10:50 ` [PATCH 1/6] x86: derive opcode encoding space attribute from base opcode Jan Beulich
2021-03-26 10:50 ` [PATCH 2/6] x86: shrink some struct insn_template fields Jan Beulich
2021-03-29 13:00   ` H.J. Lu
2021-03-29 14:03     ` Jan Beulich
2021-03-29 14:41       ` H.J. Lu
2021-03-29 14:49         ` Jan Beulich
2021-03-29 14:51           ` H.J. Lu [this message]
2021-03-26 10:51 ` [PATCH 3/6] x86: undo Prefix_0X<nn> use in opcode table Jan Beulich
2021-03-26 10:51 ` [PATCH 4/6] x86: fold SSE2AVX and their base MMX/SSE templates Jan Beulich
2021-03-29 13:31   ` H.J. Lu
2021-03-26 10:52 ` [PATCH 5/6] x86: VPSADBW's source operands are also commutative Jan Beulich
2021-03-26 10:53 ` [PATCH 6/6] x86: move some opcode table entries Jan Beulich
2021-03-26 21:16 ` [PATCH 0/6] x86: further opcode table compaction plus fallout H.J. Lu
2021-03-29 10:08   ` Jan Beulich

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