From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "binutils@sourceware.org" <binutils@sourceware.org>
Subject: Re: [PATCH v5 1/5] x86: also disallow non-byte/-word registers with byte/word suffix
Date: Tue, 11 Feb 2020 11:27:00 -0000 [thread overview]
Message-ID: <CAMe9rOqBQzmSs+GUEaz7mzx_3XTYYDLGgXzU8=5N+HYucFuipw@mail.gmail.com> (raw)
In-Reply-To: <6fbca201-5ae8-cf70-0614-f7f2efa6628f@suse.com>
On Tue, Feb 11, 2020 at 2:24 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> Along the lines of be4c5e58bd ("x86: Always disallow double word suffix
> with word general register") also adjust check_{byte,word}_reg(), to make
> overall behavior consistent again in this regard.
>
> gas/
> 2020-02-XX Jan Beulich <jbeulich@suse.com>
>
> PR gas/25438
> * config/tc-i386.c (REGISTER_WARNINGS): Delete.
> (check_byte_reg): Skip only source operand of CRC32. Drop Non-
> 64-bit-only warning.
> (check_word_reg): Consistently error on mismatching register
> size and suffix.
> * testsuite/gas/i386/general.s: Replace dword GPR with word one
> for movw. Replace suffix / GPR for orb.
> * testsuite/gas/i386/inval.s: Add tests for movw with dword and
> byte GPRs as well as ones for inb/outb with a word accumulator.
> * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
> testsuite/gas/i386/inval.l: Adjust expectations.
>
OK.
Thanks.
--
H.J.
next prev parent reply other threads:[~2020-02-11 11:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-11 10:23 [PATCH v5 0/5] x86: operand size handling improvements Jan Beulich
2020-02-11 10:25 ` [PATCH v5 2/5] x86: move certain MOVSX/MOVZX tests Jan Beulich
2020-02-11 11:43 ` H.J. Lu
2020-02-11 11:55 ` Jan Beulich
2020-02-11 12:20 ` H.J. Lu
2020-02-11 12:58 ` Jan Beulich
2020-02-11 13:02 ` H.J. Lu
2020-02-11 13:04 ` Jan Beulich
2020-02-11 13:07 ` H.J. Lu
2020-02-11 16:45 ` Jan Beulich
2020-02-11 17:04 ` H.J. Lu
2020-02-11 20:12 ` [PATCH] x86: Remove movsx/movzx with memory operand from AT&T syntax H.J. Lu
2020-02-11 23:34 ` H.J. Lu
2020-02-11 23:52 ` H.J. Lu
2020-02-12 3:19 ` [PATCH] x86: Remove movsx/movzx with 16/32-bit " H.J. Lu
2020-02-12 9:19 ` Jan Beulich
2020-02-11 10:25 ` [PATCH v5 1/5] x86: also disallow non-byte/-word registers with byte/word suffix Jan Beulich
2020-02-11 11:27 ` H.J. Lu [this message]
2020-02-11 10:25 ` [PATCH v5 3/5] x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX Jan Beulich
2020-02-11 10:26 ` [PATCH v5 4/5] x86: correct VFPCLASSP{S,D} operand size handling Jan Beulich
2020-02-11 11:50 ` H.J. Lu
2020-02-11 12:49 ` Jan Beulich
2020-02-11 12:56 ` H.J. Lu
2020-02-11 10:27 ` [PATCH v5 5/5] x86-64: Intel64 adjustments for insns dealing with far pointers Jan Beulich
2020-02-11 11:53 ` H.J. Lu
2020-02-12 8:11 ` Jan Beulich
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