From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x233.google.com (mail-oi1-x233.google.com [IPv6:2607:f8b0:4864:20::233]) by sourceware.org (Postfix) with ESMTPS id CE1083858D1E for ; Wed, 17 Aug 2022 20:36:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CE1083858D1E Received: by mail-oi1-x233.google.com with SMTP id s199so16595671oie.3 for ; Wed, 17 Aug 2022 13:36:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=l3n5gIBDZLl05leoXNBaEDaADvmc8oTzFCzJkBH3Bjs=; b=N9UMAWfrGTEY3IINOYLLIOyqSLKRFMEOviN94xC+W7XlF9buXD793Ns3AGZwSNiN/z coC9a++DXvpBWGNZQTbZZz1PQgxs8qRPJa/ECdpjX6Ze/ZzvhJUc1R34pPWVebp9uq+V KO4HYe7ciJbnPT26zgNfNF0alw6IgSz/59x4oB5UZnxkIZMpAxF1H0i9KyrODbFJqlWj KmQCgeBLZ5zQXQW9tA+rVGv8kZVT5voNXu7I8BkFuLs54IXidBOPhktICrpBeUoHE+7q 3/thvc8yntcr3wB7o7jGnGr/DNlg7I3UYFYGh6LA6GxjWNAdEEVtBtILT8Fl4l2a8pxz 8Uig== X-Gm-Message-State: ACgBeo2EVu8nRAl11MRKrtwGGTccAyesn23D0wlOgKXL/QFhFfLBCiY9 NJdlfhTQC3fjcg8txiZVzFyOb0f3wjkL167F0gxp3cx1DeU= X-Google-Smtp-Source: AA6agR7404nZOsEq5sXLA5NprTleUZQMi3AoNwo+ODQLgYKTA6m0yBo7HsB8h7mkJsKcyR/RmX6v6Q3UBfDk1WM5uLY= X-Received: by 2002:aca:1304:0:b0:343:aa0:1ce7 with SMTP id e4-20020aca1304000000b003430aa01ce7mr2255215oii.100.1660768606960; Wed, 17 Aug 2022 13:36:46 -0700 (PDT) MIME-Version: 1.0 References: <32216291-fd1f-4579-87de-d24cb7190894@suse.com> <7b61da0d-a9f9-a855-beb2-736bc624f811@suse.com> In-Reply-To: <7b61da0d-a9f9-a855-beb2-736bc624f811@suse.com> From: "H.J. Lu" Date: Wed, 17 Aug 2022 13:36:10 -0700 Message-ID: Subject: Re: [PATCH 7/7] ix86: don't recognize/derive Q suffix in the common case To: Jan Beulich Cc: Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3018.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Aug 2022 20:36:50 -0000 On Tue, Aug 16, 2022 at 12:34 AM Jan Beulich wrote: > > Have its use, except where actually legitimate, result in the same "only > supported in 64-bit mode" diagnostic as emitted for other 64-bit only > insns. Also suppress deriving of the suffix in Intel mode except in the > legitimate cases. This in exchange allows dropping the respective code > from match_template(). > > Oddly enough despite gcc's preference towards FILDQ and FIST{,T}Q we This is for inline assembly: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39590 > had no testcase whatsoever for these. Therefore such tests are being > added. Note that the removed line in the x86-64-lfence-load testcase > was redundant with the exact same one a few lines up. > --- > With gcc's preference towards FILDQ / FIST{,T}Q I wonder whether the > disassembler wouldn't better emit a Q suffix instead of the LL one. > > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -4826,7 +4826,7 @@ void > md_assemble (char *line) > { > unsigned int j; > - char mnemonic[MAX_MNEM_SIZE], mnem_suffix, *copy; > + char mnemonic[MAX_MNEM_SIZE], mnem_suffix = 0, *copy; > const char *pass1_mnem = NULL; > enum i386_error pass1_err = 0; > const insn_template *t; > @@ -4860,6 +4860,7 @@ md_assemble (char *line) > goto no_match; > /* No point in trying a 2nd pass - it'll only find the same suffix > again. */ > + mnem_suffix = i.suffix; > goto match_error; > } > free (copy); > @@ -5010,9 +5011,15 @@ md_assemble (char *line) > cpu_sub_arch_name ? cpu_sub_arch_name : ""); > return; > case unsupported_64bit: > - as_bad (_("`%s' is %s supported in 64-bit mode"), > - pass1_mnem ? pass1_mnem : current_templates->start->name, > - flag_code == CODE_64BIT ? _("not") : _("only")); > + if (ISLOWER (mnem_suffix)) > + as_bad (_("`%s%c' is %s supported in 64-bit mode"), > + pass1_mnem ? pass1_mnem : current_templates->start->name, > + mnem_suffix, > + flag_code == CODE_64BIT ? _("not") : _("only")); > + else > + as_bad (_("`%s' is %s supported in 64-bit mode"), > + pass1_mnem ? pass1_mnem : current_templates->start->name, > + flag_code == CODE_64BIT ? _("not") : _("only")); > return; > case invalid_sib_address: > err_msg = _("invalid SIB address"); > @@ -5355,6 +5362,23 @@ md_assemble (char *line) > last_insn.kind = last_insn_other; > } > > +/* The Q suffix is generally valid only in 64-bit mode, with very few > + exceptions: fild, fistp, fisttp, and cmpxchg8b. Note that for fild > + and fisttp only one of their two templates is matched below: That's > + sufficient since other relevant attributes are the same between both > + respective templates. */ > +static INLINE bool q_suffix_allowed(const insn_template *t) > +{ > + return flag_code == CODE_64BIT > + || (t->opcode_modifier.opcodespace == SPACE_BASE > + && t->base_opcode == 0xdf > + && (t->extension_opcode & 1)) /* fild / fistp / fisttp */ > + || (t->opcode_modifier.opcodespace == SPACE_0F > + && t->base_opcode == 0xc7 > + && t->opcode_modifier.opcodeprefix == PREFIX_NONE > + && t->extension_opcode == 1) /* cmpxchg8b */; > +} > + > static char * > parse_insn (char *line, char *mnemonic) > { > @@ -5626,6 +5650,10 @@ parse_insn (char *line, char *mnemonic) > for (t = current_templates->start; t < current_templates->end; ++t) > { > supported |= cpu_flags_match (t); > + > + if (i.suffix == QWORD_MNEM_SUFFIX && !q_suffix_allowed (t)) > + supported &= ~CPU_FLAGS_64BIT_MATCH; > + > if (supported == CPU_FLAGS_PERFECT_MATCH) > return l; > } > @@ -6661,20 +6689,12 @@ match_template (char mnem_suffix) > for (j = 0; j < MAX_OPERANDS; j++) > operand_types[j] = t->operand_types[j]; > > - /* In general, don't allow > - - 64-bit operands outside of 64-bit mode, > - - 32-bit operands on pre-386. */ > + /* In general, don't allow 32-bit operands on pre-386. */ > specific_error = progress (mnem_suffix ? invalid_instruction_suffix > : operand_size_mismatch); > j = i.imm_operands + (t->operands > i.imm_operands + 1); > - if (((i.suffix == QWORD_MNEM_SUFFIX > - && flag_code != CODE_64BIT > - && !(t->opcode_modifier.opcodespace == SPACE_0F > - && t->base_opcode == 0xc7 > - && t->opcode_modifier.opcodeprefix == PREFIX_NONE > - && t->extension_opcode == 1) /* cmpxchg8b */) > - || (i.suffix == LONG_MNEM_SUFFIX > - && !cpu_arch_flags.bitfield.cpui386)) > + if (i.suffix == LONG_MNEM_SUFFIX > + && !cpu_arch_flags.bitfield.cpui386 > && (intel_syntax > ? (t->opcode_modifier.mnemonicsize != IGNORESIZE > && !intel_float_operand (t->name)) > --- a/gas/config/tc-i386-intel.c > +++ b/gas/config/tc-i386-intel.c > @@ -824,7 +824,7 @@ i386_intel_operand (char *operand_string > continue; > break; > case QWORD_MNEM_SUFFIX: > - if (t->opcode_modifier.no_qsuf) > + if (t->opcode_modifier.no_qsuf || !q_suffix_allowed (t)) > continue; > break; > case SHORT_MNEM_SUFFIX: > --- a/gas/testsuite/gas/i386/opcode.d > +++ b/gas/testsuite/gas/i386/opcode.d > @@ -592,6 +592,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%edx > [ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%dx > [ ]*[a-f0-9]+: 66 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%dx > +[ ]*[a-f0-9]+: df 28 fildll \(%eax\) > +[ ]*[a-f0-9]+: df 28 fildll \(%eax\) > +[ ]*[a-f0-9]+: df 38 fistpll \(%eax\) > +[ ]*[a-f0-9]+: df 38 fistpll \(%eax\) > +[a-f0-9]+: 82 c3 01 add \$0x1,%bl > +[a-f0-9]+: 82 f3 01 xor \$0x1,%bl > +[a-f0-9]+: 82 d3 01 adc \$0x1,%bl > --- a/gas/testsuite/gas/i386/opcode.s > +++ b/gas/testsuite/gas/i386/opcode.s > @@ -592,6 +592,11 @@ foo: > cmovpe 0x90909090(%eax),%dx > cmovpo 0x90909090(%eax),%dx > > + fildq (%eax) > + fildll (%eax) > + fistpq (%eax) > + fistpll (%eax) > + > .byte 0x82, 0xc3, 0x01 > .byte 0x82, 0xf3, 0x01 > .byte 0x82, 0xd3, 0x01 > --- a/gas/testsuite/gas/i386/opcode-intel.d > +++ b/gas/testsuite/gas/i386/opcode-intel.d > @@ -593,6 +593,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp edx,DWORD PTR \[eax-0x6f6f6f70\] > [ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp dx,WORD PTR \[eax-0x6f6f6f70\] > [ ]*[a-f0-9]+: 66 0f 4b 90 90 90 90 90 cmovnp dx,WORD PTR \[eax-0x6f6f6f70\] > +[ ]*[a-f0-9]+: df 28 fild QWORD PTR \[eax\] > +[ ]*[a-f0-9]+: df 28 fild QWORD PTR \[eax\] > +[ ]*[a-f0-9]+: df 38 fistp QWORD PTR \[eax\] > +[ ]*[a-f0-9]+: df 38 fistp QWORD PTR \[eax\] > +[a-f0-9]+: 82 c3 01 add bl,0x1 > +[a-f0-9]+: 82 f3 01 xor bl,0x1 > +[a-f0-9]+: 82 d3 01 adc bl,0x1 > --- a/gas/testsuite/gas/i386/opcode-suffix.d > +++ b/gas/testsuite/gas/i386/opcode-suffix.d > @@ -593,6 +593,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnpl -0x6f6f6f70\(%eax\),%edx > [ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovpw -0x6f6f6f70\(%eax\),%dx > [ ]*[a-f0-9]+: 66 0f 4b 90 90 90 90 90 cmovnpw -0x6f6f6f70\(%eax\),%dx > +[ ]*[a-f0-9]+: df 28 fildll \(%eax\) > +[ ]*[a-f0-9]+: df 28 fildll \(%eax\) > +[ ]*[a-f0-9]+: df 38 fistpll \(%eax\) > +[ ]*[a-f0-9]+: df 38 fistpll \(%eax\) > +[a-f0-9]+: 82 c3 01 addb \$0x1,%bl > +[a-f0-9]+: 82 f3 01 xorb \$0x1,%bl > +[a-f0-9]+: 82 d3 01 adcb \$0x1,%bl > --- a/gas/testsuite/gas/i386/sse3.d > +++ b/gas/testsuite/gas/i386/sse3.d > @@ -13,29 +13,30 @@ Disassembly of section .text: > 10: df 88 90 90 90 90 [ ]*fisttps -0x6f6f6f70\(%eax\) > 16: db 88 90 90 90 90 [ ]*fisttpl -0x6f6f6f70\(%eax\) > 1c: dd 88 90 90 90 90 [ ]*fisttpll -0x6f6f6f70\(%eax\) > - 22: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%ebp\),%xmm4 > - 27: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5 > - 2b: f2 0f 7c 37 [ ]*haddps \(%edi\),%xmm6 > - 2f: f2 0f 7c f8 [ ]*haddps %xmm0,%xmm7 > - 33: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0 > - 37: 66 0f 7d 0a [ ]*hsubpd \(%edx\),%xmm1 > - 3b: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2 > - 3f: f2 0f 7d 1c 24 [ ]*hsubps \(%esp\),%xmm3 > - 44: f2 0f f0 2e [ ]*lddqu \(%esi\),%xmm5 > - 48: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx > - 4b: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx > - 4e: f2 0f 12 f7 [ ]*movddup %xmm7,%xmm6 > - 52: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7 > - 56: f3 0f 16 01 [ ]*movshdup \(%ecx\),%xmm0 > - 5a: f3 0f 16 ca [ ]*movshdup %xmm2,%xmm1 > - 5e: f3 0f 12 13 [ ]*movsldup \(%ebx\),%xmm2 > - 62: f3 0f 12 dc [ ]*movsldup %xmm4,%xmm3 > - 66: 0f 01 c9 [ ]*mwait %eax,%ecx > - 69: 0f 01 c9 [ ]*mwait %eax,%ecx > - 6c: 67 0f 01 c8 [ ]*monitor %ax,%ecx,%edx > - 70: 67 0f 01 c8 [ ]*monitor %ax,%ecx,%edx > - 74: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7 > - 78: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7 > +[ ]*[0-9a-f]+: dd 88 90 90 90 90 [ ]*fisttpll -0x6f6f6f70\(%eax\) > +[ ]*[0-9a-f]+: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%ebp\),%xmm4 > +[ ]*[0-9a-f]+: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5 > +[ ]*[0-9a-f]+: f2 0f 7c 37 [ ]*haddps \(%edi\),%xmm6 > +[ ]*[0-9a-f]+: f2 0f 7c f8 [ ]*haddps %xmm0,%xmm7 > +[ ]*[0-9a-f]+: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0 > +[ ]*[0-9a-f]+: 66 0f 7d 0a [ ]*hsubpd \(%edx\),%xmm1 > +[ ]*[0-9a-f]+: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2 > +[ ]*[0-9a-f]+: f2 0f 7d 1c 24 [ ]*hsubps \(%esp\),%xmm3 > +[ ]*[0-9a-f]+: f2 0f f0 2e [ ]*lddqu \(%esi\),%xmm5 > +[ ]*[0-9a-f]+: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx > +[ ]*[0-9a-f]+: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx > +[ ]*[0-9a-f]+: f2 0f 12 f7 [ ]*movddup %xmm7,%xmm6 > +[ ]*[0-9a-f]+: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7 > +[ ]*[0-9a-f]+: f3 0f 16 01 [ ]*movshdup \(%ecx\),%xmm0 > +[ ]*[0-9a-f]+: f3 0f 16 ca [ ]*movshdup %xmm2,%xmm1 > +[ ]*[0-9a-f]+: f3 0f 12 13 [ ]*movsldup \(%ebx\),%xmm2 > +[ ]*[0-9a-f]+: f3 0f 12 dc [ ]*movsldup %xmm4,%xmm3 > +[ ]*[0-9a-f]+: 0f 01 c9 [ ]*mwait %eax,%ecx > +[ ]*[0-9a-f]+: 0f 01 c9 [ ]*mwait %eax,%ecx > +[ ]*[0-9a-f]+: 67 0f 01 c8 [ ]*monitor %ax,%ecx,%edx > +[ ]*[0-9a-f]+: 67 0f 01 c8 [ ]*monitor %ax,%ecx,%edx > +[ ]*[0-9a-f]+: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7 > +[ ]*[0-9a-f]+: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7 > [ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor %eax,%ecx,%edx > [ ]*[0-9a-f]+: 67 0f 01 c8[ ]+monitor %ax,%ecx,%edx > [ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait %eax,%ecx > --- a/gas/testsuite/gas/i386/sse3.s > +++ b/gas/testsuite/gas/i386/sse3.s > @@ -8,6 +8,7 @@ foo: > addsubps %xmm4,%xmm3 > fisttps 0x90909090(%eax) > fisttpl 0x90909090(%eax) > + fisttpq 0x90909090(%eax) > fisttpll 0x90909090(%eax) > haddpd 0x0(%ebp),%xmm4 > haddpd %xmm6,%xmm5 > --- a/gas/testsuite/gas/i386/sse3-intel.d > +++ b/gas/testsuite/gas/i386/sse3-intel.d > @@ -14,6 +14,7 @@ Disassembly of section .text: > [ ]*[0-9a-f]+: df 88 90 90 90 90[ ]+fisttp WORD PTR \[eax-0x6f6f6f70\] > [ ]*[0-9a-f]+: db 88 90 90 90 90[ ]+fisttp DWORD PTR \[eax-0x6f6f6f70\] > [ ]*[0-9a-f]+: dd 88 90 90 90 90[ ]+fisttp QWORD PTR \[eax-0x6f6f6f70\] > +[ ]*[0-9a-f]+: dd 88 90 90 90 90[ ]+fisttp QWORD PTR \[eax-0x6f6f6f70\] > [ ]*[0-9a-f]+: 66 0f 7c 65 00[ ]+haddpd xmm4,(XMMWORD PTR )?\[ebp(\+0x0)\] > [ ]*[0-9a-f]+: 66 0f 7c ee[ ]+haddpd xmm5,xmm6 > [ ]*[0-9a-f]+: f2 0f 7c 37[ ]+haddps xmm6,(XMMWORD PTR )?\[edi\] > --- a/gas/testsuite/gas/i386/x86-64-lfence-load.d > +++ b/gas/testsuite/gas/i386/x86-64-lfence-load.d > @@ -44,16 +44,21 @@ Disassembly of section .text: > +[a-f0-9]+: 0f ae e8 lfence > +[a-f0-9]+: db 55 00 fistl 0x0\(%rbp\) > +[a-f0-9]+: df 55 00 fists 0x0\(%rbp\) > + +[a-f0-9]+: db 5d 00 fistpl 0x0\(%rbp\) > + +[a-f0-9]+: df 5d 00 fistps 0x0\(%rbp\) > + +[a-f0-9]+: df 7d 00 fistpll 0x0\(%rbp\) > +[a-f0-9]+: db 45 00 fildl 0x0\(%rbp\) > +[a-f0-9]+: 0f ae e8 lfence > +[a-f0-9]+: df 45 00 filds 0x0\(%rbp\) > +[a-f0-9]+: 0f ae e8 lfence > + +[a-f0-9]+: df 6d 00 fildll 0x0\(%rbp\) > + +[a-f0-9]+: 0f ae e8 lfence > +[a-f0-9]+: 9b dd 75 00 fsave 0x0\(%rbp\) > +[a-f0-9]+: dd 65 00 frstor 0x0\(%rbp\) > +[a-f0-9]+: 0f ae e8 lfence > - +[a-f0-9]+: df 45 00 filds 0x0\(%rbp\) > - +[a-f0-9]+: 0f ae e8 lfence > + +[a-f0-9]+: db 4d 00 fisttpl 0x0\(%rbp\) > +[a-f0-9]+: df 4d 00 fisttps 0x0\(%rbp\) > + +[a-f0-9]+: dd 4d 00 fisttpll 0x0\(%rbp\) > +[a-f0-9]+: d9 65 00 fldenv 0x0\(%rbp\) > +[a-f0-9]+: 0f ae e8 lfence > +[a-f0-9]+: 9b d9 75 00 fstenv 0x0\(%rbp\) > --- a/gas/testsuite/gas/i386/x86-64-lfence-load.s > +++ b/gas/testsuite/gas/i386/x86-64-lfence-load.s > @@ -27,12 +27,17 @@ _start: > flds (%rbp) > fistl (%rbp) > fists (%rbp) > + fistpl (%rbp) > + fistps (%rbp) > + fistpq (%rbp) > fildl (%rbp) > filds (%rbp) > + fildq (%rbp) > fsave (%rbp) > frstor (%rbp) > - filds (%rbp) > + fisttpl (%rbp) > fisttps (%rbp) > + fisttpq (%rbp) > fldenv (%rbp) > fstenv (%rbp) > fadds (%rbp) > --- a/gas/testsuite/gas/i386/x86-64-sse3.d > +++ b/gas/testsuite/gas/i386/x86-64-sse3.d > @@ -13,6 +13,7 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: df 88 90 90 90 00 [ ]*fisttps 0x909090\(%rax\) > [ ]*[a-f0-9]+: db 88 90 90 90 00 [ ]*fisttpl 0x909090\(%rax\) > [ ]*[a-f0-9]+: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\) > +[ ]*[a-f0-9]+: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\) > [ ]*[a-f0-9]+: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%rbp\),%xmm4 > [ ]*[a-f0-9]+: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5 > [ ]*[a-f0-9]+: f2 0f 7c 37 [ ]*haddps \(%rdi\),%xmm6 > --- a/gas/testsuite/gas/i386/x86-64-sse3.s > +++ b/gas/testsuite/gas/i386/x86-64-sse3.s > @@ -8,6 +8,7 @@ foo: > addsubps %xmm4,%xmm3 > fisttps 0x909090(%rax) > fisttpl 0x909090(%rax) > + fisttpq 0x909090(%rax) > fisttpll 0x909090(%rax) > haddpd 0x0(%rbp),%xmm4 > haddpd %xmm6,%xmm5 > --- a/gas/testsuite/gas/i386/x86-64-sse3-intel.d > +++ b/gas/testsuite/gas/i386/x86-64-sse3-intel.d > @@ -14,6 +14,7 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: df 88 90 90 90 00[ ]+fisttp WORD PTR \[rax\+0x909090\] > [ ]*[a-f0-9]+: db 88 90 90 90 00[ ]+fisttp DWORD PTR \[rax\+0x909090\] > [ ]*[a-f0-9]+: dd 88 90 90 90 00[ ]+fisttp QWORD PTR \[rax\+0x909090\] > +[ ]*[a-f0-9]+: dd 88 90 90 90 00[ ]+fisttp QWORD PTR \[rax\+0x909090\] > [ ]*[a-f0-9]+: 66 0f 7c 65 00[ ]+haddpd xmm4,(XMMWORD PTR )?\[rbp(\+0x0)\] > [ ]*[a-f0-9]+: 66 0f 7c ee[ ]+haddpd xmm5,xmm6 > [ ]*[a-f0-9]+: f2 0f 7c 37[ ]+haddps xmm6,(XMMWORD PTR )?\[rdi\] > -- H.J.