From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x344.google.com (mail-ot1-x344.google.com [IPv6:2607:f8b0:4864:20::344]) by server2.sourceware.org (Postfix) with ESMTPS id BD1F339484A9 for ; Mon, 9 Mar 2020 12:14:01 +0000 (GMT) Received: by mail-ot1-x344.google.com with SMTP id v22so9247393otq.11 for ; Mon, 09 Mar 2020 05:14:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=nDLiF+REectAcqLE87bL5XzIYEBA+CfcU8bk/I0JeIA=; b=aNcbFQ5b46N9+LxDhErHyp1+ck/jNxHj5Z5c3zLyp7kcfK5OzxH54Cr79eemSTDp53 yavcn36u/5P6FpcC9X+fU8l370caxSfJKKYUu6HoyLJiM8fbNqoXh4I5p6nq9mCk17YC Ibboa+YJQHn/Q9JfMhkqJiKT+kLU5E2gXJNGek/NbygY5HBUce6Ae/dbRlagcvAo3eq1 VF+ZnUwraGg2cO8yufQ3thh96yNrSjnQY2tTkKQw3EDNHznHCpPs4VQkTIsDRx48KL5K YQH1WlGhAPtWw45NPygczBB0m64ziQ1KPYtzBalsZFfzA2r//cM8m68kTSbeuuqwyj0y 2AUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=nDLiF+REectAcqLE87bL5XzIYEBA+CfcU8bk/I0JeIA=; b=Xxtrswnmaj1hovAB6Mlsx87qkj11iA5d+w+hxzDafljWo4y6MdD4NERg/G3LLpfoD1 B33nDspn2uTwCbZAfROB40tV6/JanEcTGPGeqplixA8hr6PlTe8IbYZdcLn56S4/Gn/1 6fcDKTLOGl2Key+F4pjIMTLboEhuZAZ03M8Ban8RPlx08vXPClxeKIL+EmhrWsHlW85U 26LXh3W8pkMAWpeuTYxhbkeCX7av9djdurMmjwRHBnFhTCy9YQjigjABSGEI59CQVdgx o2mauV0A00d1AEolH+JfVMaM0e3Rj0JKF7VM6EvwXeeDPw8rycJb00OadmYuTXDssPxj qzrQ== X-Gm-Message-State: ANhLgQ0h+VB9WhuHk1TZgWXj4GE8jDo/kt4kbJyQHH2ARyIFk01pOLwE YRVoJqFjQzo+Bc42l5Z3BK7JQWCvdJCYj/y+/u4= X-Google-Smtp-Source: ADFU+vurqj/aAKQbmxvDUP5/ixNsxrkxECDo3xXdBrMFtxTIGTwG0GK26WhvrISlTrX6hWd5e/TrSI7YLg18s8tWfvI= X-Received: by 2002:a9d:19ef:: with SMTP id k102mr9661725otk.220.1583756041052; Mon, 09 Mar 2020 05:14:01 -0700 (PDT) MIME-Version: 1.0 References: <17ee93b3-33ea-5c10-23b2-408c7fb5b5a2@suse.com> <55090a46-36cd-8064-5aa5-bb09ad0174fa@suse.com> In-Reply-To: <55090a46-36cd-8064-5aa5-bb09ad0174fa@suse.com> From: "H.J. Lu" Date: Mon, 9 Mar 2020 05:13:25 -0700 Message-ID: Subject: Re: [PATCH 2/6] x86-64: Intel64 adjustments for conditional jumps To: Jan Beulich Cc: "binutils@sourceware.org" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Mar 2020 12:14:02 -0000 On Mon, Mar 9, 2020 at 12:11 AM Jan Beulich wrote: > > On 06.03.2020 16:35, H.J. Lu wrote: > > On Fri, Mar 6, 2020 at 6:53 AM Jan Beulich wrote: > >> > >> On 06.03.2020 15:39, H.J. Lu wrote: > >>> On Fri, Mar 6, 2020 at 12:12 AM Jan Beulich wrote: > >>>> > >>>> Just like for unconditional direct JMP, AMD and Intel differ in their > >>>> handling. Mirror JMP handling to Jcc. > >>>> > >>>> gas/ > >>>> 2020-03-XX Jan Beulich > >>>> > >>>> * testsuite/gas/i386/x86-64-branch-2.s, > >>>> testsuite/gas/i386/x86-64-branch-3.s: Add Jcc cases. > >>>> * testsuite/gas/i386/ilp32/x86-64-branch.d, > >>>> testsuite/gas/i386/opcode-suffix.d, > >>>> testsuite/gas/i386/x86-64-branch-2.d, > >>>> testsuite/gas/i386/x86-64-branch-3.d, > >>>> testsuite/gas/i386/x86-64-branch.d: Adjust expectations. > >>>> > >>>> opcodes/ > >>>> 2020-03-XX Jan Beulich > >>>> > >>>> * i386-dis.c (safe-ctype.h): Include. > >>>> (X86_64_0F8x): New enumerator. > >>>> (dis386): Extend comment ahead of it. > >>>> (dis386_twobyte): Vector Jcc to X86_64_0F8x. > >>>> (condition_code): New. > >>>> (x86_64_table): Add X86_64_0F8x entry. > >>>> (print_insn): Set condition_code. Move advancing of codep after > >>>> it. > >>>> (putop): Handle two-char escape case for 'C'. Handle 'C' prefix > >>>> case for 'P' and '@'. > >>>> * i386-opc.tbl (j): Split into AMD64 and Intel64 variants. > >>>> * i386-tbl.h: Re-generate. > >>>> --- > >>>> I wonder if the suffix handling done here wouldn't also be the more > >>>> suitable one for JMP and CALL. In particular the 'q' suffix printed > >>>> unconditionally in 64-bit mode is more of a problem than helpful imo. > >>>> > >>>> --- a/gas/testsuite/gas/i386/ilp32/x86-64-branch.d > >>>> +++ b/gas/testsuite/gas/i386/ilp32/x86-64-branch.d > >>>> @@ -22,7 +22,7 @@ Disassembly of section .text: > >>>> [ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c > >>>> [ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 0x2a 26: R_X86_64_PLT32 foo-0x4 > >>>> [ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 0x30 2c: R_X86_64_PLT32 foo-0x4 > >>>> -[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PLT32 foo-0x4 > >>>> +[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jbq 0x37 33: R_X86_64_PLT32 foo-0x4 > >>>> [ ]*[a-f0-9]+: 66 c3 data16 retq * > >>>> [ ]*[a-f0-9]+: 66 c2 08 00 data16 retq \$0x8 > >>>> [ ]*[a-f0-9]+: ff d0 callq \*%rax > >>> > >>> I think it is a very bad idea to add suffix to jcc. > >> > >> Well, do you have an alternative suggestion, also in line with > >> JMP then? (See the somewhat related post-commit-message remark > > > > Since assembly doesn't require `q' suffix, can we drop it from disassembler? > > Why would we not be in the position to do so? But if we do, > can we then please settle on doing so uniformly (i.e. for > all near branch insns), i.e. in the above snippet e.g. not > just CALL and JMP, but also RET? Let's drop 'q' suffix on them. > The other question then is what to do in suffix-always mode: > I'd like to have things consistent there as well, and hence > I think we should emit suffixes in that case also for Jcc. Since current assembler doesn't take 'q' suffix on Jcc: [hjl@gnu-cfl-2 tmp]$ cat x.s jbq 1f 1: nop [hjl@gnu-cfl-2 tmp]$ gcc -c x.s x.s: Assembler messages: x.s:1: Error: invalid instruction suffix for `jb' [hjl@gnu-cfl-2 tmp]$ disassembler should never add 'q' suffix on Jcc. But we can drop 'q' suffix on CALL/JMP/RET in suffix-always mode. -- H.J.