* [PATCH, v3]: AMD btver1 and btver2 enablement
@ 2012-08-17 7:24 Eggone, NagaJyothi
2012-08-17 13:15 ` H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Eggone, NagaJyothi @ 2012-08-17 7:24 UTC (permalink / raw)
To: H.J. Lu; +Cc: binutils, Eggone, NagaJyothi
[-- Attachment #1: Type: text/plain, Size: 967 bytes --]
Hello H.J.,
> -----Original Message-----
> From: H.J. Lu [mailto:hjl.tools@gmail.com]
> Sent: Thursday, August 16, 2012 11:31 PM
> To: Eggone, NagaJyothi
> Cc: binutils@sourceware.org
> Subject: Re: [PATCH, v2]: AMD btver1 and btver2 enablement
>
> >>
> >> Do you really need Cpu3dnowPrfch? Where will it be used?
> >
> > The 3dnow 'prefetch' and 'prefetchw' instructions are available both
> on the btver1 and btver2 cores. I could not have enabled both these
> instructions for these cores without adding a cpu flag bit (this
> corresponds to the cpuid ECX bit 8 on AMD processors).
>
> Please drop Cpu3dnowPrfch and add CpuPRFCHW to
> prefetch.
>
> gas/testsuite changes should be in gas/testsuite/ChangeLog.
>
> --
> H.J.
I have changed the patch as per suggestions above. This patch also includes the diffs of files opcodes/i386-init.h and opcodes/i386-tbl.h.
Please review and if OK, commit to trunk.
Thanks,
Nagajyothi
[-- Attachment #2: btver.patch --]
[-- Type: application/octet-stream, Size: 8848 bytes --]
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 61ca2c7..61ca44a 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -664,6 +664,10 @@ static const arch_entry cpu_arch[] =
CPU_BDVER1_FLAGS, 0, 0 },
{ STRING_COMMA_LEN ("bdver2"), PROCESSOR_BD,
CPU_BDVER2_FLAGS, 0, 0 },
+ { STRING_COMMA_LEN ("btver1"), PROCESSOR_BT,
+ CPU_BTVER1_FLAGS, 0, 0 },
+ { STRING_COMMA_LEN ("btver2"), PROCESSOR_BT,
+ CPU_BTVER2_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".8087"), PROCESSOR_UNKNOWN,
CPU_8087_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".287"), PROCESSOR_UNKNOWN,
@@ -1060,7 +1064,7 @@ i386_align_code (fragS *fragP, int count)
PROCESSOR_CORE, PROCESSOR_CORE2, PROCESSOR_COREI7, and
PROCESSOR_GENERIC64, alt_long_patt will be used.
3. For PROCESSOR_ATHLON, PROCESSOR_K6, PROCESSOR_K8 and
- PROCESSOR_AMDFAM10, and PROCESSOR_BD, alt_short_patt
+ PROCESSOR_AMDFAM10, PROCESSOR_BD and PROCESSOR_BT, alt_short_patt
will be used.
When -mtune= isn't used, alt_long_patt will be used if
@@ -1115,6 +1119,7 @@ i386_align_code (fragS *fragP, int count)
case PROCESSOR_K8:
case PROCESSOR_AMDFAM10:
case PROCESSOR_BD:
+ case PROCESSOR_BT:
patt = alt_short_patt;
break;
case PROCESSOR_I386:
@@ -1144,6 +1149,7 @@ i386_align_code (fragS *fragP, int count)
case PROCESSOR_K8:
case PROCESSOR_AMDFAM10:
case PROCESSOR_BD:
+ case PROCESSOR_BT:
case PROCESSOR_GENERIC32:
/* We use cpu_arch_isa_flags to check if we CAN optimize
with nops. */
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index d4d7d96..de132d6 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -245,7 +245,8 @@ enum processor_type
PROCESSOR_GENERIC32,
PROCESSOR_GENERIC64,
PROCESSOR_AMDFAM10,
- PROCESSOR_BD
+ PROCESSOR_BD,
+ PROCESSOR_BT
};
extern enum processor_type cpu_arch_tune;
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 5040c25..5b7b007 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -120,6 +120,8 @@ processor names are recognized:
@code{amdfam10},
@code{bdver1},
@code{bdver2},
+@code{btver1},
+@code{btver2},
@code{generic32} and
@code{generic64}.
@@ -1013,6 +1015,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{corei7} @tab @samp{l1om} @tab @samp{k1om}
@item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8}
@item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2}
+@item @samp{btver1} @tab @samp{btver2}
@item @samp{generic32} @tab @samp{generic64}
@item @samp{.mmx} @tab @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 4f3ee41..2cfe8ec 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -84,6 +84,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "nops-1-core2"
run_dump_test "nops-1-bdver1"
run_dump_test "nops-1-bdver2"
+ run_dump_test "nops-1-btver1"
+ run_dump_test "nops-1-btver2"
run_dump_test "nops-2"
run_dump_test "nops-2-i386"
run_dump_test "nops-2-core2"
@@ -128,6 +130,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "arch-10-lzcnt"
run_dump_test "arch-10-prefetchw"
run_dump_test "arch-10-bdver2"
+ run_dump_test "arch-10-btver1"
+ run_dump_test "arch-10-btver2"
run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
run_list_test "arch-10-2" "-march=i686 -I${srcdir}/$subdir -al"
run_list_test "arch-10-3" "-march=i686+sse4.2 -I${srcdir}/$subdir -al"
@@ -356,6 +360,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-nops-1-pentium"
run_dump_test "x86-64-nops-1-bdver1"
run_dump_test "x86-64-nops-1-bdver2"
+ run_dump_test "x86-64-nops-1-btver1"
+ run_dump_test "x86-64-nops-1-btver2"
run_dump_test "x86-64-nops-2"
run_dump_test "x86-64-nops-3"
run_dump_test "x86-64-nops-4"
@@ -391,6 +397,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-arch-2-lzcnt"
run_dump_test "x86-64-arch-2-prefetchw"
run_dump_test "x86-64-arch-2-bdver2"
+ run_dump_test "x86-64-arch-2-btver1"
+ run_dump_test "x86-64-arch-2-btver2"
run_dump_test "x86-64-xsave"
run_dump_test "x86-64-xsave-intel"
run_dump_test "x86-64-aes"
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 6c49747..9dee51a 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -92,6 +92,10 @@ static initializer cpu_flag_init[] =
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
{ "CPU_BDVER2_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C" },
+ { "CPU_BTVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW" },
+ { "CPU_BTVER2_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW" },
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 1c62b9f..8d39409 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -169,6 +169,18 @@
1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
0, 0 } }
+#define CPU_BTVER1_FLAGS \
+ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
+ 0, 0 } }
+
+#define CPU_BTVER2_FLAGS \
+ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \
+ 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, \
+ 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
+ 0, 0 } }
+
#define CPU_8087_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 598b220..116b008 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -148,7 +148,7 @@ enum
CpuRDSEED,
/* Multi-presisionn add-carry instructions are required. */
CpuADX,
- /* Supports prefetchw instruction. */
+ /* Supports prefetchw and 3dnow prefetch instructions. */
CpuPRFCHW,
/* 64bit support required */
Cpu64,
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 2dcc97e..8304260 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2965,7 +2965,7 @@ tzmsk, 2, 0x01, 0x4, 1, CpuTBM, Modrm|CheckRegSize|Vex=3|VexOpcode=4|VexVVVV=
// AMD 3DNow! instructions.
-prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow|CpuPRFCHW, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
prefetchw, 1, 0xf0d, 0x1, 2, Cpu3dnow|CpuPRFCHW, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
femms, 0, 0xf0e, None, 2, Cpu3dnow, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
pavgusb, 2, 0xf0f, 0xbf, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegMMX }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index faca6bb..001a966 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -38403,7 +38403,7 @@ const insn_template i386_optab[] =
{ "prefetch", 1, 0xf0d, 0x0, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1,
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
[-- Attachment #3: btver_gastest.patch --]
[-- Type: application/octet-stream, Size: 34078 bytes --]
diff --git a/gas/testsuite/gas/i386/arch-10-btver1.d b/gas/testsuite/gas/i386/arch-10-btver1.d
new file mode 100644
index 0000000..92a4151
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-10-btver1.d
@@ -0,0 +1,42 @@
+#source: arch-10.s
+#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+fma+bmi+tbm
+#objdump: -dw
+#name: i386 arch 10 (btver1)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/arch-10-btver2.d b/gas/testsuite/gas/i386/arch-10-btver2.d
new file mode 100644
index 0000000..c6a8d66
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-10-btver2.d
@@ -0,0 +1,42 @@
+#source: arch-10.s
+#as: -march=btver2+smx+vmx+ept+clflush+svme+padlock+fma+tbm
+#objdump: -dw
+#name: i386 arch 10 (btver2)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/nops-1-btver1.d b/gas/testsuite/gas/i386/nops-1-btver1.d
new file mode 100644
index 0000000..4bc5fc5
--- /dev/null
+++ b/gas/testsuite/gas/i386/nops-1-btver1.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver1
+#source: nops-1.s
+#objdump: -drw
+#name: i386 -mtune=btver1 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/nops-1-btver2.d b/gas/testsuite/gas/i386/nops-1-btver2.d
new file mode 100644
index 0000000..7e88b61
--- /dev/null
+++ b/gas/testsuite/gas/i386/nops-1-btver2.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver2
+#source: nops-1.s
+#objdump: -drw
+#name: i386 -mtune=btver2 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d b/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
new file mode 100644
index 0000000..8cfa780
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
@@ -0,0 +1,41 @@
+#source: x86-64-arch-2.s
+#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+fma+bmi+tbm
+#objdump: -dw
+#name: x86-64 arch 2 (btver1)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d b/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
new file mode 100644
index 0000000..61e8fae
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
@@ -0,0 +1,41 @@
+#source: x86-64-arch-2.s
+#as: -march=btver2+smx+vmx+ept+clflush+svme+padlock+fma+tbm
+#objdump: -dw
+#name: x86-64 arch 2 (btver2)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-nops-1-btver1.d b/gas/testsuite/gas/i386/x86-64-nops-1-btver1.d
new file mode 100644
index 0000000..a8f0295
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-nops-1-btver1.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver1
+#source: nops-1.s
+#objdump: -drw
+#name: x86-64 -mtune=btver1 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-nops-1-btver2.d b/gas/testsuite/gas/i386/x86-64-nops-1-btver2.d
new file mode 100644
index 0000000..8474dca
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-nops-1-btver2.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver2
+#source: nops-1.s
+#objdump: -drw
+#name: x86-64 -mtune=btver2 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
[-- Attachment #4: gas-changelog.txt --]
[-- Type: text/plain, Size: 317 bytes --]
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT
* doc/c-i386.texi: Add -march={btver1, btver2} options
[-- Attachment #5: gastest-changelog.txt --]
[-- Type: text/plain, Size: 458 bytes --]
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Add new btver1 and btver2 test cases to run.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
[-- Attachment #6: opcodes-changelog.txt --]
[-- Type: text/plain, Size: 322 bytes --]
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add new CPU_BTVER1_FLAGS, CPU_BTVER2_FLAGS.
* i386-opc.h: Change CpuPRFCHW comment.
* i386-opc.tbl: Extend prefetch instruction.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH, v3]: AMD btver1 and btver2 enablement
2012-08-17 7:24 [PATCH, v3]: AMD btver1 and btver2 enablement Eggone, NagaJyothi
@ 2012-08-17 13:15 ` H.J. Lu
2012-08-17 16:54 ` Eggone, NagaJyothi
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2012-08-17 13:15 UTC (permalink / raw)
To: Eggone, NagaJyothi; +Cc: binutils
On Thu, Aug 16, 2012 at 11:28 PM, Eggone, NagaJyothi
<NagaJyothi.Eggone@amd.com> wrote:
> Hello H.J.,
>
>> -----Original Message-----
>> From: H.J. Lu [mailto:hjl.tools@gmail.com]
>> Sent: Thursday, August 16, 2012 11:31 PM
>> To: Eggone, NagaJyothi
>> Cc: binutils@sourceware.org
>> Subject: Re: [PATCH, v2]: AMD btver1 and btver2 enablement
>>
>> >>
>> >> Do you really need Cpu3dnowPrfch? Where will it be used?
>> >
>> > The 3dnow 'prefetch' and 'prefetchw' instructions are available both
>> on the btver1 and btver2 cores. I could not have enabled both these
>> instructions for these cores without adding a cpu flag bit (this
>> corresponds to the cpuid ECX bit 8 on AMD processors).
>>
>> Please drop Cpu3dnowPrfch and add CpuPRFCHW to
>> prefetch.
>>
>> gas/testsuite changes should be in gas/testsuite/ChangeLog.
>>
>> --
>> H.J.
>
> I have changed the patch as per suggestions above. This patch also includes the diffs of files opcodes/i386-init.h and opcodes/i386-tbl.h.
> Please review and if OK, commit to trunk.
>
Please reformat your ChangeLog entries to follow
existing ones. You have extra blank lines and
missing '.'.
+ /* Supports prefetchw and 3dnow prefetch instructions. */
Please drop 3dnow here.
--
H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH, v3]: AMD btver1 and btver2 enablement
2012-08-17 13:15 ` H.J. Lu
@ 2012-08-17 16:54 ` Eggone, NagaJyothi
2012-08-17 18:18 ` H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Eggone, NagaJyothi @ 2012-08-17 16:54 UTC (permalink / raw)
To: H.J. Lu; +Cc: binutils, Eggone, NagaJyothi
[-- Attachment #1: Type: text/plain, Size: 1658 bytes --]
> -----Original Message-----
> From: H.J. Lu [mailto:hjl.tools@gmail.com]
> Sent: Friday, August 17, 2012 6:41 PM
> To: Eggone, NagaJyothi
> Cc: binutils@sourceware.org
> Subject: Re: [PATCH, v3]: AMD btver1 and btver2 enablement
>
> On Thu, Aug 16, 2012 at 11:28 PM, Eggone, NagaJyothi
> <NagaJyothi.Eggone@amd.com> wrote:
> > Hello H.J.,
> >
> >> -----Original Message-----
> >> From: H.J. Lu [mailto:hjl.tools@gmail.com]
> >> Sent: Thursday, August 16, 2012 11:31 PM
> >> To: Eggone, NagaJyothi
> >> Cc: binutils@sourceware.org
> >> Subject: Re: [PATCH, v2]: AMD btver1 and btver2 enablement
> >>
> >> >>
> >> >> Do you really need Cpu3dnowPrfch? Where will it be used?
> >> >
> >> > The 3dnow 'prefetch' and 'prefetchw' instructions are available
> both
> >> on the btver1 and btver2 cores. I could not have enabled both these
> >> instructions for these cores without adding a cpu flag bit (this
> >> corresponds to the cpuid ECX bit 8 on AMD processors).
> >>
> >> Please drop Cpu3dnowPrfch and add CpuPRFCHW to
> >> prefetch.
> >>
> >> gas/testsuite changes should be in gas/testsuite/ChangeLog.
> >>
> >> --
> >> H.J.
> >
> > I have changed the patch as per suggestions above. This patch also
> includes the diffs of files opcodes/i386-init.h and opcodes/i386-tbl.h.
> > Please review and if OK, commit to trunk.
> >
>
> Please reformat your ChangeLog entries to follow
> existing ones. You have extra blank lines and
> missing '.'.
>
> + /* Supports prefetchw and 3dnow prefetch instructions. */
>
> Please drop 3dnow here.
>
> --
> H.J.
Re-submitting with changes.
- Nagajyothi
[-- Attachment #2: btver.patch --]
[-- Type: application/octet-stream, Size: 8842 bytes --]
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 61ca2c7..61ca44a 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -664,6 +664,10 @@ static const arch_entry cpu_arch[] =
CPU_BDVER1_FLAGS, 0, 0 },
{ STRING_COMMA_LEN ("bdver2"), PROCESSOR_BD,
CPU_BDVER2_FLAGS, 0, 0 },
+ { STRING_COMMA_LEN ("btver1"), PROCESSOR_BT,
+ CPU_BTVER1_FLAGS, 0, 0 },
+ { STRING_COMMA_LEN ("btver2"), PROCESSOR_BT,
+ CPU_BTVER2_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".8087"), PROCESSOR_UNKNOWN,
CPU_8087_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".287"), PROCESSOR_UNKNOWN,
@@ -1060,7 +1064,7 @@ i386_align_code (fragS *fragP, int count)
PROCESSOR_CORE, PROCESSOR_CORE2, PROCESSOR_COREI7, and
PROCESSOR_GENERIC64, alt_long_patt will be used.
3. For PROCESSOR_ATHLON, PROCESSOR_K6, PROCESSOR_K8 and
- PROCESSOR_AMDFAM10, and PROCESSOR_BD, alt_short_patt
+ PROCESSOR_AMDFAM10, PROCESSOR_BD and PROCESSOR_BT, alt_short_patt
will be used.
When -mtune= isn't used, alt_long_patt will be used if
@@ -1115,6 +1119,7 @@ i386_align_code (fragS *fragP, int count)
case PROCESSOR_K8:
case PROCESSOR_AMDFAM10:
case PROCESSOR_BD:
+ case PROCESSOR_BT:
patt = alt_short_patt;
break;
case PROCESSOR_I386:
@@ -1144,6 +1149,7 @@ i386_align_code (fragS *fragP, int count)
case PROCESSOR_K8:
case PROCESSOR_AMDFAM10:
case PROCESSOR_BD:
+ case PROCESSOR_BT:
case PROCESSOR_GENERIC32:
/* We use cpu_arch_isa_flags to check if we CAN optimize
with nops. */
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index d4d7d96..de132d6 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -245,7 +245,8 @@ enum processor_type
PROCESSOR_GENERIC32,
PROCESSOR_GENERIC64,
PROCESSOR_AMDFAM10,
- PROCESSOR_BD
+ PROCESSOR_BD,
+ PROCESSOR_BT
};
extern enum processor_type cpu_arch_tune;
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 5040c25..5b7b007 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -120,6 +120,8 @@ processor names are recognized:
@code{amdfam10},
@code{bdver1},
@code{bdver2},
+@code{btver1},
+@code{btver2},
@code{generic32} and
@code{generic64}.
@@ -1013,6 +1015,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{corei7} @tab @samp{l1om} @tab @samp{k1om}
@item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8}
@item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2}
+@item @samp{btver1} @tab @samp{btver2}
@item @samp{generic32} @tab @samp{generic64}
@item @samp{.mmx} @tab @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 4f3ee41..2cfe8ec 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -84,6 +84,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "nops-1-core2"
run_dump_test "nops-1-bdver1"
run_dump_test "nops-1-bdver2"
+ run_dump_test "nops-1-btver1"
+ run_dump_test "nops-1-btver2"
run_dump_test "nops-2"
run_dump_test "nops-2-i386"
run_dump_test "nops-2-core2"
@@ -128,6 +130,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "arch-10-lzcnt"
run_dump_test "arch-10-prefetchw"
run_dump_test "arch-10-bdver2"
+ run_dump_test "arch-10-btver1"
+ run_dump_test "arch-10-btver2"
run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
run_list_test "arch-10-2" "-march=i686 -I${srcdir}/$subdir -al"
run_list_test "arch-10-3" "-march=i686+sse4.2 -I${srcdir}/$subdir -al"
@@ -356,6 +360,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-nops-1-pentium"
run_dump_test "x86-64-nops-1-bdver1"
run_dump_test "x86-64-nops-1-bdver2"
+ run_dump_test "x86-64-nops-1-btver1"
+ run_dump_test "x86-64-nops-1-btver2"
run_dump_test "x86-64-nops-2"
run_dump_test "x86-64-nops-3"
run_dump_test "x86-64-nops-4"
@@ -391,6 +397,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-arch-2-lzcnt"
run_dump_test "x86-64-arch-2-prefetchw"
run_dump_test "x86-64-arch-2-bdver2"
+ run_dump_test "x86-64-arch-2-btver1"
+ run_dump_test "x86-64-arch-2-btver2"
run_dump_test "x86-64-xsave"
run_dump_test "x86-64-xsave-intel"
run_dump_test "x86-64-aes"
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 6c49747..9dee51a 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -92,6 +92,10 @@ static initializer cpu_flag_init[] =
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
{ "CPU_BDVER2_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C" },
+ { "CPU_BTVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW" },
+ { "CPU_BTVER2_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW" },
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 1c62b9f..8d39409 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -169,6 +169,18 @@
1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
0, 0 } }
+#define CPU_BTVER1_FLAGS \
+ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
+ 0, 0 } }
+
+#define CPU_BTVER2_FLAGS \
+ { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \
+ 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, \
+ 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
+ 0, 0 } }
+
#define CPU_8087_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 598b220..116b008 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -148,7 +148,7 @@ enum
CpuRDSEED,
/* Multi-presisionn add-carry instructions are required. */
CpuADX,
- /* Supports prefetchw instruction. */
+ /* Supports prefetchw and prefetch instructions. */
CpuPRFCHW,
/* 64bit support required */
Cpu64,
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 2dcc97e..8304260 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2965,7 +2965,7 @@ tzmsk, 2, 0x01, 0x4, 1, CpuTBM, Modrm|CheckRegSize|Vex=3|VexOpcode=4|VexVVVV=
// AMD 3DNow! instructions.
-prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow|CpuPRFCHW, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
prefetchw, 1, 0xf0d, 0x1, 2, Cpu3dnow|CpuPRFCHW, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
femms, 0, 0xf0e, None, 2, Cpu3dnow, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
pavgusb, 2, 0xf0f, 0xbf, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegMMX }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index faca6bb..001a966 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -38403,7 +38403,7 @@ const insn_template i386_optab[] =
{ "prefetch", 1, 0xf0d, 0x0, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1,
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
[-- Attachment #3: btver_gastest.patch --]
[-- Type: application/octet-stream, Size: 34078 bytes --]
diff --git a/gas/testsuite/gas/i386/arch-10-btver1.d b/gas/testsuite/gas/i386/arch-10-btver1.d
new file mode 100644
index 0000000..92a4151
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-10-btver1.d
@@ -0,0 +1,42 @@
+#source: arch-10.s
+#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+fma+bmi+tbm
+#objdump: -dw
+#name: i386 arch 10 (btver1)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/arch-10-btver2.d b/gas/testsuite/gas/i386/arch-10-btver2.d
new file mode 100644
index 0000000..c6a8d66
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-10-btver2.d
@@ -0,0 +1,42 @@
+#source: arch-10.s
+#as: -march=btver2+smx+vmx+ept+clflush+svme+padlock+fma+tbm
+#objdump: -dw
+#name: i386 arch 10 (btver2)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/nops-1-btver1.d b/gas/testsuite/gas/i386/nops-1-btver1.d
new file mode 100644
index 0000000..4bc5fc5
--- /dev/null
+++ b/gas/testsuite/gas/i386/nops-1-btver1.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver1
+#source: nops-1.s
+#objdump: -drw
+#name: i386 -mtune=btver1 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/nops-1-btver2.d b/gas/testsuite/gas/i386/nops-1-btver2.d
new file mode 100644
index 0000000..7e88b61
--- /dev/null
+++ b/gas/testsuite/gas/i386/nops-1-btver2.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver2
+#source: nops-1.s
+#objdump: -drw
+#name: i386 -mtune=btver2 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d b/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
new file mode 100644
index 0000000..8cfa780
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
@@ -0,0 +1,41 @@
+#source: x86-64-arch-2.s
+#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+fma+bmi+tbm
+#objdump: -dw
+#name: x86-64 arch 2 (btver1)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d b/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
new file mode 100644
index 0000000..61e8fae
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
@@ -0,0 +1,41 @@
+#source: x86-64-arch-2.s
+#as: -march=btver2+smx+vmx+ept+clflush+svme+padlock+fma+tbm
+#objdump: -dw
+#name: x86-64 arch 2 (btver2)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
+[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
+[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
+[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
+[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
+[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-nops-1-btver1.d b/gas/testsuite/gas/i386/x86-64-nops-1-btver1.d
new file mode 100644
index 0000000..a8f0295
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-nops-1-btver1.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver1
+#source: nops-1.s
+#objdump: -drw
+#name: x86-64 -mtune=btver1 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-nops-1-btver2.d b/gas/testsuite/gas/i386/x86-64-nops-1-btver2.d
new file mode 100644
index 0000000..8474dca
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-nops-1-btver2.d
@@ -0,0 +1,162 @@
+#as: -mtune=btver2
+#source: nops-1.s
+#objdump: -drw
+#name: x86-64 -mtune=btver2 nops 1
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+20 <nop13>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+30 <nop12>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+
+0+90 <nop6>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+
+0+c0 <nop3>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
+
+0+d0 <nop2>:
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
[-- Attachment #4: gas-changelog.txt --]
[-- Type: text/plain, Size: 321 bytes --]
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT
.
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT
.
* doc/c-i386.texi: Add -march={btver1, btver2} options
.
[-- Attachment #5: gastest-changelog.txt --]
[-- Type: text/plain, Size: 457 bytes --]
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Add new btver1 and btver2 test cases to run.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
[-- Attachment #6: opcodes-changelog.txt --]
[-- Type: text/plain, Size: 321 bytes --]
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add new CPU_BTVER1_FLAGS, CPU_BTVER2_FLAGS.
* i386-opc.h: Change CpuPRFCHW comment.
* i386-opc.tbl: Extend prefetch instruction.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH, v3]: AMD btver1 and btver2 enablement
2012-08-17 16:54 ` Eggone, NagaJyothi
@ 2012-08-17 18:18 ` H.J. Lu
2012-08-21 18:22 ` Eggone, NagaJyothi
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2012-08-17 18:18 UTC (permalink / raw)
To: Eggone, NagaJyothi; +Cc: binutils
On Fri, Aug 17, 2012 at 9:50 AM, Eggone, NagaJyothi
<NagaJyothi.Eggone@amd.com> wrote:
>
>
>> -----Original Message-----
>> From: H.J. Lu [mailto:hjl.tools@gmail.com]
>> Sent: Friday, August 17, 2012 6:41 PM
>> To: Eggone, NagaJyothi
>> Cc: binutils@sourceware.org
>> Subject: Re: [PATCH, v3]: AMD btver1 and btver2 enablement
>>
>> On Thu, Aug 16, 2012 at 11:28 PM, Eggone, NagaJyothi
>> <NagaJyothi.Eggone@amd.com> wrote:
>> > Hello H.J.,
>> >
>> >> -----Original Message-----
>> >> From: H.J. Lu [mailto:hjl.tools@gmail.com]
>> >> Sent: Thursday, August 16, 2012 11:31 PM
>> >> To: Eggone, NagaJyothi
>> >> Cc: binutils@sourceware.org
>> >> Subject: Re: [PATCH, v2]: AMD btver1 and btver2 enablement
>> >>
>> >> >>
>> >> >> Do you really need Cpu3dnowPrfch? Where will it be used?
>> >> >
>> >> > The 3dnow 'prefetch' and 'prefetchw' instructions are available
>> both
>> >> on the btver1 and btver2 cores. I could not have enabled both these
>> >> instructions for these cores without adding a cpu flag bit (this
>> >> corresponds to the cpuid ECX bit 8 on AMD processors).
>> >>
>> >> Please drop Cpu3dnowPrfch and add CpuPRFCHW to
>> >> prefetch.
>> >>
>> >> gas/testsuite changes should be in gas/testsuite/ChangeLog.
>> >>
>> >> --
>> >> H.J.
>> >
>> > I have changed the patch as per suggestions above. This patch also
>> includes the diffs of files opcodes/i386-init.h and opcodes/i386-tbl.h.
>> > Please review and if OK, commit to trunk.
>> >
>>
>> Please reformat your ChangeLog entries to follow
>> existing ones. You have extra blank lines and
>> missing '.'.
>>
>> + /* Supports prefetchw and 3dnow prefetch instructions. */
>>
>> Please drop 3dnow here.
>>
>> --
>> H.J.
>
> Re-submitting with changes.
>
I fixed ChangeLog entries and checked it for you.
Please submit proper ChangeLog entries next
time.
--
H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH, v3]: AMD btver1 and btver2 enablement
2012-08-17 18:18 ` H.J. Lu
@ 2012-08-21 18:22 ` Eggone, NagaJyothi
0 siblings, 0 replies; 5+ messages in thread
From: Eggone, NagaJyothi @ 2012-08-21 18:22 UTC (permalink / raw)
To: H.J. Lu; +Cc: binutils
> >> H.J.
> >
> > Re-submitting with changes.
> >
>
> I fixed ChangeLog entries and checked it for you.
> Please submit proper ChangeLog entries next
> time.
>
>
> --
> H.J.
Thanks!
Nagajyothi
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2012-08-21 10:58 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-08-17 7:24 [PATCH, v3]: AMD btver1 and btver2 enablement Eggone, NagaJyothi
2012-08-17 13:15 ` H.J. Lu
2012-08-17 16:54 ` Eggone, NagaJyothi
2012-08-17 18:18 ` H.J. Lu
2012-08-21 18:22 ` Eggone, NagaJyothi
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