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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 4/7] x86: improve match_template()'s diagnostics
Date: Thu, 18 Aug 2022 07:51:15 -0700	[thread overview]
Message-ID: <CAMe9rOqUCi_y27mUE1yeNAOvKObBYdx6Lc+_w=g2Her+HKiabw@mail.gmail.com> (raw)
In-Reply-To: <b5cb23e8-dbc6-a238-f6fb-c87c3cedcc2b@suse.com>

On Wed, Aug 17, 2022 at 11:14 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 17.08.2022 22:24, H.J. Lu wrote:
> > On Tue, Aug 16, 2022 at 12:32 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>
> >> At the example of
> >>
> >>         extractps $0, %xmm0, %xmm0
> >>         insertps $0, %xmm0, %eax
> >>
> >> (both having respectively the same mistake of using the wrong kind of
> >> destination register) it is easy to see that current behavior is far
> >> from ideal: The former results in "unsupported instruction" for 32-bit
> >> code simply because the 2nd template we have is a Cpu64 one. Instead we
> >> should aim at emitting the "best" possible error, which will typically
> >> be the one where we passed the largest number of checks. Generalize the
> >> original "specific_error" approach by making it apply to the entire
> >> matching loop, utilizing that line numbers increase as we pass further
> >> checks.
> >> ---
> >> As to the inval-tls testcase: Why is KMOV special? Are e.g. VMOV or
> >> other vector insns (legacy or EVEX-encoded) any different? Shouldn't the
> >> use of the respective reloc types be limited to _exactly_ the insns they
> >> are intended to be used with? Furthermore having this check in
> >> match_template() is unhelpful, as the resulting diagnostic isn't aiding
> >> in understanding what's wrong. Template matching should be left alone
> >> here, and the issue be diagnosed later, say directly in md_assemble()
> >> (alongside the various further consistency checks there) or in
> >> process_operands().
> >
> > GCC may generate invalid TLS code sequences with KMOV, not other
> > instructions.  We want to catch them by assembler.   It is easier to disallow
> > the invalid instructions.
>
> I did actually check both the discussion and gcc code in question, and I
> was not able to prove that it could have done so only for KMOV. And yes,
> I agree with disallowing the invalid instructions. The question is why
> we do so only for a limited and inconsistent subset.

So far, linker only sees it with KMOV.  Linker will issue an error if other
instructions are used.

> In addition you don't say anything regarding the point in time when we
> diagnose this, the placement of which - as said - looks sub-optimal to me.
>

Improvement is welcome.

-- 
H.J.

  reply	other threads:[~2022-08-18 14:51 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-16  7:27 [PATCH 0/7] x86: suffix handling changes Jan Beulich
2022-08-16  7:30 ` [PATCH 1/7] x86/Intel: restrict suffix derivation Jan Beulich
2022-08-17 19:19   ` H.J. Lu
2022-08-18  6:07     ` Jan Beulich
2022-08-18 14:46       ` H.J. Lu
2022-08-19  8:19         ` Jan Beulich
2022-08-19 14:23           ` H.J. Lu
2022-08-19 14:49             ` Jan Beulich
2022-08-19 17:00               ` H.J. Lu
2022-08-22  9:34                 ` Jan Beulich
2022-08-22 14:38                   ` H.J. Lu
2022-08-16  7:30 ` [PATCH 2/7] x86: insert "no error" enumerator in i386_error enumeration Jan Beulich
2022-08-17 19:19   ` H.J. Lu
2022-08-16  7:31 ` [PATCH 3/7] x86: move / quiesce pre-386 non-16-bit warning Jan Beulich
2022-08-17 19:21   ` H.J. Lu
2022-08-18  7:21     ` Jan Beulich
2022-08-18 15:30       ` H.J. Lu
2022-08-19  6:13         ` Jan Beulich
2022-08-19 14:18           ` H.J. Lu
2022-08-16  7:32 ` [PATCH 4/7] x86: improve match_template()'s diagnostics Jan Beulich
2022-08-17 20:24   ` H.J. Lu
2022-08-18  6:14     ` Jan Beulich
2022-08-18 14:51       ` H.J. Lu [this message]
2022-08-16  7:32 ` [PATCH 5/7] x86: re-work insn/suffix recognition Jan Beulich
2022-08-17 20:29   ` H.J. Lu
2022-08-18  6:24     ` Jan Beulich
2022-08-18 15:14       ` H.J. Lu
2022-08-19  8:28         ` Jan Beulich
2022-08-23  2:00           ` H.J. Lu
2022-08-26  9:26             ` Jan Beulich
2022-08-26 18:46               ` H.J. Lu
2022-09-06  6:40                 ` Jan Beulich
2022-09-06 21:53                   ` H.J. Lu
2022-09-07  7:17                     ` Jan Beulich
2022-09-26 23:52                       ` H.J. Lu
2022-09-28 12:49                         ` Jan Beulich
2022-09-28 19:33                           ` H.J. Lu
2022-09-29  8:08                             ` Jan Beulich
2022-09-29 16:00                               ` H.J. Lu
2022-09-29 16:06                                 ` Jan Beulich
2022-09-29 16:20                                   ` H.J. Lu
2022-08-16  7:33 ` [PATCH 6/7] x86-64: further re-work insn/suffix recognition to also cover MOVSL Jan Beulich
2022-08-16  7:34 ` [PATCH 7/7] ix86: don't recognize/derive Q suffix in the common case Jan Beulich
2022-08-17 20:36   ` H.J. Lu
2022-08-18  6:29     ` Jan Beulich

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