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* [PATCH, i386] Update to match latest AVX512 spec.
@ 2014-02-19 17:16 Ilya Tocar
  2014-02-19 20:12 ` H.J. Lu
  2014-02-19 20:56 ` H.J. Lu
  0 siblings, 2 replies; 3+ messages in thread
From: Ilya Tocar @ 2014-02-19 17:16 UTC (permalink / raw)
  To: binutils, hjl.tools

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Hi,
Between [1] and [2] versions of the spec there were some changes.
In particular:
  1)prefetchwt1 instruction now has it's own CPUID
  2)vptestnmd/vptesnmq instructions now have CPUID of AVX512F not AVX512CD
Also there was version of vctps2ph with sae and only 1 register operand, which was encoded
as if missing operand was equal to ymm0. I didn't found any references to it in [2],
so I removed it.
Attached is gzipped patch. Testing passes. There are a few trailing whitespaces,
but only in auto-generated files.
Ok for trunk?

[1] http://download-software.intel.com/sites/default/files/319433-015.pdf
[2] http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf

[-- Attachment #2: patch.tar.gz --]
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH, i386] Update to match latest AVX512 spec.
  2014-02-19 17:16 [PATCH, i386] Update to match latest AVX512 spec Ilya Tocar
@ 2014-02-19 20:12 ` H.J. Lu
  2014-02-19 20:56 ` H.J. Lu
  1 sibling, 0 replies; 3+ messages in thread
From: H.J. Lu @ 2014-02-19 20:12 UTC (permalink / raw)
  To: Ilya Tocar; +Cc: Binutils

On Wed, Feb 19, 2014 at 9:16 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
> Hi,
> Between [1] and [2] versions of the spec there were some changes.
> In particular:
>   1)prefetchwt1 instruction now has it's own CPUID
>   2)vptestnmd/vptesnmq instructions now have CPUID of AVX512F not AVX512CD
> Also there was version of vctps2ph with sae and only 1 register operand, which was encoded
> as if missing operand was equal to ymm0. I didn't found any references to it in [2],
> so I removed it.
> Attached is gzipped patch. Testing passes. There are a few trailing whitespaces,
> but only in auto-generated files.
> Ok for trunk?
>
> [1] http://download-software.intel.com/sites/default/files/319433-015.pdf
> [2] http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf

Please break it into 3 separate patches:

1. Remove wrong cvtps2ph variant.
2. Add cpu PREFETCHWT1.
3. Update cpu for vptestnmd/vptestnmq.

Please provide proper commit log for each patch  You can take
a look at commits at:

https://sourceware.org/git/?p=binutils-gdb.git;a=summary

for examples.

Thanks.

-- 
H.J.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH, i386] Update to match latest AVX512 spec.
  2014-02-19 17:16 [PATCH, i386] Update to match latest AVX512 spec Ilya Tocar
  2014-02-19 20:12 ` H.J. Lu
@ 2014-02-19 20:56 ` H.J. Lu
  1 sibling, 0 replies; 3+ messages in thread
From: H.J. Lu @ 2014-02-19 20:56 UTC (permalink / raw)
  To: Ilya Tocar; +Cc: Binutils

On Wed, Feb 19, 2014 at 9:16 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:

> Attached is gzipped patch. Testing passes. There are a few trailing whitespaces,
> but only in auto-generated files.

I checked in this patch to avoid trailing space in generated files.

-- 
H.J.
--
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f861eca..df34675 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+ * i386-gen.c (output_cpu_flags): Don't output trailing space.
+ (output_opcode_modifier): Likewise.
+ (output_operand_type): Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
+
 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

  * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 343f58d..59f7e09 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -713,7 +713,10 @@ output_cpu_flags (FILE *table, bitfield *flags,
unsigned int size,

   for (i = 0; i < size - 1; i++)
     {
-      fprintf (table, "%d, ", flags[i].value);
+      if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", flags[i].value);
+      else
+ fprintf (table, "%d,", flags[i].value);
       if (((i + 1) % 20) == 0)
  {
   /* We need \\ for macro.  */
@@ -801,7 +804,10 @@ output_opcode_modifier (FILE *table, bitfield
*modifier, unsigned int size)

   for (i = 0; i < size - 1; i++)
     {
-      fprintf (table, "%d, ", modifier[i].value);
+      if (((i + 1) % 20) != 0)
+        fprintf (table, "%d, ", modifier[i].value);
+      else
+        fprintf (table, "%d,", modifier[i].value);
       if (((i + 1) % 20) == 0)
  fprintf (table, "\n      ");
     }
@@ -842,12 +848,15 @@ output_operand_type (FILE *table, bitfield
*types, unsigned int size,

   for (i = 0; i < size - 1; i++)
     {
-      fprintf (table, "%d, ", types[i].value);
+      if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", types[i].value);
+      else
+ fprintf (table, "%d,", types[i].value);
       if (((i + 1) % 20) == 0)
  {
   /* We need \\ for macro.  */
   if (macro)
-    fprintf (table, "\\\n%s", indent);
+    fprintf (table, " \\\n%s", indent);
   else
     fprintf (table, "\n%s", indent);
  }

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2014-02-19 17:16 [PATCH, i386] Update to match latest AVX512 spec Ilya Tocar
2014-02-19 20:12 ` H.J. Lu
2014-02-19 20:56 ` H.J. Lu

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