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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 4/6] x86: fold SSE2AVX and their base MMX/SSE templates
Date: Mon, 29 Mar 2021 06:31:37 -0700	[thread overview]
Message-ID: <CAMe9rOr3_SA4=O48WjkLk2q6zAKep4UK2w2Q4r+Rw_xSxa27Jg@mail.gmail.com> (raw)
In-Reply-To: <c424c31d-8967-9172-265b-8cc1b816507e@suse.com>

On Fri, Mar 26, 2021 at 3:51 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> This way not only the overall (source) table size shrinks by quite a
> bit and the risk of related templates going out of sync with one another
> gets lowered, but also (dis)similarities between neighboring templates
> become easier to spot.
>
> Note that for certain SSE2AVX templates this results in benign attribute
> changes:
> - LDMXCSR and STMXCSR: NoAVX gets set,
> - MOVMSKPS, PMOVMSKB, PEXTR{B,W} (register destination), and PINSR{B,W}
>   (register source): IgnoreSize and NoRex64 get set,
> - CVT{DQ,PS}2PD, CVTSD2SS, MOVMSKPD, MOVDDUP, PMOV{S,Z}X{BW,WD,DQ}, and
>   ROUNDSD: NoRex64 gets set,
> - CVTSS2SD, INSERTPS, PEXTRW (memory destination), PINSRW (memory
>   source), and PMOV{S,Z}X{BD,WQ,BQ}: IgnoreSize gets set.
> Similarly the "normal" (non-SSE2AVX)
> - non-64-bit CVTS{I,S}2SD forms get NoRex64 set,
> - CMP{EQ,ORD,NEQ,UNORD}{P,S}{S,D} forms get C set,
> all again in a benign way.
>
> The remaining differences in the generated table are due to re-ordering
> of entries in the course of being folded into templates.
>
> opcodes/
> 2021-03-XX  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-opc.tbl (mmx, sse, sse2, sse3, ssse3, sse41, sse42, aes,
>         pclmul, gfni): New templates. Use them wherever possible. Move
>         SSE4.1 pextrw into respective section.
>         * i386-tbl.h: Re-generate.
> ---
> Considering the setting of C turned out benign for legacy encoding
> templates (I did the CMP<>{P,S}{S,D} conversion rather late in the
> process, as it was there where I expected problems), it would be an
> option to drop the "comm" template parameters, at the expense of further
> legacy encoding templates getting C set. An alternative would be to have
> i386-gen recognize at least simple & expressions, allowing use of e.g.
> ...|<sse_frel:comm>&<sse:comm>|... in the templates.
>
> It might further be possible to live with VexVVVV getting set on legacy
> encoding templates, which would allow elimination of another template
> parameter in a number of cases.
>

I don't have a preference.  Please feel free to do something reasonable.

Thanks.

--
H.J.

  reply	other threads:[~2021-03-29 13:32 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-26 10:48 [PATCH 0/6] x86: further opcode table compaction plus fallout Jan Beulich
2021-03-26 10:50 ` [PATCH 1/6] x86: derive opcode encoding space attribute from base opcode Jan Beulich
2021-03-26 10:50 ` [PATCH 2/6] x86: shrink some struct insn_template fields Jan Beulich
2021-03-29 13:00   ` H.J. Lu
2021-03-29 14:03     ` Jan Beulich
2021-03-29 14:41       ` H.J. Lu
2021-03-29 14:49         ` Jan Beulich
2021-03-29 14:51           ` H.J. Lu
2021-03-26 10:51 ` [PATCH 3/6] x86: undo Prefix_0X<nn> use in opcode table Jan Beulich
2021-03-26 10:51 ` [PATCH 4/6] x86: fold SSE2AVX and their base MMX/SSE templates Jan Beulich
2021-03-29 13:31   ` H.J. Lu [this message]
2021-03-26 10:52 ` [PATCH 5/6] x86: VPSADBW's source operands are also commutative Jan Beulich
2021-03-26 10:53 ` [PATCH 6/6] x86: move some opcode table entries Jan Beulich
2021-03-26 21:16 ` [PATCH 0/6] x86: further opcode table compaction plus fallout H.J. Lu
2021-03-29 10:08   ` Jan Beulich

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