From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oo1-xc42.google.com (mail-oo1-xc42.google.com [IPv6:2607:f8b0:4864:20::c42]) by sourceware.org (Postfix) with ESMTPS id 64BF83857C49 for ; Fri, 2 Oct 2020 12:28:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 64BF83857C49 Received: by mail-oo1-xc42.google.com with SMTP id r10so295343oor.5 for ; Fri, 02 Oct 2020 05:28:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=d9CI8a//3K3Mwn7nBxC+rpZLU48Lt8vGdYgyj9VZfuc=; b=l9I7FMIbRiExfZbe7N6awKA9PpI5XIr607oUmrOEZkWNzrxdVky1gMhtw3KLg2aypF D31Oc9rLiLZF6NvoDwGux+y0bBwZlKSEUMj0AADc7UjMvGznHpyJIHfNoNwJQ6T5JBUP mtsLipMcIDjIVSQ0T6sNx/NGM4OFmGdeLVFA6yto1Ov9p3aKNazN8QkEq3Fw4He6IT4n iTbdxJjZ6Ux/oBwlJVwlZVVPaItyqnZMo1f9PsJ/7pNUGI/Laq+1Jb356572f3F7KfX0 SePzMZGVLrgkCmh9wLcI8B9aLwmH7lCQjNtf/craUOqAO9eJX7oTDrPtgOPVbfts9E7f IFUg== X-Gm-Message-State: AOAM533GvCsbSjduWketquewfXGpadKTwqLdlHXAOrrJDY83D8JLfJ2R +kxZcRnHRFssr3qkqaRxxGndlsd1mf2aTduNwDA= X-Google-Smtp-Source: ABdhPJwyW9jI2iDR5jluR9t+1nlb7hhU/hnPUzWabYPGVpp0MGWgv5vfAFNl6DDd5KEZlvsM7XJM5GZAV6+to7TyPMc= X-Received: by 2002:a4a:d40c:: with SMTP id n12mr1724411oos.35.1601641703713; Fri, 02 Oct 2020 05:28:23 -0700 (PDT) MIME-Version: 1.0 References: <20200930233002.3044234-1-hjl.tools@gmail.com> <7d3679b6-acf0-e530-8ccf-654c5ff8fb16@suse.com> <4e7966f2-c54e-436a-d75c-9593ba041cc5@suse.com> <9a0a50db-cfdb-233c-b837-ab6c329f831a@suse.com> In-Reply-To: <9a0a50db-cfdb-233c-b837-ab6c329f831a@suse.com> From: "H.J. Lu" Date: Fri, 2 Oct 2020 05:27:47 -0700 Message-ID: Subject: Re: [PATCH] x86: Update register operand check for AddrPrefixOpReg To: Jan Beulich Cc: Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3029.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Oct 2020 12:28:25 -0000 On Fri, Oct 2, 2020 at 5:18 AM Jan Beulich wrote: > > On 02.10.2020 13:33, H.J. Lu wrote: > > On Thu, Oct 1, 2020 at 11:58 PM Jan Beulich wrote: > >> On 01.10.2020 17:08, H.J. Lu wrote: > >>> GNU assembler accommodates other usages. But it must work with GCC. > >> > >> We agree on this. What you don't want to accept is that gcc also > >> needs to emit correct code for gas to consume. > >> > >>> In this case, it needs to check the register operand for the address size prefix > >>> when the memory operand is (%rip). > >> > >> And we again agree on the checking aspect. What we disagree on is > >> what to do if the check finds a discrepancy. Without your recent > >> change, the checking you talk about did already happen. And the > >> assembler correctly diagnosed it. The assembler may not _ever_ > >> guess upon what the programmer meant, when finding an ambiguity > >> (exceptions to this rule may be warranted for backwards > >> compatibility in very rare cases, but this clearly doesn't apply > >> here). We've had this discussion before in different contexts, > >> and I have to admit I'm struggling with how you drive things in > >> this regard. If there was a way for gcc to indicate "I've done my > >> best, but please fix it up for me", I could accept there being > >> such a (non-default) mode. I wouldn't like it very much, but I > >> could live with it. But for hand-written code (be it entire .s > >> files or inline assembly) inconsistencies and ambiguities need to > >> be diagnosed by default. > >> > >> Note in particular that your change isn't even limited to x32 > >> mode, where one _might_ view the adjustment as benign. > > > > The address size prefix isn't limited to x32. For RIP-relative > > addressing, GCC always uses (%rip). > > But the issue at hand is limited to x32, and the conversion you're > doing is also only half-way safe for x32. This is about the address size prefix in encoding and x32 uses it. > > The assembler will never > > guess correctly what the assembly code is trying to do in all > > cases. > > Hence it shouldn't guess. It should tell the programmer to change > the code so guessing isn't needed. GCC uses (%rip) for RIP relative addressing since there is no need for the address size prefix for x32 and x86-64. It is the same as DISP and SYMBOL memory operand. This is how GCC works. Assembler just needs to check the register operand for the address size prefix. > > In this particular case, the assembler needs to look > > at the register operand to extract the address size prefix. > > And how does it know _that's_ the part which is correct (as per > the programmer's intentions), and not the other operand? > In this case, just extract the address size prefix from the register operand. -- H.J.