* [PATCH, i386][1/3] Update to match latest AVX512 spec. @ 2014-02-20 15:20 Ilya Tocar 2014-02-20 15:59 ` H.J. Lu 0 siblings, 1 reply; 14+ messages in thread From: Ilya Tocar @ 2014-02-20 15:20 UTC (permalink / raw) To: Binutils, H.J. Lu [-- Attachment #1: Type: text/plain, Size: 342 bytes --] Hi, As suggested in https://sourceware.org/ml/binutils/2014-02/msg00114.html I've split my patch in 3 parts. In this part i've changed CPUID of vptestnmq, vptestnmd instructions from AVX512CD to AVX512F, to reflect latest spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Testing passes. Ok for trunk? [-- Attachment #2: patch1.tar.gz --] [-- Type: application/gzip, Size: 6392 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][1/3] Update to match latest AVX512 spec. 2014-02-20 15:20 [PATCH, i386][1/3] Update to match latest AVX512 spec Ilya Tocar @ 2014-02-20 15:59 ` H.J. Lu 2014-02-21 13:31 ` [PATCH, i386][2/3] " Ilya Tocar ` (2 more replies) 0 siblings, 3 replies; 14+ messages in thread From: H.J. Lu @ 2014-02-20 15:59 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Thu, Feb 20, 2014 at 7:19 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > Hi, > > As suggested in https://sourceware.org/ml/binutils/2014-02/msg00114.html > I've split my patch in 3 parts. > In this part i've changed CPUID of vptestnmq, vptestnmd instructions > from AVX512CD to AVX512F, to reflect latest spec > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf > Testing passes. Ok for trunk? I checked it in for you with git am --whitespace=fix /tmp/0001-Change-cpu-for-vptestnmd-and-vptestnmq-instructions.patch Applying: Change cpu for vptestnmd and vptestnmq instructions. /export/gnu/import/git/sources/binutils-gdb/.git/rebase-apply/patch:463: new blank line at EOF. + /export/gnu/import/git/sources/binutils-gdb/.git/rebase-apply/patch:884: new blank line at EOF. + warning: 2 lines add whitespace errors. Please double check it next time. Thanks. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH, i386][2/3] Update to match latest AVX512 spec. 2014-02-20 15:59 ` H.J. Lu @ 2014-02-21 13:31 ` Ilya Tocar 2014-02-21 16:07 ` H.J. Lu 2014-02-24 13:22 ` [PATCH, i386][3/3] " Ilya Tocar 2014-03-20 17:27 ` [PATCH, i386][1/3] " H.J. Lu 2 siblings, 1 reply; 14+ messages in thread From: Ilya Tocar @ 2014-02-21 13:31 UTC (permalink / raw) To: H.J. Lu; +Cc: Binutils [-- Attachment #1: Type: text/plain, Size: 493 bytes --] This second part of changes from https://sourceware.org/ml/binutils/2014-02/msg00114.html Latest AVX512 spec[1] added CPUID PREFETCHWT1 for prefetchwt1. This patch adds support for CPUID PREFETCHWT1. Testing passes. Ok for trunk? [1] http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf > git am --whitespace=fix > new blank line at EOF. > Please double check it next time. Thanks for an advice. I've run git am --whitespace=fix and didn't find any problems. [-- Attachment #2: patch.tar.gz --] [-- Type: application/gzip, Size: 61349 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][2/3] Update to match latest AVX512 spec. 2014-02-21 13:31 ` [PATCH, i386][2/3] " Ilya Tocar @ 2014-02-21 16:07 ` H.J. Lu 2014-03-20 17:29 ` H.J. Lu 0 siblings, 1 reply; 14+ messages in thread From: H.J. Lu @ 2014-02-21 16:07 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Fri, Feb 21, 2014 at 5:30 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > This second part of changes from > https://sourceware.org/ml/binutils/2014-02/msg00114.html > > Latest AVX512 spec[1] added CPUID PREFETCHWT1 for prefetchwt1. > This patch adds support for CPUID PREFETCHWT1. Testing passes. > Ok for trunk? > > [1] http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf >> git am --whitespace=fix >> new blank line at EOF. >> Please double check it next time. > > Thanks for an advice. > I've run git am --whitespace=fix and didn't find any problems. I checked it in for you with one change. I changed * gas/i386/prefetchwt1-intel.d: Add prefetchwt1. to * gas/i386/prefetchwt1-intel.d: New file. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][2/3] Update to match latest AVX512 spec. 2014-02-21 16:07 ` H.J. Lu @ 2014-03-20 17:29 ` H.J. Lu 0 siblings, 0 replies; 14+ messages in thread From: H.J. Lu @ 2014-03-20 17:29 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Fri, Feb 21, 2014 at 8:07 AM, H.J. Lu <hjl.tools@gmail.com> wrote: > On Fri, Feb 21, 2014 at 5:30 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >> This second part of changes from >> https://sourceware.org/ml/binutils/2014-02/msg00114.html >> >> Latest AVX512 spec[1] added CPUID PREFETCHWT1 for prefetchwt1. >> This patch adds support for CPUID PREFETCHWT1. Testing passes. >> Ok for trunk? >> >> [1] http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf >>> git am --whitespace=fix >>> new blank line at EOF. >>> Please double check it next time. >> >> Thanks for an advice. >> I've run git am --whitespace=fix and didn't find any problems. > > I checked it in for you with one change. I changed > > * gas/i386/prefetchwt1-intel.d: Add prefetchwt1. > > to > > * gas/i386/prefetchwt1-intel.d: New file. > I backported it to binutils-2_24-branch. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-20 15:59 ` H.J. Lu 2014-02-21 13:31 ` [PATCH, i386][2/3] " Ilya Tocar @ 2014-02-24 13:22 ` Ilya Tocar 2014-02-24 16:30 ` H.J. Lu 2014-03-20 17:27 ` [PATCH, i386][1/3] " H.J. Lu 2 siblings, 1 reply; 14+ messages in thread From: Ilya Tocar @ 2014-02-24 13:22 UTC (permalink / raw) To: H.J. Lu; +Cc: Binutils [-- Attachment #1: Type: text/plain, Size: 336 bytes --] Hi, Currently support version of vctps2ph with sae and only 1 register operand. This version is encoded as if missing operand was equal to ymm0. I didn't found any references to this variant in http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Attached patch removes it. Testing passes. Ok for trunk? [-- Attachment #2: 0001-Remove-bogus-vcvtps2ph-variant.patch --] [-- Type: text/plain, Size: 4299 bytes --] From 046c0eab6fe8c8f96bac8c27fad342666df12001 Mon Sep 17 00:00:00 2001 From: Ilya Tocar <ilya.tocar@intel.com> Date: Thu, 20 Feb 2014 19:08:13 +0400 Subject: [PATCH] Remove bogus vcvtps2ph variant. We currently support version of vctps2ph with sae and only 1 register operand. This version is encoded as if missing operand was equal to ymm0. I didn't found any references to this variant in http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf This patch removes it. opcodes/ * i386-opc.tbl: Remove wrong variant of vcvtps2ph * i386-tbl.h: Regenerate. --- opcodes/ChangeLog | 5 +++++ opcodes/i386-opc.tbl | 1 - opcodes/i386-tbl.h | 18 ------------------ 3 files changed, 5 insertions(+), 19 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 585d619..6f6f089 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2014-02-21 Ilya Tocar <ilya.tocar@intel.com> + * i386-opc.tbl: Remove wrong variant of vcvtps2ph + * i386-tbl.h: Regenerate. + +2014-02-20 Ilya Tocar <ilya.tocar@intel.com> + * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. * i386-init.h: Regenerate. diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index e0b7072..b22ecad 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3633,7 +3633,6 @@ vcvtps2pd, 3, 0x5A, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegZMM, RegYMM|RegMem } vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM, RegYMM|RegMem } vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegZMM, YMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8 } -vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM|RegMem } vcvtsd2si, 2, 0xF22D, None, 1, CpuAVX512F, Modrm|EVex=4|VexOpcode=0|VexW=1|VecESize=1|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, Reg32 } vcvtsd2si, 3, 0xF22D, None, 1, CpuAVX512F, Modrm|EVex=4|VexOpcode=0|VexW=1|VecESize=1|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { Imm8, RegXMM, Reg32 } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 6f910b2..a4759d2 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -44114,24 +44114,6 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0 } } } }, - { "vcvtps2ph", 3, 0x661D, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 2, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132pd", 3, 0x6698, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -- 1.8.3.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-24 13:22 ` [PATCH, i386][3/3] " Ilya Tocar @ 2014-02-24 16:30 ` H.J. Lu 2014-02-25 9:41 ` Ilya Tocar 0 siblings, 1 reply; 14+ messages in thread From: H.J. Lu @ 2014-02-24 16:30 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Mon, Feb 24, 2014 at 5:22 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > Hi, > > Currently support version of vctps2ph with sae and only 1 register ^^^^^^^^^^^^^^ Please fix commit log. It should be vcvtps2ph. > operand. This version is encoded as if missing operand was equal to > ymm0. I didn't found any references to this variant in > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf > Attached patch removes it. Testing passes. Ok for trunk? vcvtps2ph supports memory destination. Please add AVX512F testcases with memory destination. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-24 16:30 ` H.J. Lu @ 2014-02-25 9:41 ` Ilya Tocar 2014-02-25 15:54 ` H.J. Lu 0 siblings, 1 reply; 14+ messages in thread From: Ilya Tocar @ 2014-02-25 9:41 UTC (permalink / raw) To: H.J. Lu; +Cc: Binutils [-- Attachment #1: Type: text/plain, Size: 1167 bytes --] On 24 Feb 08:30, H.J. Lu wrote: > On Mon, Feb 24, 2014 at 5:22 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > > Hi, > > > > Currently support version of vctps2ph with sae and only 1 register > ^^^^^^^^^^^^^^ Please fix > commit log. It should be vcvtps2ph. Fixed. > > operand. This version is encoded as if missing operand was equal to > > ymm0. I didn't found any references to this variant in > > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf > > Attached patch removes it. Testing passes. Ok for trunk? > > vcvtps2ph supports memory destination. Please add AVX512F testcases > with memory destination. > We already have such tests. See e. g. on lines 6883-6890 in gas/testsuite/gas/i386/avx512f.s we have: vcvtps2ph $0xab, %zmm6, (%ecx) # AVX512F vcvtps2ph $0xab, %zmm6, (%ecx){%k7} # AVX512F vcvtps2ph $123, %zmm6, (%ecx) # AVX512F vcvtps2ph $123, %zmm6, -123456(%esp,%esi,8) # AVX512F vcvtps2ph $123, %zmm6, 4064(%edx) # AVX512F Disp8 vcvtps2ph $123, %zmm6, 4096(%edx) # AVX512F vcvtps2ph $123, %zmm6, -4096(%edx) # AVX512F Disp8 Do we need additional tests? [-- Attachment #2: 0001-Remove-bogus-vcvtps2ph-variant.patch --] [-- Type: text/plain, Size: 4320 bytes --] From 1f3a59fb284f10f8f7c16e33d644e4cd9d132ee0 Mon Sep 17 00:00:00 2001 From: Ilya Tocar <ilya.tocar@intel.com> Date: Thu, 20 Feb 2014 19:08:13 +0400 Subject: [PATCH] Remove bogus vcvtps2ph variant. We currently support version of vcvtps2ph with sae and only 1 register operand. This version is encoded as if missing operand was equal to ymm0. I didn't found any references to this variant in http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf This patch removes it. opcodes/ * i386-opc.tbl: Remove wrong variant of vcvtps2ph * i386-tbl.h: Regenerate. --- opcodes/ChangeLog | 7 ++++++- opcodes/i386-opc.tbl | 1 - opcodes/i386-tbl.h | 18 ------------------ 3 files changed, 6 insertions(+), 20 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 585d619..ac1d8fb 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,4 +1,9 @@ -2014-02-21 Ilya Tocar <ilya.tocar@intel.com> +2014-02-25 Ilya Tocar <ilya.tocar@intel.com> + + * i386-opc.tbl: Remove wrong variant of vcvtps2ph + * i386-tbl.h: Regenerate. + +2014-02-20 Ilya Tocar <ilya.tocar@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index e0b7072..b22ecad 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3633,7 +3633,6 @@ vcvtps2pd, 3, 0x5A, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegZMM, RegYMM|RegMem } vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM, RegYMM|RegMem } vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegZMM, YMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8 } -vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM|RegMem } vcvtsd2si, 2, 0xF22D, None, 1, CpuAVX512F, Modrm|EVex=4|VexOpcode=0|VexW=1|VecESize=1|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, Reg32 } vcvtsd2si, 3, 0xF22D, None, 1, CpuAVX512F, Modrm|EVex=4|VexOpcode=0|VexW=1|VecESize=1|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { Imm8, RegXMM, Reg32 } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 6f910b2..a4759d2 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -44114,24 +44114,6 @@ const insn_template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0 } } } }, - { "vcvtps2ph", 3, 0x661D, None, 1, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 2, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0, 1, 0, 0, 0, 0, - 0, 0 }, - { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "vfmadd132pd", 3, 0x6698, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -- 1.8.3.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-25 9:41 ` Ilya Tocar @ 2014-02-25 15:54 ` H.J. Lu 2014-02-25 16:03 ` H.J. Lu 0 siblings, 1 reply; 14+ messages in thread From: H.J. Lu @ 2014-02-25 15:54 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Tue, Feb 25, 2014 at 1:41 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > On 24 Feb 08:30, H.J. Lu wrote: >> On Mon, Feb 24, 2014 at 5:22 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >> > Hi, >> > >> > Currently support version of vctps2ph with sae and only 1 register >> ^^^^^^^^^^^^^^ Please fix >> commit log. It should be vcvtps2ph. > Fixed. >> > operand. This version is encoded as if missing operand was equal to >> > ymm0. I didn't found any references to this variant in >> > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf >> > Attached patch removes it. Testing passes. Ok for trunk? >> >> vcvtps2ph supports memory destination. Please add AVX512F testcases >> with memory destination. >> > We already have such tests. See e. g. on lines 6883-6890 in > gas/testsuite/gas/i386/avx512f.s we have: > > vcvtps2ph $0xab, %zmm6, (%ecx) # AVX512F > vcvtps2ph $0xab, %zmm6, (%ecx){%k7} # AVX512F > vcvtps2ph $123, %zmm6, (%ecx) # AVX512F > vcvtps2ph $123, %zmm6, -123456(%esp,%esi,8) # AVX512F > vcvtps2ph $123, %zmm6, 4064(%edx) # AVX512F Disp8 > vcvtps2ph $123, %zmm6, 4096(%edx) # AVX512F > vcvtps2ph $123, %zmm6, -4096(%edx) # AVX512F Disp8 > > Do we need additional tests? Yes, please test with memory destination for: vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM|RegMem } -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-25 15:54 ` H.J. Lu @ 2014-02-25 16:03 ` H.J. Lu 2014-02-25 16:25 ` Ilya Tocar 0 siblings, 1 reply; 14+ messages in thread From: H.J. Lu @ 2014-02-25 16:03 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Tue, Feb 25, 2014 at 7:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote: > On Tue, Feb 25, 2014 at 1:41 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >> On 24 Feb 08:30, H.J. Lu wrote: >>> On Mon, Feb 24, 2014 at 5:22 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >>> > Hi, >>> > >>> > Currently support version of vctps2ph with sae and only 1 register >>> ^^^^^^^^^^^^^^ Please fix >>> commit log. It should be vcvtps2ph. >> Fixed. >>> > operand. This version is encoded as if missing operand was equal to >>> > ymm0. I didn't found any references to this variant in >>> > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf >>> > Attached patch removes it. Testing passes. Ok for trunk? >>> >>> vcvtps2ph supports memory destination. Please add AVX512F testcases >>> with memory destination. >>> >> We already have such tests. See e. g. on lines 6883-6890 in >> gas/testsuite/gas/i386/avx512f.s we have: >> >> vcvtps2ph $0xab, %zmm6, (%ecx) # AVX512F >> vcvtps2ph $0xab, %zmm6, (%ecx){%k7} # AVX512F >> vcvtps2ph $123, %zmm6, (%ecx) # AVX512F >> vcvtps2ph $123, %zmm6, -123456(%esp,%esi,8) # AVX512F >> vcvtps2ph $123, %zmm6, 4064(%edx) # AVX512F Disp8 >> vcvtps2ph $123, %zmm6, 4096(%edx) # AVX512F >> vcvtps2ph $123, %zmm6, -4096(%edx) # AVX512F Disp8 >> >> Do we need additional tests? > > Yes, please test with memory destination for: > > vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, > Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, > { Imm8, Imm8, RegZMM|RegMem } Also for vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM, RegYMM|RegMem } -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-25 16:03 ` H.J. Lu @ 2014-02-25 16:25 ` Ilya Tocar 2014-02-25 16:53 ` H.J. Lu 0 siblings, 1 reply; 14+ messages in thread From: Ilya Tocar @ 2014-02-25 16:25 UTC (permalink / raw) To: H.J. Lu; +Cc: Binutils > >>> vcvtps2ph supports memory destination. Please add AVX512F testcases > >>> with memory destination. > >>> > >> We already have such tests. See e. g. on lines 6883-6890 in > >> gas/testsuite/gas/i386/avx512f.s we have: > >> > >> vcvtps2ph $0xab, %zmm6, (%ecx) # AVX512F > >> vcvtps2ph $0xab, %zmm6, (%ecx){%k7} # AVX512F > >> vcvtps2ph $123, %zmm6, (%ecx) # AVX512F > >> vcvtps2ph $123, %zmm6, -123456(%esp,%esi,8) # AVX512F > >> vcvtps2ph $123, %zmm6, 4064(%edx) # AVX512F Disp8 > >> vcvtps2ph $123, %zmm6, 4096(%edx) # AVX512F > >> vcvtps2ph $123, %zmm6, -4096(%edx) # AVX512F Disp8 > >> > >> Do we need additional tests? > > > > Yes, please test with memory destination for: > > > > vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, > > Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, > > { Imm8, Imm8, RegZMM|RegMem } This variant is removed in my patch. What exactly should I test? > > Also for > > vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F, > Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, > { Imm8, Imm8, RegZMM, RegYMM|RegMem } This is reg-reg version with SAE, which is already tested on e. g. line 2602 in gas/testsuite/gas/i386/avx512f.s: vcvtps2ph $0xab, {sae}, %zmm5, %ymm6{%k7} # AVX512F Also instruction can't have memory operand and SAE at the same time. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-25 16:25 ` Ilya Tocar @ 2014-02-25 16:53 ` H.J. Lu 2014-03-20 17:30 ` H.J. Lu 0 siblings, 1 reply; 14+ messages in thread From: H.J. Lu @ 2014-02-25 16:53 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Tue, Feb 25, 2014 at 8:24 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >> >>> vcvtps2ph supports memory destination. Please add AVX512F testcases >> >>> with memory destination. >> >>> >> >> We already have such tests. See e. g. on lines 6883-6890 in >> >> gas/testsuite/gas/i386/avx512f.s we have: >> >> >> >> vcvtps2ph $0xab, %zmm6, (%ecx) # AVX512F >> >> vcvtps2ph $0xab, %zmm6, (%ecx){%k7} # AVX512F >> >> vcvtps2ph $123, %zmm6, (%ecx) # AVX512F >> >> vcvtps2ph $123, %zmm6, -123456(%esp,%esi,8) # AVX512F >> >> vcvtps2ph $123, %zmm6, 4064(%edx) # AVX512F Disp8 >> >> vcvtps2ph $123, %zmm6, 4096(%edx) # AVX512F >> >> vcvtps2ph $123, %zmm6, -4096(%edx) # AVX512F Disp8 >> >> >> >> Do we need additional tests? >> > >> > Yes, please test with memory destination for: >> > >> > vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, >> > Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, >> > { Imm8, Imm8, RegZMM|RegMem } > This variant is removed in my patch. What exactly should I test? >> >> Also for >> >> vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F, >> Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, >> { Imm8, Imm8, RegZMM, RegYMM|RegMem } > This is reg-reg version with SAE, which is already tested on e. g. > line 2602 in gas/testsuite/gas/i386/avx512f.s: > > vcvtps2ph $0xab, {sae}, %zmm5, %ymm6{%k7} # AVX512F > > Also instruction can't have memory operand and SAE at the same time. OK. I checked it in for you. Thanks. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][3/3] Update to match latest AVX512 spec. 2014-02-25 16:53 ` H.J. Lu @ 2014-03-20 17:30 ` H.J. Lu 0 siblings, 0 replies; 14+ messages in thread From: H.J. Lu @ 2014-03-20 17:30 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Tue, Feb 25, 2014 at 8:53 AM, H.J. Lu <hjl.tools@gmail.com> wrote: > On Tue, Feb 25, 2014 at 8:24 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >>> >>> vcvtps2ph supports memory destination. Please add AVX512F testcases >>> >>> with memory destination. >>> >>> >>> >> We already have such tests. See e. g. on lines 6883-6890 in >>> >> gas/testsuite/gas/i386/avx512f.s we have: >>> >> >>> >> vcvtps2ph $0xab, %zmm6, (%ecx) # AVX512F >>> >> vcvtps2ph $0xab, %zmm6, (%ecx){%k7} # AVX512F >>> >> vcvtps2ph $123, %zmm6, (%ecx) # AVX512F >>> >> vcvtps2ph $123, %zmm6, -123456(%esp,%esi,8) # AVX512F >>> >> vcvtps2ph $123, %zmm6, 4064(%edx) # AVX512F Disp8 >>> >> vcvtps2ph $123, %zmm6, 4096(%edx) # AVX512F >>> >> vcvtps2ph $123, %zmm6, -4096(%edx) # AVX512F Disp8 >>> >> >>> >> Do we need additional tests? >>> > >>> > Yes, please test with memory destination for: >>> > >>> > vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F, >>> > Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, >>> > { Imm8, Imm8, RegZMM|RegMem } >> This variant is removed in my patch. What exactly should I test? >>> >>> Also for >>> >>> vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F, >>> Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, >>> { Imm8, Imm8, RegZMM, RegYMM|RegMem } >> This is reg-reg version with SAE, which is already tested on e. g. >> line 2602 in gas/testsuite/gas/i386/avx512f.s: >> >> vcvtps2ph $0xab, {sae}, %zmm5, %ymm6{%k7} # AVX512F >> >> Also instruction can't have memory operand and SAE at the same time. > > OK. I checked it in for you. > I backported it to binutils-2_24-branch. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH, i386][1/3] Update to match latest AVX512 spec. 2014-02-20 15:59 ` H.J. Lu 2014-02-21 13:31 ` [PATCH, i386][2/3] " Ilya Tocar 2014-02-24 13:22 ` [PATCH, i386][3/3] " Ilya Tocar @ 2014-03-20 17:27 ` H.J. Lu 2 siblings, 0 replies; 14+ messages in thread From: H.J. Lu @ 2014-03-20 17:27 UTC (permalink / raw) To: Ilya Tocar; +Cc: Binutils On Thu, Feb 20, 2014 at 7:59 AM, H.J. Lu <hjl.tools@gmail.com> wrote: > On Thu, Feb 20, 2014 at 7:19 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: >> Hi, >> >> As suggested in https://sourceware.org/ml/binutils/2014-02/msg00114.html >> I've split my patch in 3 parts. >> In this part i've changed CPUID of vptestnmq, vptestnmd instructions >> from AVX512CD to AVX512F, to reflect latest spec >> http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf >> Testing passes. Ok for trunk? > > I checked it in for you with > > git am --whitespace=fix > /tmp/0001-Change-cpu-for-vptestnmd-and-vptestnmq-instructions.patch > Applying: Change cpu for vptestnmd and vptestnmq instructions. > /export/gnu/import/git/sources/binutils-gdb/.git/rebase-apply/patch:463: > new blank line at EOF. > + > /export/gnu/import/git/sources/binutils-gdb/.git/rebase-apply/patch:884: > new blank line at EOF. > + > warning: 2 lines add whitespace errors. > > Please double check it next time. I backported it to binutils-2_24-branch. -- H.J. ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2014-03-20 17:30 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2014-02-20 15:20 [PATCH, i386][1/3] Update to match latest AVX512 spec Ilya Tocar 2014-02-20 15:59 ` H.J. Lu 2014-02-21 13:31 ` [PATCH, i386][2/3] " Ilya Tocar 2014-02-21 16:07 ` H.J. Lu 2014-03-20 17:29 ` H.J. Lu 2014-02-24 13:22 ` [PATCH, i386][3/3] " Ilya Tocar 2014-02-24 16:30 ` H.J. Lu 2014-02-25 9:41 ` Ilya Tocar 2014-02-25 15:54 ` H.J. Lu 2014-02-25 16:03 ` H.J. Lu 2014-02-25 16:25 ` Ilya Tocar 2014-02-25 16:53 ` H.J. Lu 2014-03-20 17:30 ` H.J. Lu 2014-03-20 17:27 ` [PATCH, i386][1/3] " H.J. Lu
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