From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by sourceware.org (Postfix) with ESMTPS id 9DFDF3856DDF for ; Thu, 14 Apr 2022 15:24:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9DFDF3856DDF Received: by mail-pl1-x62e.google.com with SMTP id 12so4889257pll.12 for ; Thu, 14 Apr 2022 08:24:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=z8/mA+d76Fyug8Z9l+7z8ygEuqlbX2oC6+cCY9f/c4E=; b=DxXK89ozHnK6d/M4SX6UNvC/Fjm/U3R4yxHwGZZMnLGO1q8XmrqRjIzp/ecQ5mP0Ht gGhBUTyFH3z4rSx7ALYJzdLHQ/4x51GndwQBREjS1ktepzr+qosv9T7oBimpyMJocZ6P NiNXKR9LdWBei7Rmmx5cPiT5rvBh5J189BCX/Tak5iB7DoN1CjYs/pwm0v16aKTXcvnJ BzWL9WUVrhzluRI7ShWawajDYhpE0cHbxJyWP9r5TZCknfynABf2jyDV/VtMgkmcH0cl CzaWn5T7XxVvlHnbHYdMK7LNX3jXMNW7+R+FxCaFEizhFofQDwpq2eCaTx/VLT3XjRZZ 19Hg== X-Gm-Message-State: AOAM5315vjXexmUNd0Y62H7hIKCMNYsN1QAFFJKiZuzs/J3fO2DP7Qsr GDAXDGEm7VxB1qzVx0vMaAN6FMbCaIBVlvBq6zY6y+5+ X-Google-Smtp-Source: ABdhPJwsEDv04lCmKqxJNMwQbMt4lQOT2PMDkhkaV19HSfNcGb+ZEPSmwSURD8OaRmhoMruftQNiJKWfkd1fPf0idUQ= X-Received: by 2002:a17:902:e544:b0:158:a26a:d7c1 with SMTP id n4-20020a170902e54400b00158a26ad7c1mr7674371plf.4.1649949871637; Thu, 14 Apr 2022 08:24:31 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "H.J. Lu" Date: Thu, 14 Apr 2022 08:23:55 -0700 Message-ID: Subject: Re: [PATCH] x86: don't mistake ordinary immediates for SAE / rounding control To: Jan Beulich Cc: Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3020.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Apr 2022 15:24:34 -0000 On Thu, Apr 14, 2022 at 7:12 AM Jan Beulich wrote: > > The way SAE templates are constructed was always puzzling me (including > the need for separate templates in the first place), and expressing the > extzra attribute via Imm8 actually has a bad effect: Ordinary immediates > would also be accepted, leading to an extra byte being added after the > instruction (i.e. generating bad code). Before re-working this (in > particular to accept proper Intel syntax there), fix the immediate issue > by adding the so far missing check. > > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -6285,6 +6285,11 @@ check_VecOperands (const insn_template * > return 1; > } > } > + else if (t->opcode_modifier.sae) > + { > + i.error = unsupported_syntax; > + return 1; > + } > > /* Check the special Imm4 cases; must be the first operand. */ > if (t->cpu_flags.bitfield.cpuxop && t->operands == 5) > --- a/gas/testsuite/gas/i386/inval-avx512f.l > +++ b/gas/testsuite/gas/i386/inval-avx512f.l > @@ -218,6 +218,8 @@ > .*:313: Error: .*unsupported broadcast for `vcvtneps2bf16' > .*:316: Error: .*unsupported broadcast for `vcvtneps2bf16' > .*:319: Error: .*unsupported broadcast for `vcvtneps2bf16' > +.*:321: Error: .*vaddps.* > +.*:322: Error: .*vcmpss.* > GAS LISTING .* > > > @@ -569,6 +571,7 @@ GAS LISTING .* > [ ]*318 \?\?\?\? 62F27E38[ ]+vcvtneps2bf16 \(%eax\)\{1to8\}, %xmm1 > [ ]*318[ ]+7208 > [ ]*319[ ]+vcvtneps2bf16 \(%eax\)\{1to16\}, %xmm1 > -[ ]*320[ ]+\?\?\?\? 8DB42600 \.p2align 4 > -[ ]*320[ ]+0000008D > -[ ]*320[ ]+7600 > +[ ]*320[ ]* > +[ ]*321[ ]+vaddps \$0xcc, %zmm0, %zmm0, %zmm0 > +[ ]*322[ ]+vcmpss \$0, \$0xcc, %xmm0, %xmm0, %k0 > +#pass > --- a/gas/testsuite/gas/i386/inval-avx512f.s > +++ b/gas/testsuite/gas/i386/inval-avx512f.s > @@ -317,4 +317,8 @@ _start: > vcvtneps2bf16 (%eax){1to4}, %xmm1 > vcvtneps2bf16 (%eax){1to8}, %xmm1 > vcvtneps2bf16 (%eax){1to16}, %xmm1 > + > + vaddps $0xcc, %zmm0, %zmm0, %zmm0 > + vcmpss $0, $0xcc, %xmm0, %xmm0, %k0 > + > .p2align 4 > OK. Thanks. -- H.J.