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Lu" Date: Thu, 11 Jan 2024 05:27:14 -0800 Message-ID: Subject: Re: [PATCH] opcodes: i386: fix dw2_regnum data type in reg_entry To: Jan Beulich Cc: "Kong, Lingling" , "binutils@sourceware.org" , Indu Bhagat , "Cui, Lili" , "Hu, Lin1" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3014.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Jan 11, 2024 at 12:05=E2=80=AFAM Jan Beulich wr= ote: > > On 11.01.2024 08:59, Kong, Lingling wrote: > > > > > >> -----Original Message----- > >> From: Jan Beulich > >> Sent: Thursday, January 11, 2024 3:43 PM > >> To: Kong, Lingling > >> Cc: binutils@sourceware.org; Indu Bhagat ; Cui= , Lili > >> ; H.J. Lu ; Hu, Lin1 > >> > >> Subject: Re: [PATCH] opcodes: i386: fix dw2_regnum data type in reg_en= try > >> > >> On 11.01.2024 02:35, Kong, Lingling wrote: > >>> > >>> > >>>> -----Original Message----- > >>>> From: Jan Beulich > >>>> Sent: Tuesday, January 9, 2024 4:25 PM > >>>> To: Indu Bhagat ; Cui, Lili > >>>> ; H.J. Lu ; Kong, Lingling > >>>> ; Hu, Lin1 > >>>> Cc: binutils@sourceware.org > >>>> Subject: Re: [PATCH] opcodes: i386: fix dw2_regnum data type in > >>>> reg_entry > >>>> > >>>> On 09.01.2024 02:12, Indu Bhagat wrote: > >>>>> The DWARF register numbers for the APX EGRPs start with 130. The > >>>>> data type holding the same currently is signed char. > >>>>> > >>>>> ChangeLog: > >>>>> * opcodes/i386-opc.h (reg_entry): Bump to signed short. > >>>> > >>>> So yes, something needs doing. But there are further questions to be > >>>> raised to the original authors: Was the code tested at all in this > >>>> regard? Why do numbers start at 130, when according to i386-reg.tbl > >>>> 128 and 129 are unused (and would hence be more natural to [also] us= e)? > >>> > >>> This is because for some historical reasons, some numbers(126-129) ha= ve been > >> agreed to be reserved. > >>> Details can be found in https://groups.google.com/g/x86-64- > >> abi/c/GS8LZf5nQFk. > >> > >> I'm sorry, there are no details there. There's merely mention of these= four being > >> reserved, without supplying any reason (historical or not). > > > > Sorry, you could see https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/= 6207f9a2c0645f20a7ec591a09e4c382b1675784 > > There are reserved for Intel MPX (Memory Protection Extensions) provid= es 4 128-bit wide bound registers (reg{bnd0} - reg{bnd3}). > > Then why aren't these marked that way? The commit introducing them to > opcodes used Dw2Inval, and it was never changed from that (i.e. there > wasn't even deliberate undoing with respective justification). > Leave them as reserved. We have plenty. --=20 H.J.