On Wed, Feb 12, 2020 at 9:18 AM H.J. Lu wrote: > > On Wed, Feb 12, 2020 at 9:08 AM Jan Beulich wrote: > > > > Since ".arch sse4a" enables SSE3 and earlier, disabling SSE3 should also > > disable SSE4a. And as per its name, ".arch .nosse4" should also do so. > > > > gas/ > > 2020-02-XX Jan Beulich > > > > * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in > > "nosse4" entry. > > > > opcodes/ > > 2020-02-XX Jan Beulich > > > > * i386-gen.c (cpu_flag_init): Move CpuSSE4a from > > CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add > > CPU_ANY_SSE4_FLAGS entry. > > * i386-init.h: Re-generate. > > > > OK. > > Thanks. commit 7deea9aad8 changed nosse4 to include CpuSSE4a. But AMD SSE4a is a superset of SSE3 and Intel SSE4 is a superset of SSSE3. Disable Intel SSE4 shouldn't disable AMD SSE4a. This patch restores nosse4. It also adds .sse4a and nosse4a. -- H.J.