From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <binutils-return-87796-listarch-binutils=sources.redhat.com@sourceware.org>
Received: (qmail 7323 invoked by alias); 18 May 2015 12:18:26 -0000
Mailing-List: contact binutils-help@sourceware.org; run by ezmlm
Precedence: bulk
List-Id: <binutils.sourceware.org>
List-Subscribe: <mailto:binutils-subscribe@sourceware.org>
List-Archive: <http://sourceware.org/ml/binutils/>
List-Post: <mailto:binutils@sourceware.org>
List-Help: <mailto:binutils-help@sourceware.org>, <http://sourceware.org/ml/#faqs>
Sender: binutils-owner@sourceware.org
Received: (qmail 7312 invoked by uid 89); 18 May 2015 12:18:25 -0000
Authentication-Results: sourceware.org; auth=none
X-Virus-Found: No
X-Spam-SWARE-Status: No, score=-0.7 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2
X-HELO: mail-ob0-f169.google.com
Received: from mail-ob0-f169.google.com (HELO mail-ob0-f169.google.com) (209.85.214.169) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Mon, 18 May 2015 12:18:24 +0000
Received: by obcus9 with SMTP id us9so120763661obc.2        for <binutils@sourceware.org>; Mon, 18 May 2015 05:18:22 -0700 (PDT)
MIME-Version: 1.0
X-Received: by 10.182.56.196 with SMTP id c4mr19807801obq.26.1431951501418; Mon, 18 May 2015 05:18:21 -0700 (PDT)
Received: by 10.76.160.68 with HTTP; Mon, 18 May 2015 05:18:21 -0700 (PDT)
In-Reply-To: <5559EDB9020000780007B0A3@mail.emea.novell.com>
References: <20150511212331.GA1838@intel.com>	<55520C440200007800079718@mail.emea.novell.com>	<CAMe9rOpOx=SSUZnCFimn4fBzFqNRDch8QYLn3Os_y7EfQH65Qw@mail.gmail.com>	<5552318402000078000798A8@mail.emea.novell.com>	<CAMe9rOoqcr7aE8dr6E44KUK6JLrNMNcDNFFWhcb6K+14M=Y+=w@mail.gmail.com>	<555233B602000078000798EF@mail.emea.novell.com>	<CAMe9rOrOS+K0R+r1jHCNwAkgrhjftHUOGt_wTuP8wRYcPdifmQ@mail.gmail.com>	<555235930200007800079911@mail.emea.novell.com>	<alpine.LSU.2.20.1505121736050.4883@wotan.suse.de>	<CAMe9rOo76QirYvEH=tX7BDBws3z=g0O8c+A1wSp+19yaNXUk1w@mail.gmail.com>	<alpine.LSU.2.20.1505121745550.27315@wotan.suse.de>	<CAMe9rOqM+cojMqoz9Kwb_KedgZG-14_xFaV2mk=hNEQGUkDWVw@mail.gmail.com>	<alpine.LSU.2.20.1505121803030.27315@wotan.suse.de>	<CAMe9rOqECoP=-Bz4neR1LnFsnPO94axMuSpEiOzjmJzbNgA_kA@mail.gmail.com>	<alpine.LSU.2.20.1505131430230.27315@wotan.suse.de>	<CAMe9rOrjt5e8qqOqqCOsuDfhtVSb2atwiqoF5HN_3aSBzsOgyQ@mail.gmail.com>	<alpine.LFD.2.11.1505131738000.1538@eddie.linux-mips.org>	<CAMe9rOo-K21Gs9prT6Tb4nX80VRi2bA26mGonnr7=vt8W1NFKA@mail.gmail.com>	<5555B0C2020000780007A5FB@mail.emea.novell.com>	<CAMe9rOpq4TVpb_jVZU-sVpOkupm-gJQjYg8QnFTNkjYRYpBZdQ@mail.gmail.com>	<5559AB3F020000780007AE54@mail.emea.novell.com>	<CAMe9rOoWCn0xMZ5+n1MKDGdpXjqk9G0XUh1fp-HBaRE2Vn7kkg@mail.gmail.com>	<5559EDB9020000780007B0A3@mail.emea.novell.com>
Date: Mon, 18 May 2015 12:18:00 -0000
Message-ID: <CAMe9rOrgO4=CHm2RY6vmnc_1xxE-NKpk8BU3GLCdx2AynNtMRQ@mail.gmail.com>
Subject: Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>, Binutils <binutils@sourceware.org>, 	Michael Matz <matz@suse.de>
Content-Type: text/plain; charset=UTF-8
X-IsSubscribed: yes
X-SW-Source: 2015-05/txt/msg00154.txt.bz2

On Mon, May 18, 2015 at 4:48 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>> perhaps also that CpuAMD64 and CpuIntel64 would imply Cpu64 (as
>>> their names already suggest).
>>
>> They are just a bit.  Make them to implement Cpu64 means adding more
>> codes to x86 assembler without any benefit.  If you can share with me
>> what you have in mind, I will see what I can do.
>
> Ah, no, I didn't mean the assembler to do more work. Instead I
> thought that the generator utility could set Cpu64 alongside either
> of the new ones, thus keeping the opcode table slightly better
> readable.

Sure. We will do that when we add CPU_AMD64_FLAGS, like:

  { "CPU_AMD64_FLAGS",
    "CpuAMD64|Cpu64" },

I haven't found a need for it yet.

-- 
H.J.