From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by sourceware.org (Postfix) with ESMTPS id 755DA385736D for ; Thu, 14 Apr 2022 15:23:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 755DA385736D Received: by mail-pf1-x42e.google.com with SMTP id f3so5163165pfe.2 for ; Thu, 14 Apr 2022 08:23:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=o8Y74RdQuZeccLp085/uV0gUpc+uwxYA2pBO2RVHZ/U=; b=ryxA+W4KH4zmBuh4DJy6EOP+36vfkwUNTiiMbM2JX1yFlbLsAK8ahGJRGRHGRTWlvx XCylXTyAgiwmspuDkOBQHizM7dED9Q+5ZdBLlJEO1N/awq+kkmL9W2cBf43Jj4b+IR+C 1YGF0vFNLfVt29pWyMGssvWqa3fhXinaci1FMAKnEI/rK/d93kwZcF96fn4+jxG51wTb rhHkhEVZi3YfOLdAGGz81zwKYpfLX9w/MoEFdplFO19KJXOpM84LvuTxwrGzXSWMXJ/n xyspAn7l7BbZimR7xnY9HGhk9kfFge9JF7x12kN8JunR68HUlHlWhewiLNKMleikYBad KueA== X-Gm-Message-State: AOAM533DDtpisobD0mW4l4exaoKU2PYA1brAp8R10EAJgDuqYZK7wyAn jBxP46qyLWqO9EMVuosAprxqgsoKDmCaiUbTyqU= X-Google-Smtp-Source: ABdhPJzOHlw4UjOug1Iv4ou30/XSMIpyj4bhyNC/kCn50cubK+ICUwJOvzwn+TyU0UXeKZBGnqwHFrBVMdKyBVSXnQc= X-Received: by 2002:aa7:8888:0:b0:505:a3e1:d246 with SMTP id z8-20020aa78888000000b00505a3e1d246mr4454717pfe.76.1649949784221; Thu, 14 Apr 2022 08:23:04 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "H.J. Lu" Date: Thu, 14 Apr 2022 08:22:28 -0700 Message-ID: Subject: Re: [PATCH] x86: VCMPSH is Evex.LLIG To: Jan Beulich , Lili Cui Cc: Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3018.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, LOTS_OF_MONEY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Apr 2022 15:23:07 -0000 On Thu, Apr 14, 2022 at 7:12 AM Jan Beulich wrote: > > These were mistakenly flagged as Evex.128. Getting the LLIG status right > for insns allowing for SAE is a prereq for planned further work. > > --- a/gas/testsuite/gas/i386/evex-lig.s > +++ b/gas/testsuite/gas/i386/evex-lig.s > @@ -1703,6 +1703,13 @@ _start: > vrndscaless $123, -512(%edx), %xmm5, %xmm6{%k7} # AVX512 Disp8 > vrndscaless $123, -516(%edx), %xmm5, %xmm6{%k7} # AVX512 > > + vcmpsh $123, %xmm4, %xmm5, %k5 # AVX512-FP16 > + vcmpsh $123, {sae}, %xmm4, %xmm5, %k5{%k7} # AVX512-FP16 > + vcmpsh $123, (%ecx), %xmm5, %k5 # AVX512-FP16 > + vcmpsh $123, -123456(%esp, %esi, 8), %xmm5, %k5{%k7} # AVX512-FP16 > + vcmpsh $123, 254(%ecx), %xmm5, %k5 # AVX512-FP16 Disp8 > + vcmpsh $123, -256(%edx), %xmm5, %k5{%k7} # AVX512-FP16 Disp8 > + > .intel_syntax noprefix > vaddsd xmm6{k7}, xmm5, xmm4 # AVX512 > vaddsd xmm6{k7}{z}, xmm5, xmm4 # AVX512 > @@ -3403,3 +3410,9 @@ _start: > vrndscaless xmm6{k7}, xmm5, DWORD PTR [edx-512], 123 # AVX512 Disp8 > vrndscaless xmm6{k7}, xmm5, DWORD PTR [edx-516], 123 # AVX512 > > + vcmpsh k5, xmm5, xmm4, 123 # AVX512-FP16 > + vcmpsh k5{k7}, xmm5, xmm4, {sae}, 123 # AVX512-FP16 > + vcmpsh k5, xmm5, WORD PTR [ecx], 123 # AVX512-FP16 > + vcmpsh k5{k7}, xmm5, WORD PTR [esp+esi*8-123456], 123 # AVX512-FP16 > + vcmpsh k5, xmm5, WORD PTR [ecx+254], 123 # AVX512-FP16 Disp8 > + vcmpsh k5{k7}, xmm5, WORD PTR [edx-256], 123 # AVX512-FP16 Disp8 > --- a/gas/testsuite/gas/i386/evex-lig256-intel.d > +++ b/gas/testsuite/gas/i386/evex-lig256-intel.d > @@ -1536,6 +1536,12 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 00 02 00 00 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 2f 0a 72 80 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 fc fd ff ff 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 ec 7b vcmpsh k5,xmm5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh k5\{k7\},xmm5,xmm4,\{sae\},0x7b > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 29 7b vcmpsh k5,xmm5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > [ ]*[a-f0-9]+: 62 f1 d7 2f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 af 58 f4 vaddsd xmm6\{k7\}\{z\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\} > @@ -3063,4 +3069,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 00 02 00 00 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 2f 0a 72 80 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 fc fd ff ff 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 ec 7b vcmpsh k5,xmm5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh k5\{k7\},xmm5,xmm4,\{sae\},0x7b > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 29 7b vcmpsh k5,xmm5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > #pass > --- a/gas/testsuite/gas/i386/evex-lig256.d > +++ b/gas/testsuite/gas/i386/evex-lig256.d > @@ -1536,6 +1536,12 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 00 02 00 00 7b vrndscaless \$0x7b,0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 2f 0a 72 80 7b vrndscaless \$0x7b,-0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 fc fd ff ff 7b vrndscaless \$0x7b,-0x204\(%edx\),%xmm5,%xmm6\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 ec 7b vcmpsh \$0x7b,%xmm4,%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh \$0x7b,\{sae\},%xmm4,%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 29 7b vcmpsh \$0x7b,\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 2f 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 af 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\} > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\} > @@ -3063,4 +3069,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 00 02 00 00 7b vrndscaless \$0x7b,0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 2f 0a 72 80 7b vrndscaless \$0x7b,-0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 2f 0a b2 fc fd ff ff 7b vrndscaless \$0x7b,-0x204\(%edx\),%xmm5,%xmm6\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 ec 7b vcmpsh \$0x7b,%xmm4,%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh \$0x7b,\{sae\},%xmm4,%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 29 7b vcmpsh \$0x7b,\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 28 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 2f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > #pass > --- a/gas/testsuite/gas/i386/evex-lig512-intel.d > +++ b/gas/testsuite/gas/i386/evex-lig512-intel.d > @@ -1536,6 +1536,12 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 00 02 00 00 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 4f 0a 72 80 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 fc fd ff ff 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 ec 7b vcmpsh k5,xmm5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh k5\{k7\},xmm5,xmm4,\{sae\},0x7b > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 29 7b vcmpsh k5,xmm5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > [ ]*[a-f0-9]+: 62 f1 d7 4f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 cf 58 f4 vaddsd xmm6\{k7\}\{z\},xmm5,xmm4 > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\} > @@ -3063,4 +3069,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 00 02 00 00 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx\+0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 4f 0a 72 80 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x200\],0x7b > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 fc fd ff ff 7b vrndscaless xmm6\{k7\},xmm5,DWORD PTR \[edx-0x204\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 ec 7b vcmpsh k5,xmm5,xmm4,0x7b > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh k5\{k7\},xmm5,xmm4,\{sae\},0x7b > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 29 7b vcmpsh k5,xmm5,WORD PTR \[ecx\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b > #pass > --- a/gas/testsuite/gas/i386/evex-lig512.d > +++ b/gas/testsuite/gas/i386/evex-lig512.d > @@ -1536,6 +1536,12 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 00 02 00 00 7b vrndscaless \$0x7b,0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 4f 0a 72 80 7b vrndscaless \$0x7b,-0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 fc fd ff ff 7b vrndscaless \$0x7b,-0x204\(%edx\),%xmm5,%xmm6\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 ec 7b vcmpsh \$0x7b,%xmm4,%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh \$0x7b,\{sae\},%xmm4,%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 29 7b vcmpsh \$0x7b,\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 4f 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f1 d7 cf 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\} > [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\} > @@ -3063,4 +3069,10 @@ Disassembly of section .text: > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 00 02 00 00 7b vrndscaless \$0x7b,0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 4f 0a 72 80 7b vrndscaless \$0x7b,-0x200\(%edx\),%xmm5,%xmm6\{%k7\} > [ ]*[a-f0-9]+: 62 f3 55 4f 0a b2 fc fd ff ff 7b vrndscaless \$0x7b,-0x204\(%edx\),%xmm5,%xmm6\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 ec 7b vcmpsh \$0x7b,%xmm4,%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 1f c2 ec 7b vcmpsh \$0x7b,\{sae\},%xmm4,%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 29 7b vcmpsh \$0x7b,\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 ac f4 c0 1d fe ff 7b vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\} > +[ ]*[a-f0-9]+: 62 f3 56 48 c2 69 7f 7b vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5 > +[ ]*[a-f0-9]+: 62 f3 56 4f c2 6a 80 7b vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\} > #pass > --- a/opcodes/i386-opc.tbl > +++ b/opcodes/i386-opc.tbl > @@ -3739,10 +3739,10 @@ vcmpph, 0xc2, 0x > vcmpph, 0xc2, None, CpuAVX512_FP16, Modrm|Masking=2|Space0F3A|VexVVVV|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegMask } > vcmpph, 0xc2, None, CpuAVX512_FP16, Modrm|EVex512|Masking=2|Space0F3A|VexVVVV=1|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM, RegZMM, RegMask } > > -vcmpsh, 0xf3c2, 0x, CpuAVX512_FP16, Modrm|EVex128|Masking=2|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask } > -vcmpsh, 0xf3c2, 0x, CpuAVX512_FP16, Modrm|EVex128|Masking=2|Space0F3A|VexVVVV|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SAE, { Imm8, RegXMM, RegXMM, RegMask } > -vcmpsh, 0xf3c2, None, CpuAVX512_FP16, Modrm|EVex128|Masking=2|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask } > -vcmpsh, 0xf3c2, None, CpuAVX512_FP16, Modrm|EVex128|Masking=2|Space0F3A|VexVVVV|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegXMM, RegXMM, RegMask } > +vcmpsh, 0xf3c2, 0x, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask } > +vcmpsh, 0xf3c2, 0x, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexVVVV|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SAE, { Imm8, RegXMM, RegXMM, RegMask } > +vcmpsh, 0xf3c2, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegMask } > +vcmpsh, 0xf3c2, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexVVVV|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegXMM, RegXMM, RegMask } > > vcomish, 0x2f, None, CpuAVX512_FP16, Modrm|EVexLIG|EVexMap5|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM } > vcomish, 0x2f, None, CpuAVX512_FP16, Modrm|EVexLIG|EVexMap5|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegXMM, RegXMM } > Lili, does it look OK? Thanks. -- H.J.