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From: "H.J. Lu" <hjl.tools@gmail.com>
To: "Sergey G." <saguryev.gnu@gmail.com>
Cc: binutils@sourceware.org, Kirill Yukhin <kirill.yukhin@gmail.com>,
		Jim Wilson <wilson@tuliptree.org>
Subject: Re: [PATCH] Enabling PSN support in IA64 assembler and objdump.
Date: Tue, 07 Aug 2012 16:15:00 -0000	[thread overview]
Message-ID: <CAMe9rOrr5+ZoickphwFFQ8bb-om97fiR=xO8QUL38mgEHSc7dQ@mail.gmail.com> (raw)
In-Reply-To: <CA+vRWO350vK3aSQ3pD-jRWd7u_2=AvT0JKOz-4MCqdAR6haRFg@mail.gmail.com>

On Tue, Aug 7, 2012 at 8:53 AM, Sergey G. <saguryev.gnu@gmail.com> wrote:
>    Hi all,
> This patch enables Itanium Series 9500 (Poulson) support in asm and objdump.
> Is it ok for trunk?
>
>
> bfd/ChangeLog entry:
>
> 2012-08-07  Sergey A. Guriev <sergey.a.guriev@intel.com>
>
>         * cpu-ia64-opc.c (ins_cnt6a): New function.
>         (ext_cnt6a): Ditto.
>         (ins_strd5b): Ditto.
>         (ext_strd5b): Ditto.
>         (elf64_ia64_operands): Add new operand types.
>
>
> gas/ChangeLog entry:
>
> 2012-08-07  Sergey A. Guriev  <sergey.a.guriev@intel.com>
>
>         * config/tc-ia64.c (reg_symbol): Add a new register.
>         (indirect_reg): Ditto.
>         (pseudo_func): Add new symbolic constants.
>         (operand_match): Add new operand types recognition.
>         (operand_insn): Add new register recognition.
>         (md_begin): Add new register definition.
>         (specify_resource): Add new register recognition.
>
>
> gas/testsuite/ChangeLog entry:
>
> 2012-08-07  Sergey A. Guriev  <sergey.a.guriev@intel.com>
>
>         * gas/testsuite/gas/ia64/psn.d: New file.
>         * gas/testsuite/gas/ia64/psn.s: New file.
>         * gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
>         * gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
>         * gas/testsuite/gas/ia64/opc-m.d: Ditto.
>
>
> include/opcode/ChangeLog entry:
>
> 2012-08-07  Sergey A. Guriev <sergey.a.guriev@intel.com>
>
>         * ia64.h (ia64_opnd): Add new operand types.
>
> opcodes/ChangeLog entry:
>
> 2012-08-07  Sergey A. Guriev <sergey.a.guriev@intel.com>
>
>         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
>         * ia64-gen.c: Promote completer index type to longlong.
>         (irf_operand): Add new register recognition.
>         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
>         (lookup_specifier): Add new resource recognition.
>         (insert_bit_table_ent): Relax abort condition according to the
>         changed completer index type.
>         (print_dis_table): Fix printf format for completer index.
>         * ia64-ic.tbl: Add a new instruction class.
>         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
>         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
>         * ia64-opc.h: Define short names for new operand types.
>         * ia64-raw.tbl: Add new RAW resource for DAHR register.
>         * ia64-waw.tbl: Add new WAW resource for DAHR register.
>         * ia64-asmtab.c: Regenerate.
>
>
> Thank you.
>   -- Sergey

Please remove ChangeLog diffs from the patch.  They should be
included as plain text like above.  Otherwise, the patch may not
apply.


-- 
H.J.

  reply	other threads:[~2012-08-07 15:57 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CA+vRWO0O2tTvfyqhaXHrAyBDqaQkRWs=6sy9Y-yL2MHdYbWk6Q@mail.gmail.com>
     [not found] ` <CA+vRWO2F3_f82EcbuaZSMOOmjnC8eR40E3nRR3y1FTg7aogbaA@mail.gmail.com>
     [not found]   ` <CA+vRWO28+VEUSB7ZNWupx-uZNrt2j15VSFyM3AibUTFjNiJ_6Q@mail.gmail.com>
2012-08-07 15:53     ` H.J. Lu
2012-08-07 15:57     ` Sergey G.
2012-08-07 16:15       ` H.J. Lu [this message]
2012-08-07 17:13       ` Sergey Guryev
2012-08-25 18:10         ` Sergey G.
2012-09-04 12:34           ` nick clifton

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