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From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Thu, 11 Aug 2022 09:38:20 -0700
Message-ID: <CAMe9rOrug0Hcar_ynfO1F5-yPWK+qF9Ap8+1JhW9MiUZjQb7yw@mail.gmail.com>
Subject: Re: [PATCH 07/12] x86: template-ize packed/scalar vector floating
 point insns
To: Jan Beulich <jbeulich@suse.com>
Cc: "Jiang, Haochen" <haochen.jiang@intel.com>,
 Binutils <binutils@sourceware.org>, "Cui, Lili" <lili.cui@intel.com>
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On Wed, Aug 10, 2022 at 11:03 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 11.08.2022 03:12, Jiang, Haochen wrote:
> >> -----Original Message-----
> >> From: H.J. Lu <hjl.tools@gmail.com>
> >> Sent: Saturday, August 6, 2022 7:07 AM
> >>
> >> Lili, Hongchen, do you have any comments?  Will this make future changes
> >> difficult?
> >>
> >
> > I suppose it won't make future changes difficult if its purpose is to combine sdh and
> > Disp8 Shift.
>
> The combining with Disp8 shift is a result (or side effect), not the
> purpose. The purpose is reduction of redundancy, and as such I
> actually cannot see how this could get in the way of future changes.
> Ideally future changes would leverage the templates where feasible,
> but if there are reasons not to then "traditional" insn templates are
> still going to work as before.
>
> Jan

Patch is OK.

Thanks.

-- 
H.J.