From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 100209 invoked by alias); 13 Feb 2020 15:48:24 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 100100 invoked by uid 89); 13 Feb 2020 15:48:07 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=H*f:sk:36c62c0, H*i:sk:36c62c0 X-HELO: mail-ot1-f67.google.com Received: from mail-ot1-f67.google.com (HELO mail-ot1-f67.google.com) (209.85.210.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 13 Feb 2020 15:48:06 +0000 Received: by mail-ot1-f67.google.com with SMTP id i6so5985563otr.7 for ; Thu, 13 Feb 2020 07:48:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=5VoBVAc/kG89vif5l5XNKYMBP/EkGP/c8PB5rXyZyMY=; b=AfzBDd/uIWpwFPtbMliqyjygDSaZzvNNLrq6D6hpikz1FM9+l6M0DigEn/VIQBazop 94SDDz5ube3nwzFnPqMGbk4z3xeSYvYAN2EYlibCA/TA6KkxI6L32ruznzHen45SdjJh GKRdarRi0NNIRJdnhoLGB/k+ediw+gqvFOhJhPW1dLaDobkQlvPq52LcGlaqt7cm1TqC vqJ9m9/tJcJ1ctcki/gyaLM/d865wsj0BrsJpMYaD7qc0N9Ga93Ev+li2c34TiRjLh4C DVg/yUbfM34c3o6RzgWmDCA9/bqE/ktLhn/dQXbnbzPjGQvq7y++Exj8uZ/Xin16t6Ax 4Cyw== MIME-Version: 1.0 References: <820808ed-1126-1fca-e71f-9a8bd8d63f36@suse.com> <42b9b728-c12e-b9e0-586e-56c240b03618@suse.com> <36c62c07-b00f-70b4-3faf-833818f42068@suse.com> In-Reply-To: <36c62c07-b00f-70b4-3faf-833818f42068@suse.com> From: "H.J. Lu" Date: Thu, 13 Feb 2020 15:48:00 -0000 Message-ID: Subject: Re: [PATCH v6 3/5] x86: correct VFPCLASSP{S,D} operand size handling To: Jan Beulich Cc: "binutils@sourceware.org" Content-Type: text/plain; charset="UTF-8" X-IsSubscribed: yes X-SW-Source: 2020-02/txt/msg00278.txt.bz2 On Thu, Feb 13, 2020 at 6:47 AM Jan Beulich wrote: > > On 12.02.2020 13:31, H.J. Lu wrote: > > On Wed, Feb 12, 2020 at 2:05 AM Jan Beulich wrote: > >> > >> With AVX512VL disabled (e.g. when writing code for the Knights family > >> of processors) these insns aren't ambiguous when used with a memory > >> source, and hence should be accepted without suffix or operand size > >> specifier. When AVX512VL is enabled, to be consistent with this as > >> well as other ambiguous operand size handling it would seem better to > >> just warn about the ambiguity in AT&T mode, and still default to 512-bit > >> operands (on the assumption that the code may have been written without > >> AVX512VL in mind yet), but it was requested to leave AT&T syntax mode > >> alone here. > >> > >> gas/ > >> 2020-02-XX Jan Beulich > >> > >> * config/tc-i386.c (avx512): New (at file scope), moved from > >> (check_VecOperands): ... here. > >> (process_suffix): Add [XYZ]MMword operand size handling. > >> * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests. > >> * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS > >> tests. > >> * testsuite/gas/i386/avx512dq-inval.l, > >> testsuite/gas/i386/noavx512-2.l: Adjust expectations. > >> > >> opcodes/ > >> 2020-02-XX Jan Beulich > >> > >> * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form > >> with Unspecified, making the present one AT&T syntax only. > >> * i386-tbl.h: Re-generate. > > > > OK. > > Btw, am I right in understanding that when I was to extend this to > VCVTPD2PS and alike, you again want me to limit this to Intel syntax > mode, requiring the X/Y suffix forms to be used instead in AT&T mode? > Yes. please only do it for Intel syntax. -- H.J.