From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x32e.google.com (mail-ot1-x32e.google.com [IPv6:2607:f8b0:4864:20::32e]) by sourceware.org (Postfix) with ESMTPS id AB8393858298 for ; Wed, 23 Nov 2022 02:53:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org AB8393858298 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-ot1-x32e.google.com with SMTP id l42-20020a9d1b2d000000b0066c6366fbc3so10490548otl.3 for ; Tue, 22 Nov 2022 18:53:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=xkVfslABWksn2wkTBC9NpnzWiiGCFkWANEXDd2HqPIA=; b=z3eARLj3EDTBo+rGF28wzTHnftZC1Th+mPyR3ZgcRmRvpHwFTW5LLOmKqd0migY3iU R52pawULvVR3ulVr3qcea85xga9PefOTPvKXfiudVC0fTaNgZd9KXEUrZr0flwJ8U8vQ iWvEv9t07rT6memO4LNuqgz2r0JzSE7/dVu3alFB+4tl+FDqYOIXq1E1oS5czzmABS8v UYOjGtXZKoc+Ch85lALTY613rqmjpVgb4eOB49XD+vbZU2yuD+6S5R19MDdwPWX9SQMP JFZMycgME3z+Nuvymm3OCx2Uu6SJLMWPyGoMNlwbK2id0mXPkRw4O0YA6CU/8kXWNNl6 UbXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xkVfslABWksn2wkTBC9NpnzWiiGCFkWANEXDd2HqPIA=; b=DD6ghVB+1PFmSlrr0v/hkv8pBAy9EgU2lMImlDBncUKrQNv6xw5Gm1qDyh40/FCgaT WsfC8scExfn/9iLt1bhRJZfQ6RMZ2FzMXxIFShYpkOy1EKaY8ns0EsSvuwsn2bdsdVug cxv+Y5OEhmiTmwg7fwRa/8U/5mYIxiMTl8HRfxzqGcNbVzaNHMQxjLwJQHV884e2Wu/C r2hwTnpv2eXr8Sk8jQId2lW0K1/lcvBSwnD9W3eBBQCanS3Zbkq3IOQa2nLx+gThxkCv fHv5QEs9gezzF6oJzDmRjt/GehnfWwsayJK0JNfuRfBmtk05O+JhUni38pwy94HPzBSk OeWw== X-Gm-Message-State: ANoB5pkKEP5VQif0e/scGQa8vEGEf6KegeloSy0DC6Y2vyYmMe3bbL3U Ab4yroft703tk/EuZGAKndDo1QhS3DM11D0LxmEnCg== X-Google-Smtp-Source: AA0mqf4hwc1t4BpA6Ls89+mqInDoqx/dHs9TyayrrFLFUfHmCSLNvxNFThgaPvqyhiLHkF587vNNuvQ0xC0uqfCb/fI= X-Received: by 2002:a05:6830:b93:b0:66c:7132:1bb1 with SMTP id a19-20020a0568300b9300b0066c71321bb1mr3576752otv.320.1669171982944; Tue, 22 Nov 2022 18:53:02 -0800 (PST) MIME-Version: 1.0 References: <20221121120037.19325-1-zengxiao@eswincomputing.com> In-Reply-To: <20221121120037.19325-1-zengxiao@eswincomputing.com> From: Nelson Chu Date: Wed, 23 Nov 2022 10:52:52 +0800 Message-ID: Subject: Re: [PATCH v2] RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard To: zengxiao@eswincomputing.com Cc: binutils@sourceware.org, shihua@iscas.ac.cn, palmer@dabbelt.com, kito.cheng@gmail.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Thanks for fixing this. We also need to add the out-of-range check for R_RISCV_SUB6 in the riscv_elf_add_sub_reloc, and the overflow checks for all ADD/SUB/SET relocations, but since they can be added in the later patches, so I committed this one after passing the riscv-gnu-toolchain regressions. Thanks Nelson On Mon, Nov 21, 2022 at 8:02 PM wrote: > > From: Xiao Zeng > > The R_RISCV_SUB6 only the lower 6 bits of the code are valid, which > can be found in 8.5. Relocations of: > https://github.com/riscv-non-isa/riscv-elf-psabi-doc/releases/download/v1.0-rc4/riscv-abi.pdf > > bfd/ChangeLog: > > * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 > lower 6 bits as the significant bit. > * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise. > --- > bfd/elfnn-riscv.c | 4 ++++ > bfd/elfxx-riscv.c | 4 ++++ > 2 files changed, 8 insertions(+) > > diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c > index 0570a971b5a..a02aa64786e 100644 > --- a/bfd/elfnn-riscv.c > +++ b/bfd/elfnn-riscv.c > @@ -2427,6 +2427,10 @@ riscv_elf_relocate_section (bfd *output_bfd, > break; > > case R_RISCV_SUB6: > + relocation = (old_value & ~howto->dst_mask) > + | (((old_value & howto->dst_mask) - relocation) > + & howto->dst_mask); > + break; The old_value needs to be defined, but it's easy enough to add, so I fixed it. > case R_RISCV_SUB8: > case R_RISCV_SUB16: > case R_RISCV_SUB32: > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > index afbde56b9e5..2db24acf7a5 100644 > --- a/bfd/elfxx-riscv.c > +++ b/bfd/elfxx-riscv.c > @@ -994,6 +994,10 @@ riscv_elf_add_sub_reloc (bfd *abfd, > relocation = old_value + relocation; > break; > case R_RISCV_SUB6: > + relocation = (old_value & ~howto->dst_mask) > + | (((old_value & howto->dst_mask) - relocation) > + & howto->dst_mask); > + break; > case R_RISCV_SUB8: > case R_RISCV_SUB16: > case R_RISCV_SUB32: > -- > 2.34.1 >