On Tue, Aug 15, 2023 at 2:28 PM Tsukasa OI wrote: > On 2023/08/15 15:25, Nelson Chu wrote: > > Btw, the OP_V seems also not to be updated in the ISA spec.... > > After the ISA Manual draft is updated to the AsciiDoc-based version, > some minor changes are reverted (including OP-V I submitted a PR): > > cf. > > ... and I submitted the pull request to add both OP-V and OP-P. > > cf. > > Once this is merged, is it okay to commit? > Yes, of course, you can commit at that time without sending a new one to the mailing list :-) Nelson > > Thanks, > Tsukasa > > > > > On Tue, Aug 15, 2023 at 2:22 PM Nelson Chu > > wrote: > > > > > > > > On Sat, Aug 12, 2023 at 9:51 AM Tsukasa OI > > > > > wrote: > > > > From: Tsukasa OI > > > > > > This commit adds "OP_P" (OP-P: packed SIMD instruction opcode > > intended for > > the 'P' extension but its use is first approved for the vector > > cryptography > > specification) to .insn opcode name list. Although vector / > > packed SIMD > > instruction encodings are not implemented in `.insn' directive, > > it will help > > future implementation of custom vector / packed SIMD `.insn'. > > > > gas/ChangeLog: > > > > * config/tc-riscv.c (opcode_name_list): Add "OP_P". > > * testsuite/gas/riscv/insn.s: Add "OP_P" vector crypto > > testcase. > > * testsuite/gas/riscv/insn.d: Likewise. > > * testsuite/gas/riscv/insn-na.d: Likewise. > > * testsuite/gas/riscv/insn-dwarf.d: Reflect insn.s > update. > > --- > > gas/config/tc-riscv.c | 2 +- > > gas/testsuite/gas/riscv/insn-dwarf.d | 43 > > ++++++++++++++-------------- > > gas/testsuite/gas/riscv/insn-na.d | 3 +- > > gas/testsuite/gas/riscv/insn.d | 3 +- > > gas/testsuite/gas/riscv/insn.s | 1 + > > 5 files changed, 28 insertions(+), 24 deletions(-) > > > > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c > > index aaf8b9be64fd..64eba22ddf29 100644 > > --- a/gas/config/tc-riscv.c > > +++ b/gas/config/tc-riscv.c > > @@ -867,7 +867,7 @@ static const struct opcode_name_t > > opcode_name_list[] = > > /*reserved 0x5b. */ > > {"JAL", 0x6f}, > > {"SYSTEM", 0x73}, > > - /*reserved 0x77. */ > > + {"OP_P", 0x77}, > > > > > > Refer to the draft isa > > spec, > https://github.com/riscv/riscv-isa-manual/blob/d145558f954f51eeef81655e9b074f87e6fbb92a/src/rv-32-64g.adoc#L23 > < > https://github.com/riscv/riscv-isa-manual/blob/d145558f954f51eeef81655e9b074f87e6fbb92a/src/rv-32-64g.adoc#L23 > > > > I still the 0x77 is reserved. Do you have any plans that try to > > update the spec first? > > > > Thanks > > Nelson > > > > > > {"CUSTOM_3", 0x7b}, > > /* >80b 0x7f. */ > > > > diff --git a/gas/testsuite/gas/riscv/insn-dwarf.d > > b/gas/testsuite/gas/riscv/insn-dwarf.d > > index b8bd42dff18c..53fb85eb4625 100644 > > --- a/gas/testsuite/gas/riscv/insn-dwarf.d > > +++ b/gas/testsuite/gas/riscv/insn-dwarf.d > > @@ -60,27 +60,28 @@ insn.s +53 +0x9a.* > > insn.s +54 +0x9e.* > > insn.s +55 +0xa2.* > > insn.s +57 +0xa6.* > > -insn.s +59 +0xaa.* > > -insn.s +60 +0xac.* > > +insn.s +58 +0xaa.* > > +insn.s +60 +0xae.* > > insn.s +61 +0xb0.* > > -insn.s +62 +0xb6.* > > -insn.s +63 +0xbe.* > > -insn.s +64 +0xc8.* > > -insn.s +65 +0xd4.* > > -insn.s +66 +0xea.* > > -insn.s +67 +0xec.* > > +insn.s +62 +0xb4.* > > +insn.s +63 +0xba.* > > +insn.s +64 +0xc2.* > > +insn.s +65 +0xcc.* > > +insn.s +66 +0xd8.* > > +insn.s +67 +0xee.* > > insn.s +68 +0xf0.* > > -insn.s +69 +0xf6.* > > -insn.s +70 +0xfe.* > > -insn.s +71 +0x108.* > > -insn.s +72 +0x114.* > > -insn.s +74 +0x12a.* > > -insn.s +75 +0x134.* > > -insn.s +76 +0x13e.* > > -insn.s +77 +0x154.* > > -insn.s +78 +0x16a.* > > -insn.s +79 +0x180.* > > -insn.s +80 +0x196.* > > -insn.s +81 +0x1ac.* > > -insn.s +- +0x1c2 > > +insn.s +69 +0xf4.* > > +insn.s +70 +0xfa.* > > +insn.s +71 +0x102.* > > +insn.s +72 +0x10c.* > > +insn.s +73 +0x118.* > > +insn.s +75 +0x12e.* > > +insn.s +76 +0x138.* > > +insn.s +77 +0x142.* > > +insn.s +78 +0x158.* > > +insn.s +79 +0x16e.* > > +insn.s +80 +0x184.* > > +insn.s +81 +0x19a.* > > +insn.s +82 +0x1b0.* > > +insn.s +- +0x1c6 > > #pass > > diff --git a/gas/testsuite/gas/riscv/insn-na.d > > b/gas/testsuite/gas/riscv/insn-na.d > > index 55bf301656b2..d43f07906fe4 100644 > > --- a/gas/testsuite/gas/riscv/insn-na.d > > +++ b/gas/testsuite/gas/riscv/insn-na.d > > @@ -1,4 +1,4 @@ > > -#as: -march=rv32ifcv > > +#as: -march=rv32ifcv_zvkned > > #source: insn.s > > #objdump: -dw -Mno-aliases > > > > @@ -59,6 +59,7 @@ Disassembly of section .text: > > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > > [^:]+:[ ]+022180d7[ ]+vadd\.vv[ ]+v1,v2,v3 > > +[^:]+:[ ]+a2402177[ ]+vaesdm\.vv[ ]+v2,v4 > > [^:]+:[ ]+0001[ ]+c\.addi[ ]+zero,0 > > [^:]+:[ ]+00000013[ ]+addi[ ]+zero,zero,0 > > [^:]+:[ ]+001f 0000 0000[ ].* > > diff --git a/gas/testsuite/gas/riscv/insn.d > > b/gas/testsuite/gas/riscv/insn.d > > index 89e076d126d0..fc3d0437c1d0 100644 > > --- a/gas/testsuite/gas/riscv/insn.d > > +++ b/gas/testsuite/gas/riscv/insn.d > > @@ -1,4 +1,4 @@ > > -#as: -march=rv32ifcv > > +#as: -march=rv32ifcv_zvkned > > #objdump: -dr > > > > .*:[ ]+file format .* > > @@ -70,6 +70,7 @@ Disassembly of section .text: > > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > > [^:]+:[ ]+00c58533[ ]+add[ ]+a0,a1,a2 > > [^:]+:[ ]+022180d7[ ]+vadd\.vv[ ]+v1,v2,v3 > > +[^:]+:[ ]+a2402177[ ]+vaesdm\.vv[ ]+v2,v4 > > [^:]+:[ ]+0001[ ]+nop > > [^:]+:[ ]+00000013[ ]+nop > > [^:]+:[ ]+001f 0000 0000[ ].* > > diff --git a/gas/testsuite/gas/riscv/insn.s > > b/gas/testsuite/gas/riscv/insn.s > > index 48db59b14e88..915b7ecc9634 100644 > > --- a/gas/testsuite/gas/riscv/insn.s > > +++ b/gas/testsuite/gas/riscv/insn.s > > @@ -55,6 +55,7 @@ target: > > .insn r 0x33, 0, 0, fa0, fa1, fa2 > > > > .insn r OP_V, 0, 1, x1, x3, x2 > > + .insn r OP_P, 2, 0x51, x2, x0, x4 > > > > .insn 0x0001 > > .insn 0x00000013 > > > > base-commit: 6a6859cbff7ac3fcf81689c47d19e716e9bbac2a > > -- > > 2.41.0 > > >