From: Nelson Chu <nelson@rivosinc.com>
To: Christoph Muellner <christoph.muellner@vrull.eu>
Cc: binutils@sourceware.org, Nathan Huckleberry <nhuck@google.com>,
nhuck@pmull.org, Jeff Law <jeffreyalaw@gmail.com>,
Andrew Waterman <andrew@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>
Subject: Re: [PATCH] RISC-V: Zvkh[a,b]: Remove individual instruction class
Date: Mon, 3 Jul 2023 18:20:41 +0800 [thread overview]
Message-ID: <CAPpQWtBUmfB7sQDr6P1GwSuNOjb92rRqSLMGOZTk=x-Ahm=jSg@mail.gmail.com> (raw)
In-Reply-To: <20230703101047.2589341-1-christoph.muellner@vrull.eu>
[-- Attachment #1: Type: text/plain, Size: 2591 bytes --]
Thanks, committed :)
Nelson
On Mon, Jul 3, 2023 at 6:10 PM Christoph Muellner <
christoph.muellner@vrull.eu> wrote:
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> Currently we have three instruction classes defined for Zvkh[a,b]:
> - INSN_CLASS_ZVKNHA
> - INSN_CLASS_ZVKNHB
> - INSN_CLASS_ZVKNHA_OR_ZVKNHB
>
> The encodings of all instructions in Zvknh[a,b] are identical.
> Therefore, we don't need the individual instruction classes
> and can remove them.
>
> This patch also adds the missing support of the combined instruction
> class in riscv_multi_subset_supports_ext().
>
> Fixes: 62edb233ef5 ("RISC-V: Add support for the Zvknh[a,b] ISA
> extensions")
> Reported-By: Nelson Chu <nelson@rivosinc.com>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
> bfd/elfxx-riscv.c | 10 ++--------
> include/opcode/riscv.h | 2 --
> 2 files changed, 2 insertions(+), 10 deletions(-)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index d6c8e046e3e..bdfc0ef01f4 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -2479,10 +2479,6 @@ riscv_multi_subset_supports (riscv_parse_subset_t
> *rps,
> return riscv_subset_supports (rps, "zvkg");
> case INSN_CLASS_ZVKNED:
> return riscv_subset_supports (rps, "zvkned");
> - case INSN_CLASS_ZVKNHA:
> - return riscv_subset_supports (rps, "zvknha");
> - case INSN_CLASS_ZVKNHB:
> - return riscv_subset_supports (rps, "zvknhb");
> case INSN_CLASS_ZVKNHA_OR_ZVKNHB:
> return (riscv_subset_supports (rps, "zvknha")
> || riscv_subset_supports (rps, "zvknhb"));
> @@ -2686,10 +2682,8 @@ riscv_multi_subset_supports_ext
> (riscv_parse_subset_t *rps,
> return _("zvkg");
> case INSN_CLASS_ZVKNED:
> return _("zvkned");
> - case INSN_CLASS_ZVKNHA:
> - return _("zvknha");
> - case INSN_CLASS_ZVKNHB:
> - return _("zvknhb");
> + case INSN_CLASS_ZVKNHA_OR_ZVKNHB:
> + return _("zvknha' or `zvknhb");
> case INSN_CLASS_ZVKSED:
> return _("zvksed");
> case INSN_CLASS_ZVKSH:
> diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
> index d859f44fc92..739d6dafae9 100644
> --- a/include/opcode/riscv.h
> +++ b/include/opcode/riscv.h
> @@ -418,8 +418,6 @@ enum riscv_insn_class
> INSN_CLASS_ZVBC,
> INSN_CLASS_ZVKG,
> INSN_CLASS_ZVKNED,
> - INSN_CLASS_ZVKNHA,
> - INSN_CLASS_ZVKNHB,
> INSN_CLASS_ZVKNHA_OR_ZVKNHB,
> INSN_CLASS_ZVKSED,
> INSN_CLASS_ZVKSH,
> --
> 2.41.0
>
>
prev parent reply other threads:[~2023-07-03 10:20 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-03 10:10 Christoph Muellner
2023-07-03 10:20 ` Nelson Chu [this message]
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