From: Nelson Chu <nelson@rivosinc.com>
To: Hau Hsu <hau.hsu@sifive.com>
Cc: Binutils <binutils@sourceware.org>, Kito Cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH 2/2] riscv: Fix R_RISCV_IRELATIVE overwrite and order issues
Date: Thu, 16 May 2024 15:07:42 +0800 [thread overview]
Message-ID: <CAPpQWtBitpE7FV2LdGuvpkf34sjp=x=XKK3VWSESEKVie_fZng@mail.gmail.com> (raw)
In-Reply-To: <89C7C17E-5E9D-4E00-A3AE-FF1F014C0939@sifive.com>
[-- Attachment #1: Type: text/plain, Size: 2312 bytes --]
On Thu, May 16, 2024 at 2:16 PM Hau Hsu <hau.hsu@sifive.com> wrote:
> Hi Nelson,
>
> Sorry for the late reply.
>
> On May 8, 2024, at 9:00 AM, Nelson Chu <nelson@rivosinc.com> wrote:
>
> Can you provide the testcase to show the case which I mentioned in the
> pr13302? Which is that an ifunc with a dynamic jump slot calls another
> ifunc, and are not in the rel.dyn.
>
> I am not quite sure what's the issue you mentioned in PR13302.
> You mean the order issue of cause by one ifunc (generates
> JUMP_SLOT[32|64]) calls another JUMP_SLOT[32|64] ifunc?
>
> Since according to the testcase below, it seems no requirement to apply
> this fix though.
>
> The new test case uses two methods to call ifuncs:
> 1. Through a normal function call: PLT + GOT
> 2. Through a global function pointer: GOT only
>
> Without the fix, the relocation of the first method overwrites the
> second's.
> The relocation section of my test case would be:
>
> Relocation section '.rela.plt' at offset 0x94 contains 2 entries:
> Offset Info Type Sym. Value Symbol's Name + Addend
> 000110dc 0000003a R_RISCV_IRELATIVE 100c0
> 00000000 00000000 R_RISCV_NONE 0
>
>
> With the fix, it becomes
>
> Relocation section '.rela.plt' at offset 0x94 contains 2 entries:
> Offset Info Type Sym. Value Symbol's Name + Addend
> 000110e0 0000003a R_RISCV_IRELATIVE 100c0
> 000110dc 0000003a R_RISCV_IRELATIVE 100c0
>
>
So it seems like the overwrite problem, not the order problem we were
discussing in the pr13302...
> --- /dev/null
>> +++ b/ld/testsuite/ld-riscv-elf/ifunc-macro.s
>> @@ -0,0 +1,19 @@
>> +/* Define macros to handle similar behaviors for rv32/rv64.
>> + Assumes macro "__64_bit__" defined for rv64.
>> + The macro is specifically defined for ifunc tests in
>> ld-riscv-elf.exp. */
>> +
>> +.macro PTR_DATA name
>> +.ifdef __64_bit__
>> + .quad \name
>> +.else
>> + .long \name
>> +.endif
>> +.endm
>> +
>> +.macro LOAD rd, rs, offset
>> +.ifdef __64_bit__
>> + ld \rd, \offset (\rs)
>> +.else
>> + lw \rd, \offset (\rs)
>> +.endif
>> +.endm
>
>
Btw, can we not use these macroes?
Nelson
next prev parent reply other threads:[~2024-05-16 7:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-06 4:45 [PATCH 1/2] riscv: Add POINTER_LOCAL_IFUNC_P/PLT_LOCAL_IFUNC_P Hau Hsu
2024-05-06 4:45 ` [PATCH 2/2] riscv: Fix R_RISCV_IRELATIVE overwrite and order issues Hau Hsu
2024-05-08 1:00 ` Nelson Chu
2024-05-16 6:16 ` Hau Hsu
2024-05-16 7:07 ` Nelson Chu [this message]
2024-05-16 7:30 ` Hau Hsu
2024-05-16 8:28 ` Nelson Chu
2024-05-17 2:32 ` Hau Hsu
2024-05-23 3:53 ` Hau Hsu
2024-05-23 6:43 ` Nelson Chu
2024-05-08 1:03 ` [PATCH 1/2] riscv: Add POINTER_LOCAL_IFUNC_P/PLT_LOCAL_IFUNC_P Nelson Chu
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