From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x22b.google.com (mail-oi1-x22b.google.com [IPv6:2607:f8b0:4864:20::22b]) by sourceware.org (Postfix) with ESMTPS id 277993858D1E for ; Wed, 4 Jan 2023 07:43:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 277993858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-oi1-x22b.google.com with SMTP id s187so28893853oie.10 for ; Tue, 03 Jan 2023 23:43:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=n5cAP+OQcI2vgFbO+UgpMPz6JUczNWWti0BVKhdGriE=; b=IBTsU84B7oPj+SSmlWjkNrnJV+AYiGYIWwy4oEh9E33pOHSlCiJeK1+/bIAFrft6DV ZgyDky9x13sZvOAWk5WW+jh49zyJF12r3hv4AOKMIXBHxxpT9geUoYUCKLVwtLyNF+Jo lqtgGWyME2vQQ2HbNuCn/sMkzsPkinEakLDBSea/VPBJTvfkRAcvI3xfOP2gziKePfWp gwHH8M0y47hvOpDa8AlpmPWII9AtjPVPtk3Kro9FZ8aP5mViA1rToxM6w77fXl+ZDFXt b4mPGnrf1K5WROzHiZ2D9oQxebYK8uEYkeQxQJANi0Lw7tuE+qxcj1j4qBK4D3fIlkP3 AWwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=n5cAP+OQcI2vgFbO+UgpMPz6JUczNWWti0BVKhdGriE=; b=I9XAcRnEY+8hrER39Ctgsvs4MXOFJDhtZw2NZVPFk/3FG77T2u+Tkfog4SEDMSrgFg 0kue7agCwv7b0K9Nhn/aD01CKfUUGftcpoEnW9Ce/TPT8bqtsdtiKMVgP45NHscMNDhW +pFsBgJ9w67bAPZBgP2M+Dd8h2IKJfSojnqHOUNTkveAPR08QUgZEbn67+Zwjs0i+/sS b9Q4uXm6CLfRIkRqSqZ2/3F1MXW/ov8V9/skUvl+cZXqz8NWZRJ1tU7jtsh3bGFw49jt n0+0fMMhiYo5aS4pKiO10AmbIB1d4Za/7kgIhzCErzwfh685TI/YXswD1LzHVHs7qJyz gdSQ== X-Gm-Message-State: AFqh2kp5EDgc/vouygUdL41tNVV8/FvnZbCgFHJ1iGUaR7xadflFCbAN tJqrd8BxMPc8FDORdy0w4aodaZdSjBJqg+jVEqVDgQ== X-Google-Smtp-Source: AMrXdXvZu6J+eoOEMHpcZ2nzAvOiLh/WgbDrmJvPzq8AELrRMl7rKPbgZrMT0VlexH2mtVGhOfz6A2E8eD0FoRP6NWo= X-Received: by 2002:a05:6808:3a91:b0:35c:4435:fc2e with SMTP id fb17-20020a0568083a9100b0035c4435fc2emr3064013oib.244.1672818212386; Tue, 03 Jan 2023 23:43:32 -0800 (PST) MIME-Version: 1.0 References: <20230104055936.1130680-1-aurelien@aurel32.net> In-Reply-To: <20230104055936.1130680-1-aurelien@aurel32.net> From: Nelson Chu Date: Wed, 4 Jan 2023 15:43:21 +0800 Message-ID: Subject: Re: [PATCH] RISC-V: fix JAL aliases ordering in opcode table To: Aurelien Jarno Cc: binutils@sourceware.org, Jan Beulich Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This solution is quite simple and clear, so it looks good to me. The other solution is that - check for the integer register at the start of the my_getExpression, just like what my_getSmallExpression did before. Although my_getSmallExpression will also call my_getExpression, so checking the integer register twice looks redundant, but at least it is more safe and less error-prone. Or we can find a way to only check the register once, and make the source code clear. But since the release is close, I suggest we just accept this simple solution in the short-term. Thanks Nelson On Wed, Jan 4, 2023 at 2:00 PM Aurelien Jarno wrote: > > Commit 839189bc932e ("RISC-V: re-arrange opcode table for consistent > alias handling") reorder the instructions in the opcode tables, > including the various JAL aliases. In particular they are not ordered > anymore from the most specific to the less specific one. This causes the > form "JAL reg, imm" to emit a relocation with the register name. This > breaks various things like building Linux kernel modules. > > This patch fixes the issue by restoring the original ordering of the JAL > aliases. > > Tested on riscv64-linux > PR gas/29940 > Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29940 > --- > opcodes/riscv-opc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c > index 6b65296a3f2..89c6572519e 100644 > --- a/opcodes/riscv-opc.c > +++ b/opcodes/riscv-opc.c > @@ -340,9 +340,9 @@ const struct riscv_opcode riscv_opcodes[] = > {"jalr", 0, INSN_CLASS_I, "d,s,j", MATCH_JALR, MASK_JALR, match_opcode, INSN_JSR }, > {"j", 0, INSN_CLASS_C, "Ca", MATCH_C_J, MASK_C_J, match_opcode, INSN_ALIAS|INSN_BRANCH }, > {"j", 0, INSN_CLASS_I, "a", MATCH_JAL, MASK_JAL|MASK_RD, match_opcode, INSN_ALIAS|INSN_BRANCH }, > -{"jal", 0, INSN_CLASS_I, "a", MATCH_JAL|(X_RA << OP_SH_RD), MASK_JAL|MASK_RD, match_opcode, INSN_ALIAS|INSN_JSR }, > {"jal", 0, INSN_CLASS_I, "d,a", MATCH_JAL, MASK_JAL, match_opcode, INSN_JSR }, > {"jal", 32, INSN_CLASS_C, "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS|INSN_JSR }, > +{"jal", 0, INSN_CLASS_I, "a", MATCH_JAL|(X_RA << OP_SH_RD), MASK_JAL|MASK_RD, match_opcode, INSN_ALIAS|INSN_JSR }, > {"call", 0, INSN_CLASS_I, "d,c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, > {"call", 0, INSN_CLASS_I, "c", (X_RA << OP_SH_RS1)|(X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO }, > {"tail", 0, INSN_CLASS_I, "c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, > -- > 2.35.1 >